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| author | Sachin Gupta <sgupta2m@in.ibm.com> | 2015-11-20 11:05:38 -0600 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2015-12-04 00:17:47 -0600 |
| commit | 796e93580756e2bf11534d6a79e532ba0bfd1364 (patch) | |
| tree | 7e649b21565f80d72db8c169084e07b0a25266c0 /import | |
| parent | 39a86ed53fa48fb117a0a9104daa28f25e60100e (diff) | |
| download | talos-sbe-796e93580756e2bf11534d6a79e532ba0bfd1364.tar.gz talos-sbe-796e93580756e2bf11534d6a79e532ba0bfd1364.zip | |
Avoid hash collision in ppe.
Change-Id: I6e719a03a21899d8cb3cbd392b249dcd7b848edc
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22238
Tested-by: Jenkins Server
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22453
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Tested-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'import')
| -rw-r--r-- | import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.C | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.C b/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.C index 0a4d84d1..36d7ab08 100644 --- a/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.C +++ b/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.C @@ -121,7 +121,7 @@ p9_hcd_cache_dpll_setup( FAPI_DBG("Drop DPLL Test Mode and Reset"); FAPI_TRY(putScom(i_target, EQ_NET_CTRL0_WAND, MASK_AND(3, 2, 0))); - FAPI_DBG("Put DPLL into bypass"); + FAPI_DBG("Put DPLL into bypass mode"); FAPI_TRY(putScom(i_target, EQ_NET_CTRL0_WOR, MASK_SET(5))); FAPI_DBG("Put DPLL into Mode 1 by asserting ff_bypass"); |
