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author | Anusha Reddy Rangareddygari <anusrang@in.ibm.com> | 2016-05-19 07:40:18 +0200 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2016-05-20 05:14:39 -0400 |
commit | 5ca202aed070015c8d5d4e55b1e3a8b24ea3d465 (patch) | |
tree | da3dac0f6d19b049a1c6472e119347716ca16bde /import/chips/p9 | |
parent | 589e5a88ad3f6b58cbf4a816b2ccb0448bf07243 (diff) | |
download | talos-sbe-5ca202aed070015c8d5d4e55b1e3a8b24ea3d465.tar.gz talos-sbe-5ca202aed070015c8d5d4e55b1e3a8b24ea3d465.zip |
Level 2 HWP for p9_sbe_tp_chiplet_init3
Change-Id: Ic5e6400f55cf200c89b9af2cf78074416609734b
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24763
Tested-by: PPE CI
Tested-by: Jenkins Server
Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com>
Tested-by: Hostboot CI
Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24765
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'import/chips/p9')
3 files changed, 29 insertions, 2 deletions
diff --git a/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C b/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C index 9d97ecf9..01f2fc96 100644 --- a/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C +++ b/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C @@ -35,6 +35,7 @@ //## auto_generated #include "p9_const_common.H" +#include <p9_misc_scom_addresses.H> #include <p9_perv_scom_addresses.H> #include <p9_perv_scom_addresses_fld.H> #include <p9_perv_sbe_cmn.H> @@ -55,6 +56,8 @@ fapi2::ReturnCode p9_sbe_tp_chiplet_init3(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip) { bool l_read_reg = 0; + fapi2::buffer<uint32_t> l_pfet_value; + fapi2::buffer<uint32_t> l_attr_pfet; fapi2::buffer<uint64_t> l_regions; fapi2::Target<fapi2::TARGET_TYPE_PERV> l_tpchiplet = i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_FILTER_TP, @@ -62,6 +65,10 @@ fapi2::ReturnCode p9_sbe_tp_chiplet_init3(const fapi2::buffer<uint64_t> l_data64; FAPI_INF("Entering ..."); + FAPI_DBG("Reading ATTR_PFET_OFF_CONTROLS"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PFET_OFF_CONTROLS, i_target_chip, + l_pfet_value)); + FAPI_DBG("Switch pervasive chiplet OOB mux"); //Setting ROOT_CTRL0 register value FAPI_TRY(fapi2::getScom(i_target_chip, PERV_ROOT_CTRL0_SCOM, l_data64)); @@ -73,7 +80,7 @@ fapi2::ReturnCode p9_sbe_tp_chiplet_init3(const //PIB.INTERRUPT_TYPE_REG = 0 FAPI_TRY(fapi2::putScom(i_target_chip, PERV_PIB_INTERRUPT_TYPE_REG, 0)); - FAPI_DBG("Clear Pervasive Chiplet region fence"); + FAPI_DBG("Clear pervasive chiplet region fence"); FAPI_TRY(p9_sbe_tp_chiplet_init3_region_fence_setup(l_tpchiplet)); FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(l_tpchiplet, @@ -90,7 +97,16 @@ fapi2::ReturnCode p9_sbe_tp_chiplet_init3(const l_data64.clearBit<PERV_ROOT_CTRL0_SET_FENCE5_DC>(); FAPI_TRY(fapi2::putScom(i_target_chip, PERV_ROOT_CTRL0_SCOM, l_data64)); - FAPI_DBG("Drop EDRAM control gate"); + l_pfet_value.extractToRight<0, 30>(l_attr_pfet); + + FAPI_DBG("Set pfet off controls"); + //Setting DISABLE_FORCE_PFET_OFF register value + FAPI_TRY(fapi2::getScom(i_target_chip, PU_DISABLE_FORCE_PFET_OFF, l_data64)); + //PIB.DISABLE_FORCE_PFET_OFF.DISABLE_FORCE_PFET_OFF_REG = l_attr_pfet + l_data64.insertFromRight<0, 30>(l_attr_pfet); + FAPI_TRY(fapi2::putScom(i_target_chip, PU_DISABLE_FORCE_PFET_OFF, l_data64)); + + FAPI_DBG("Drop EDRAM control gate and pfet_force_off"); //Setting ROOT_CTRL2 register value FAPI_TRY(fapi2::getScom(i_target_chip, PERV_ROOT_CTRL2_SCOM, l_data64)); l_data64.clearBit<16>(); //PIB.ROOT_CTRL2.ROOT_CTRL2_16_FREE_USAGE = 0 diff --git a/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml index c18d6df9..c1b8b213 100644 --- a/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml +++ b/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml @@ -583,5 +583,8 @@ <entry> <name>ATTR_SECURITY_ENABLE</name> </entry> + <entry> + <name>ATTR_PFET_OFF_CONTROLS</name> + </entry> </entries> diff --git a/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml b/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml index 17f0564e..8d8e33b7 100644 --- a/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml +++ b/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml @@ -572,4 +572,12 @@ <writeable/> </attribute> +<attribute> + <id>ATTR_PFET_OFF_CONTROLS</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>To disable force pfet off control from fuse status</description> + <valueType>uint32</valueType> + <platInit/> +</attribute> + </attributes> |