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authorAnusha Reddy Rangareddygari <anusrang@in.ibm.com>2016-05-27 13:43:53 +0200
committerPrachi Gupta <pragupta@us.ibm.com>2016-06-08 11:45:57 -0500
commitadbbce5842c157dc4ca641d857bf560f7c1842eb (patch)
tree9032ff2053730164ec6050c30c9a9a62fea83a92 /import/chips/p9/procedures/xml/error_info
parent8dc4aebe0d34c7dcd865808c1a73c7d6e5e14266 (diff)
downloadtalos-sbe-adbbce5842c157dc4ca641d857bf560f7c1842eb.tar.gz
talos-sbe-adbbce5842c157dc4ca641d857bf560f7c1842eb.zip
Level 2 HWP for p9_sbe_nest_startclocks,p9_sbe_startclock_chiplets
Change-Id: Ife07787240042354d7072f5c4674b14318cb0a71 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25116 Tested-by: Jenkins Server Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25150 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures/xml/error_info')
-rw-r--r--import/chips/p9/procedures/xml/error_info/p9_sbe_common_errors.xml26
-rw-r--r--import/chips/p9/procedures/xml/error_info/p9_sbe_nest_startclocks_errors.xml28
-rw-r--r--import/chips/p9/procedures/xml/error_info/p9_sbe_startclock_chiplets_errors.xml8
3 files changed, 28 insertions, 34 deletions
diff --git a/import/chips/p9/procedures/xml/error_info/p9_sbe_common_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_sbe_common_errors.xml
index 12685941..cdbf36d8 100644
--- a/import/chips/p9/procedures/xml/error_info/p9_sbe_common_errors.xml
+++ b/import/chips/p9/procedures/xml/error_info/p9_sbe_common_errors.xml
@@ -7,7 +7,7 @@
<!-- -->
<!-- EKB Project -->
<!-- -->
-<!-- COPYRIGHT 2015 -->
+<!-- COPYRIGHT 2015,2016 -->
<!-- [+] International Business Machines Corp. -->
<!-- -->
<!-- -->
@@ -45,4 +45,28 @@
<description>Chiplet not aligned</description>
</hwpError>
<!-- ******************************************************************** -->
+ <hwpError>
+ <rc>RC_NEST_ARY_ERR</rc>
+ <description>ary_thold status not matching the expected value in clock start stop sequence</description>
+ <ffdc>READ_CLK_ARY</ffdc>
+ </hwpError>
+ <!-- ******************************************************************** -->
+ <hwpError>
+ <rc>RC_NEST_NSL_ERR</rc>
+ <description>nsl_thold status not matching the expected value in clock start stop sequence</description>
+ <ffdc>READ_CLK_NSL</ffdc>
+ </hwpError>
+ <!-- ******************************************************************** -->
+ <hwpError>
+ <rc>RC_NEST_SL_ERR</rc>
+ <description>sl_thold status not matching the expected value in clock start stop sequence</description>
+ <ffdc>READ_CLK_SL</ffdc>
+ </hwpError>
+ <!-- ******************************************************************** -->
+ <hwpError>
+ <rc>RC_READ_ALL_CHECKSTOP_ERR</rc>
+ <description>Read and or all Checkstop error</description>
+ <ffdc>READ_ALL_CHECKSTOP</ffdc>
+ </hwpError>
+ <!-- ******************************************************************** -->
</hwpErrors>
diff --git a/import/chips/p9/procedures/xml/error_info/p9_sbe_nest_startclocks_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_sbe_nest_startclocks_errors.xml
index 51842294..cdece413 100644
--- a/import/chips/p9/procedures/xml/error_info/p9_sbe_nest_startclocks_errors.xml
+++ b/import/chips/p9/procedures/xml/error_info/p9_sbe_nest_startclocks_errors.xml
@@ -7,7 +7,7 @@
<!-- -->
<!-- EKB Project -->
<!-- -->
-<!-- COPYRIGHT 2015 -->
+<!-- COPYRIGHT 2015,2016 -->
<!-- [+] International Business Machines Corp. -->
<!-- -->
<!-- -->
@@ -21,29 +21,5 @@
<!-- Halt codes for p9_sbe_nest_startclocks -->
<hwpErrors>
- <!-- ******************************************************************** -->
- <hwpError>
- <rc>RC_READ_ALL_CHECKSTOP_ERR</rc>
- <description>Read and or all Checkstop error</description>
- <ffdc>READ_ALL_CHECKSTOP</ffdc>
- </hwpError>
- <!-- ******************************************************************** -->
- <hwpError>
- <rc>RC_NEST_SL_ERR</rc>
- <description>sl_thold status not matching the expected value in clock start stop sequence</description>
- <ffdc>READ_CLK_SL</ffdc>
- </hwpError>
- <!-- ******************************************************************** -->
- <hwpError>
- <rc>RC_NEST_NSL_ERR</rc>
- <description>nsl_thold status not matching the expected value in clock start stop sequence</description>
- <ffdc>READ_CLK_NSL</ffdc>
- </hwpError>
- <!-- ******************************************************************** -->
- <hwpError>
- <rc>RC_NEST_ARY_ERR</rc>
- <description>ary_thold status not matching the expected value in clock start stop sequence</description>
- <ffdc>READ_CLK_ARY</ffdc>
- </hwpError>
- <!-- ******************************************************************** -->
+
</hwpErrors>
diff --git a/import/chips/p9/procedures/xml/error_info/p9_sbe_startclock_chiplets_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_sbe_startclock_chiplets_errors.xml
index 5324e915..322b385d 100644
--- a/import/chips/p9/procedures/xml/error_info/p9_sbe_startclock_chiplets_errors.xml
+++ b/import/chips/p9/procedures/xml/error_info/p9_sbe_startclock_chiplets_errors.xml
@@ -21,11 +21,5 @@
<!-- Halt codes for p9_sbe_startclock_chiplets -->
<hwpErrors>
- <!-- ******************************************************************** -->
- <hwpError>
- <rc>RC_READ_CHECKSTOP_ERR</rc>
- <description>Read and or all Checkstop error</description>
- <ffdc>READ_CHECKSTOP</ffdc>
- </hwpError>
- <!-- ******************************************************************** -->
+
</hwpErrors>
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