summaryrefslogtreecommitdiffstats
path: root/import/chips/p9/procedures/hwp/nest
diff options
context:
space:
mode:
authorCHRISTINA L. GRAVES <clgraves@us.ibm.com>2015-10-08 11:51:59 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2016-05-02 04:14:19 -0400
commit28a951990eaee531b1a0071045dfa0f03147d2d3 (patch)
tree6ec65256b1ec5e66dc8bb331a4a3712177779a19 /import/chips/p9/procedures/hwp/nest
parent342f7d492b5ea6d4384934816b4e1d09791e7326 (diff)
downloadtalos-sbe-28a951990eaee531b1a0071045dfa0f03147d2d3.tar.gz
talos-sbe-28a951990eaee531b1a0071045dfa0f03147d2d3.zip
p9_adu_access and p9_adu_setup L2 procedures
Change-Id: If1e65404e0ec94971f104992f59f0fb2064439be Original-Change-Id: Id374670d8f75dc74f37967f6c95ef773796e3f1e Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21092 Tested-by: Jenkins Server Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23923 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures/hwp/nest')
-rw-r--r--import/chips/p9/procedures/hwp/nest/p9_adu_access.C105
-rw-r--r--import/chips/p9/procedures/hwp/nest/p9_adu_setup.C105
2 files changed, 210 insertions, 0 deletions
diff --git a/import/chips/p9/procedures/hwp/nest/p9_adu_access.C b/import/chips/p9/procedures/hwp/nest/p9_adu_access.C
new file mode 100644
index 00000000..cfa81aec
--- /dev/null
+++ b/import/chips/p9/procedures/hwp/nest/p9_adu_access.C
@@ -0,0 +1,105 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: chips/p9/procedures/ipl/sbe/p9_adu_access.C $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* EKB Project */
+/* */
+/* COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* IBM_PROLOG_END_TAG */
+//--------------------------------------------------------------------------
+//
+//
+/// @file p9_adu_access.C
+/// @brief Read coherent state of memory via the ADU (FAPI)
+///
+// *HWP HWP Owner Christina Graves clgraves@us.ibm.com
+// *HWP FW Owner: Thi Tran thi@us.ibm.com
+// *HWP Team: Nest
+// *HWP Level: 2
+// *HWP Consumed by: SBE
+//
+//--------------------------------------------------------------------------
+
+
+//--------------------------------------------------------------------------
+// Includes
+//--------------------------------------------------------------------------
+#include <p9_adu_access.H>
+#include <p9_adu_coherent_utils.H>
+
+extern "C" {
+
+//--------------------------------------------------------------------------
+// HWP entry point
+//--------------------------------------------------------------------------
+ fapi2::ReturnCode p9_adu_access(const
+ fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
+ const uint64_t i_address,
+ const bool i_rnw,
+ const uint32_t i_flags,
+ const bool i_firstGranule,
+ const bool i_lastGranule,
+ uint8_t io_data[])
+ {
+ // mark HWP entry
+ FAPI_DBG("Entering ...\n");
+
+ if(i_lastGranule && (i_flags & FLAG_AUTOINC))
+ {
+ //call this function to clear the altd_auto_inc bit before the last iteration
+ FAPI_TRY(p9_adu_coherent_clear_autoinc(i_target), "Error from p9_adu_coherent_clear_autoinc");
+ }
+
+ if (i_rnw)
+ {
+ //read the data
+ FAPI_TRY(p9_adu_coherent_adu_read(i_target, i_firstGranule, i_address, i_flags, io_data),
+ "Error from p9_adu_coherent_adu_read");
+ }
+ else
+ {
+ //write the data
+ FAPI_TRY(p9_adu_coherent_adu_write(i_target, i_firstGranule, i_address, i_flags, io_data),
+ "Error from p9_adu_coherent_adu_write");
+ }
+
+ //If we are not in fastmode or this is the last granule, we want to check the status
+ if ((i_lastGranule) || !(i_flags & FLAG_FASTMODE))
+ {
+ FAPI_TRY(p9_adu_coherent_status_check(i_target, ((i_flags & FLAG_AUTOINC)
+ && !i_lastGranule)), "Error from p9_adu_coherent_status_check");
+
+ //If it's the last read/write
+ if (i_lastGranule)
+ {
+ FAPI_TRY(p9_adu_coherent_cleanup_adu(i_target),
+ "Error doing p9_adu_coherent_cleanup_adu");
+ }
+ }
+
+ fapi_try_exit:
+
+ if (fapi2::current_err
+ && !(i_flags & FLAG_LEAVE_DIRTY))
+ {
+ (void) p9_adu_coherent_utils_reset_adu(i_target);
+ uint32_t num_attempts = i_flags & FLAG_LOCK_TRIES;
+ (void) p9_adu_coherent_manage_lock(i_target, false, false, num_attempts);
+ }
+
+ FAPI_DBG("Exiting...");
+ return fapi2::current_err;
+ }
+
+} // extern "C"
+
diff --git a/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C b/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C
new file mode 100644
index 00000000..20c7d639
--- /dev/null
+++ b/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C
@@ -0,0 +1,105 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: chips/p9/procedures/ipl/sbe/p9_adu_setup.C $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* EKB Project */
+/* */
+/* COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* IBM_PROLOG_END_TAG */
+//--------------------------------------------------------------------------
+//
+/// @file p9_adu_setup.C
+/// @brief Setup the registers for a read/write to the ADU
+//
+// *HWP HWP Owner: Christina Graves clgraves@us.ibm.com
+// *HWP FW Owner: Thi Tran thi@us.ibm.com
+// *HWP Team: Nest
+// *HWP Level: 2
+// *HWP Consumed by: SBE
+//
+//--------------------------------------------------------------------------
+
+//--------------------------------------------------------------------------
+// Includes
+//--------------------------------------------------------------------------
+#include <p9_adu_setup.H>
+#include <p9_adu_coherent_utils.H>
+
+extern "C"
+{
+
+//--------------------------------------------------------------------------
+// HWP entry point
+//--------------------------------------------------------------------------
+ fapi2::ReturnCode p9_adu_setup(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>
+ & i_target,
+ const uint64_t i_address,
+ const bool i_rnw,
+ const uint32_t i_flags,
+ uint32_t& o_numGranules)
+ {
+ //return code
+ uint32_t num_attempts = 1;
+ bool lock_pick = false;
+
+ // mark HWP entry
+ FAPI_DBG("Entering ...\n");
+
+ //ADU status/control information
+ bool adu_is_dirty = false;
+ bool adu_leave_dirty = i_flags & FLAG_LEAVE_DIRTY;
+
+ //check arguments
+ FAPI_TRY(p9_adu_coherent_utils_check_args(i_target, i_address),
+ "Error from p9_adu_coherent_utils_check_args");
+
+ //ensure fabric is running
+ FAPI_TRY(p9_adu_coherent_utils_check_fbc_state(i_target),
+ "Error from p9_adu_coherent_utils_check_fbc_status");
+
+ //reset ADU state machines and status register
+ FAPI_TRY(p9_adu_coherent_utils_reset_adu(i_target), "p9_adu_setup: Error from p9_adu_coherent_utils_reset_adu");
+
+ //acquire ADU lock to guarantee exclusive use of the ADU resources
+ lock_pick = i_flags & FLAG_LOCK_PICK;
+ num_attempts = i_flags & FLAG_LOCK_TRIES;
+ FAPI_TRY(p9_adu_coherent_manage_lock(i_target, lock_pick, true, num_attempts),
+ "Error from p9_adu_coherent_manage_lock");
+
+ //figure out how many granules can be requested before setup needs to be run again
+ FAPI_TRY(p9_adu_coherent_utils_get_num_granules(i_address, o_numGranules),
+ "Error from p9_adu_coherent_utils_get_num_granules");
+
+ //Set dirty since we need to attempt to cleanup/release the lock so the ADU is not in a locked state if operation fails from this point
+ adu_is_dirty = true;
+
+ //setup the ADU registers for the read/write
+ FAPI_TRY(p9_adu_coherent_setup_adu(i_target, i_address, i_rnw, i_flags),
+ "Error from p9_adu_coherent_setup_registers");
+
+ fapi_try_exit:
+
+ //if an error has occurred, ADU is dirty, and instructed to clean up,
+ //attempt to reset ADU and free lock (propogate rc of original fail)
+ if (fapi2::current_err && adu_is_dirty && !adu_leave_dirty)
+ {
+ (void) p9_adu_coherent_utils_reset_adu(i_target);
+ (void) p9_adu_coherent_manage_lock(i_target, false, false, num_attempts);
+ }
+
+ FAPI_DBG("Exiting...");
+ return fapi2::current_err;
+ }
+
+} // extern "C"
+
OpenPOWER on IntegriCloud