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authorJoe Dery <dery@us.ibm.com>2017-06-21 12:06:03 -0400
committerSachin Gupta <sgupta2m@in.ibm.com>2017-06-23 19:51:15 -0400
commit8242086d77cdff35e0e8e0d909b3d5cb9849489a (patch)
treeafdd93282f8790d49daa623f4addd9853233810f /Makefile
parentbd968b0f6b1f9ad8edbe05a27535cfe70dbd2a34 (diff)
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p9_sbe_tp_chiplet_init1: Set TP_TCPERV_SRAM_ENABLE_DC
Set TP_TCPERV_SRAM_ENABLE_DC at end, after CHIPLET_ENABLE/scan0 CQ: HW414015 Change-Id: I28ea1bd84eaab79d2db249c5902c1f88a7fcd1e2 Depends-On: I5a4b929fad4aa954ad413eb73861ab1e53135360 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42226 Dev-Ready: Joachim Fenkes <fenkes@de.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42231 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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