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author | Prasad Bg Ranganath <prasadbgr@in.ibm.com> | 2017-05-02 13:12:59 -0500 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-05-27 13:05:57 -0400 |
commit | d7b257530936476c88c98e0f43056beaf815a7c3 (patch) | |
tree | a9d019776f5f1a1a98ed65c3d0d9f0fb5ad34fdd | |
parent | 3a302c892abb5dc2a2670b79666843809fb33407 (diff) | |
download | talos-sbe-d7b257530936476c88c98e0f43056beaf815a7c3.tar.gz talos-sbe-d7b257530936476c88c98e0f43056beaf815a7c3.zip |
p9_pstate_parameter_block: Pound W enhancement for VID Compare
- Add changes to Compare VID slopes support
- Added changes for threshold slopes
Change-Id: I6ce9f7630cf8f8bbb19a2914da43c24308c3c7fd
RTC:172523
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39955
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: CHRISTOPHER M. RIEDL <cmriedl@us.ibm.com>
Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40767
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
-rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml index ecad7a62..a57ccbcf 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml @@ -1902,4 +1902,26 @@ </attribute> <!-- ********************************************************************* --> + <attribute> + <id>ATTR_VDM_VID_COMPARE_BIAS_0P5PCT</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + VDM Voltage Compare Bias - % of bias (signed twos + complement in + 0.5 percent steps) that is applied to the #W VDM + VID Compare before placement in the respective Pstate + Paramter Blocks that will be consumed + by Hcode. + Array of 4 entries: 0 = PowerSave, 1 = + Nominal; 2 = Turbo; 3 = UltraTurbo + If index 4 is non-zero, the + other entries are considered + valid.Producer:MRWB. + </description> + <valueType>int8</valueType> + <array>4</array> + <initToZero/> + <platInit/> + </attribute> + </attributes> |