diff options
author | Santosh Puranik <santosh.puranik@in.ibm.com> | 2016-03-09 12:52:12 -0600 |
---|---|---|
committer | Gregory S. Still <stillgs@us.ibm.com> | 2016-07-08 09:09:39 -0400 |
commit | cea8502c18480f9d40d019c1d388e9f72db91aa6 (patch) | |
tree | 5f63b31afa25a4a223daafe3bb122d526788748f | |
parent | 194b57ceb15e9fc1a226256df0ba654336d40ccd (diff) | |
download | talos-sbe-cea8502c18480f9d40d019c1d388e9f72db91aa6.tar.gz talos-sbe-cea8502c18480f9d40d019c1d388e9f72db91aa6.zip |
Use ATTR_PG attribute
-- Remove use of ATTR_PG_<CHIPLET>
-- Delete pg attributes XML
Change-Id: I96986292fb6e360fc785f99e66b3e866dccd4fef
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21871
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: Martin Peschke <mpeschke@de.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
-rw-r--r-- | hwpf/include/plat/plat_target_pg_attributes.H | 107 | ||||
-rw-r--r-- | hwpf/include/plat/plat_target_utils.H | 18 | ||||
-rw-r--r-- | hwpf/src/plat/target.C | 286 | ||||
-rw-r--r-- | import/chips/p9/procedures/xml/attribute_info/pg_attributes.xml | 680 | ||||
-rw-r--r-- | sbe/image/Makefile | 1 | ||||
-rw-r--r-- | tools/image/sbe_default_tool.c | 56 |
6 files changed, 113 insertions, 1035 deletions
diff --git a/hwpf/include/plat/plat_target_pg_attributes.H b/hwpf/include/plat/plat_target_pg_attributes.H deleted file mode 100644 index ce51448b..00000000 --- a/hwpf/include/plat/plat_target_pg_attributes.H +++ /dev/null @@ -1,107 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: $ */ -/* */ -/* OpenPOWER HostBoot Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2012,2014 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ -/** - * @file plat_target_pg_attribute.H - * @brief Definitions for fapi2 PPE targets' partial good attribute mapping - */ - -#ifndef __FAPI2_PPE_TARGET_PG_ATTR__ -#define __FAPI2_PPE_TARGET_PG_ATTR__ - - -typedef struct chiplet_pg_entry_t -{ - // char[16] pg_attribute; - uint32_t pg_attribute; - uint8_t target_type; - uint16_t relative_target_num; -} chiplet_pg_entry_t; - -const chiplet_pg_entry_t CHIPLET_PG_ARRAY[] = -{ - // Pervasive Chiplets - { fapi2::ATTR_PG_PRV , fapi2::TARGET_TYPE_PERV, 0x01 }, - { fapi2::ATTR_PG_N0 , fapi2::TARGET_TYPE_PERV, 0x02 }, - { fapi2::ATTR_PG_N1 , fapi2::TARGET_TYPE_PERV, 0x03 }, - { fapi2::ATTR_PG_N2 , fapi2::TARGET_TYPE_PERV, 0x04 }, - { fapi2::ATTR_PG_N3 , fapi2::TARGET_TYPE_PERV, 0x05 }, - { fapi2::ATTR_PG_XB , fapi2::TARGET_TYPE_PERV, 0x06 }, - { fapi2::ATTR_PG_MC01, fapi2::TARGET_TYPE_PERV, 0x07 }, - { fapi2::ATTR_PG_MC23, fapi2::TARGET_TYPE_PERV, 0x08 }, - { fapi2::ATTR_PG_OB0 , fapi2::TARGET_TYPE_PERV, 0x09 }, - { fapi2::ATTR_PG_OB1 , fapi2::TARGET_TYPE_PERV, 0x0A }, - { fapi2::ATTR_PG_OB2 , fapi2::TARGET_TYPE_PERV, 0x0B }, - { fapi2::ATTR_PG_OB3 , fapi2::TARGET_TYPE_PERV, 0x0C }, - { fapi2::ATTR_PG_PCI0, fapi2::TARGET_TYPE_PERV, 0x0D }, - { fapi2::ATTR_PG_PCI1, fapi2::TARGET_TYPE_PERV, 0x0E }, - { fapi2::ATTR_PG_PCI2, fapi2::TARGET_TYPE_PERV, 0x0F }, - // EQ Chiplets - { fapi2::ATTR_PG_EQ0 , fapi2::TARGET_TYPE_EQ, 0x00 }, - { fapi2::ATTR_PG_EQ1 , fapi2::TARGET_TYPE_EQ, 0x01 }, - { fapi2::ATTR_PG_EQ2 , fapi2::TARGET_TYPE_EQ, 0x02 }, - { fapi2::ATTR_PG_EQ3 , fapi2::TARGET_TYPE_EQ, 0x03 }, - { fapi2::ATTR_PG_EQ4 , fapi2::TARGET_TYPE_EQ, 0x04 }, - { fapi2::ATTR_PG_EQ5 , fapi2::TARGET_TYPE_EQ, 0x05 }, - // Core Chiplets - { fapi2::ATTR_PG_EC00, fapi2::TARGET_TYPE_CORE, 0x00 }, - { fapi2::ATTR_PG_EC01, fapi2::TARGET_TYPE_CORE, 0x01 }, - { fapi2::ATTR_PG_EC02, fapi2::TARGET_TYPE_CORE, 0x02 }, - { fapi2::ATTR_PG_EC03, fapi2::TARGET_TYPE_CORE, 0x03 }, - { fapi2::ATTR_PG_EC04, fapi2::TARGET_TYPE_CORE, 0x04 }, - { fapi2::ATTR_PG_EC05, fapi2::TARGET_TYPE_CORE, 0x05 }, - { fapi2::ATTR_PG_EC06, fapi2::TARGET_TYPE_CORE, 0x06 }, - { fapi2::ATTR_PG_EC07, fapi2::TARGET_TYPE_CORE, 0x07 }, - { fapi2::ATTR_PG_EC08, fapi2::TARGET_TYPE_CORE, 0x08 }, - { fapi2::ATTR_PG_EC09, fapi2::TARGET_TYPE_CORE, 0x09 }, - { fapi2::ATTR_PG_EC10, fapi2::TARGET_TYPE_CORE, 0x0A }, - { fapi2::ATTR_PG_EC11, fapi2::TARGET_TYPE_CORE, 0x0B }, - { fapi2::ATTR_PG_EC12, fapi2::TARGET_TYPE_CORE, 0x0C }, - { fapi2::ATTR_PG_EC13, fapi2::TARGET_TYPE_CORE, 0x0D }, - { fapi2::ATTR_PG_EC14, fapi2::TARGET_TYPE_CORE, 0x0E }, - { fapi2::ATTR_PG_EC15, fapi2::TARGET_TYPE_CORE, 0x0F }, - { fapi2::ATTR_PG_EC16, fapi2::TARGET_TYPE_CORE, 0x10 }, - { fapi2::ATTR_PG_EC17, fapi2::TARGET_TYPE_CORE, 0x11 }, - { fapi2::ATTR_PG_EC18, fapi2::TARGET_TYPE_CORE, 0x12 }, - { fapi2::ATTR_PG_EC19, fapi2::TARGET_TYPE_CORE, 0x13 }, - { fapi2::ATTR_PG_EC20, fapi2::TARGET_TYPE_CORE, 0x14 }, - { fapi2::ATTR_PG_EC21, fapi2::TARGET_TYPE_CORE, 0x15 }, - { fapi2::ATTR_PG_EC22, fapi2::TARGET_TYPE_CORE, 0x16 }, - { fapi2::ATTR_PG_EC23, fapi2::TARGET_TYPE_CORE, 0x17 } -}; - -extern uint32_t CHIPLET_PG_ARRAY_ENTRIES; - -#pragma pack(8) //Start of packing to 8byte boundary -typedef struct { - fapi2attr::SystemAttributes_t G_system_attrs; - fapi2attr::ProcChipAttributes_t G_proc_chip_attrs; - fapi2attr::PervAttributes_t G_perv_attrs; - fapi2attr::CoreAttributes_t G_core_attrs; - fapi2attr::EXAttributes_t G_ex_attrs; - fapi2attr::EQAttributes_t G_eq_attrs; -} G_sbe_attrs_t; -#pragma pack()//End of packing to 8byte boundary - -#endif // __FAPI2_PPE_TARGET_PG_ATTR__ diff --git a/hwpf/include/plat/plat_target_utils.H b/hwpf/include/plat/plat_target_utils.H index ec34813c..6c84eaf5 100644 --- a/hwpf/include/plat/plat_target_utils.H +++ b/hwpf/include/plat/plat_target_utils.H @@ -1,11 +1,11 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: $ */ +/* $Source: hwpf/include/plat/plat_target_utils.H $ */ /* */ -/* OpenPOWER HostBoot Project */ +/* OpenPOWER sbe Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2014 */ +/* Contributors Listed Below - COPYRIGHT 2012,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -30,12 +30,22 @@ #ifndef __FAPI2_PLAT_TARGET_UTIL__ #define __FAPI2_PLAT_TARGET_UTIL__ +#pragma pack(8) //Start of packing to 8byte boundary + typedef struct { + fapi2attr::SystemAttributes_t G_system_attrs; + fapi2attr::ProcChipAttributes_t G_proc_chip_attrs; + fapi2attr::PervAttributes_t G_perv_attrs; + fapi2attr::CoreAttributes_t G_core_attrs; + fapi2attr::EXAttributes_t G_ex_attrs; + fapi2attr::EQAttributes_t G_eq_attrs; + } G_sbe_attrs_t; +#pragma pack()//End of packing to 8byte boundary + // // Platform Utility functions.. // namespace fapi2 { - /// @brief Function to initialize the G_targets vector based on partial good /// attributes ReturnCode plat_TargetsInit(); diff --git a/hwpf/src/plat/target.C b/hwpf/src/plat/target.C index c63af312..b1a7a7a6 100644 --- a/hwpf/src/plat/target.C +++ b/hwpf/src/plat/target.C @@ -25,12 +25,9 @@ #include <fapi2.H> -#include <plat_target_pg_attributes.H> #include <assert.h> #include <fapi2_target.H> - -uint32_t CHIPLET_PG_ARRAY_ENTRIES = sizeof(CHIPLET_PG_ARRAY) / - sizeof(chiplet_pg_entry_t); +#include <plat_target_utils.H> // Global Vector containing ALL targets. This structure is referenced by // fapi2::getChildren to produce the resultant returned vector from that @@ -54,228 +51,32 @@ namespace fapi2 ReturnCode current_err; #endif - - // Not a fan of the switch technique; I would prefer an array lookup - // but the attritute lookup is done via compile time macros that are - // resolved to attribute Ids (hashes). - fapi2::ReturnCode plat_PervPGTargets(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_target, - const fapi2::TargetTypes_t i_chiplet_num, + fapi2::ReturnCode plat_PervPGTargets(const fapi2::Target<fapi2::TARGET_TYPE_PERV> & i_target, bool & o_present) { - o_present = false; - uint16_t attr_value = 0; - switch (i_chiplet_num) - { - case 0x00: // Nop - break; - case 0x01: - FAPI_ATTR_GET(ATTR_PG_PRV, i_target, *(&attr_value)); - FAPI_DBG("ATTR_PG_PRV value = %x", attr_value); - break; - case 0x02: - FAPI_ATTR_GET(ATTR_PG_N0, i_target, attr_value); - FAPI_DBG("ATTR_PG_N0 value = %x", attr_value); - break; - case 0x03: - FAPI_ATTR_GET(ATTR_PG_N1, i_target, attr_value); - FAPI_DBG("ATTR_PG_N1 value = %x", attr_value); - break; - case 0x04: - FAPI_ATTR_GET(ATTR_PG_N2, i_target, attr_value); - FAPI_DBG("ATTR_PG_N2 value = %x", attr_value); - break; - case 0x05: - FAPI_ATTR_GET(ATTR_PG_N3, i_target, attr_value); - FAPI_DBG("ATTR_PG_N0 value = %x", attr_value); - break; - case 0x06: - FAPI_ATTR_GET(ATTR_PG_XB, i_target, attr_value); - FAPI_DBG("ATTR_PG_XB value = %x", attr_value); - break; - case 0x07: - FAPI_ATTR_GET(ATTR_PG_MC01, i_target, attr_value); - FAPI_DBG("ATTR_PG_MC01 value = %x", attr_value); - break; - case 0x08: - FAPI_ATTR_GET(ATTR_PG_MC23, i_target, attr_value); - FAPI_DBG("ATTR_PG_MC23 value = %x", attr_value); - break; - case 0x09: - FAPI_ATTR_GET(ATTR_PG_OB0, i_target, attr_value); - FAPI_DBG("ATTR_PG_OB0 value = %x", attr_value); - break; - case 0x0A: - FAPI_ATTR_GET(ATTR_PG_OB1, i_target, attr_value); - FAPI_DBG("ATTR_PG_OB1 value = %x", attr_value); - break; - case 0x0B: - FAPI_ATTR_GET(ATTR_PG_OB2, i_target, attr_value); - FAPI_DBG("ATTR_PG_OB2 value = %x", attr_value); - break; - case 0x0C: - FAPI_ATTR_GET(ATTR_PG_OB3, i_target, attr_value); - FAPI_DBG("ATTR_PG_OB3 value = %x", attr_value); - break; - case 0x0D: - FAPI_ATTR_GET(ATTR_PG_PCI0, i_target, attr_value); - FAPI_DBG("ATTR_PG_PCI0 value = %x", attr_value); - break; - case 0x0E: - FAPI_ATTR_GET(ATTR_PG_PCI1, i_target, attr_value); - FAPI_DBG("ATTR_PG_PCI1 value = %x", attr_value); - break; - case 0x0F: - FAPI_ATTR_GET(ATTR_PG_PCI2, i_target, attr_value); - FAPI_DBG("ATTR_PG_PCI2 value = %x", attr_value); - break; - case 0x10: - FAPI_ATTR_GET(ATTR_PG_EQ0, i_target, attr_value); - FAPI_DBG("ATTR_PG_EQ0 value = %x", attr_value); - break; - case 0x11: - FAPI_ATTR_GET(ATTR_PG_EQ1, i_target, attr_value); - FAPI_DBG("ATTR_PG_EQ1 value = %x", attr_value); - break; - case 0x12: - FAPI_ATTR_GET(ATTR_PG_EQ2, i_target, attr_value); - FAPI_DBG("ATTR_PG_EQ2 value = %x", attr_value); - break; - case 0x13: - FAPI_ATTR_GET(ATTR_PG_EQ3, i_target, attr_value); - FAPI_DBG("ATTR_PG_EQ3 value = %x", attr_value); - break; - case 0x14: - FAPI_ATTR_GET(ATTR_PG_EQ4, i_target, attr_value); - FAPI_DBG("ATTR_PG_EQ4 value = %x", attr_value); - break; - case 0x15: - FAPI_ATTR_GET(ATTR_PG_EQ5, i_target, attr_value); - FAPI_DBG("ATTR_PG_EQ5 value = %x", attr_value); - break; - case 0x20: - FAPI_ATTR_GET(ATTR_PG_EC00, i_target, attr_value); - FAPI_DBG("ATTR_PG_EC00 value = %x", attr_value); - break; - case 0x21: - FAPI_ATTR_GET(ATTR_PG_EC01, i_target, attr_value); - FAPI_DBG("ATTR_PG_EC01 value = %x", attr_value); - break; - case 0x22: - FAPI_ATTR_GET(ATTR_PG_EC02, i_target, attr_value); - FAPI_DBG("ATTR_PG_EC02 value = %x", attr_value); - break; - case 0x23: - FAPI_ATTR_GET(ATTR_PG_EC03, i_target, attr_value); - FAPI_DBG("ATTR_PG_EC03 value = %x", attr_value); - break; - case 0x24: - FAPI_ATTR_GET(ATTR_PG_EC04, i_target, attr_value); - FAPI_DBG("ATTR_PG_EC04 value = %x", attr_value); - break; - case 0x25: - FAPI_ATTR_GET(ATTR_PG_EC05, i_target, attr_value); - FAPI_DBG("ATTR_PG_EC05 value = %x", attr_value); - break; - case 0x26: - FAPI_ATTR_GET(ATTR_PG_EC06, i_target, attr_value); - FAPI_DBG("ATTR_PG_EC06 value = %x", attr_value); - break; - case 0x27: - FAPI_ATTR_GET(ATTR_PG_EC07, i_target, attr_value); - FAPI_DBG("ATTR_PG_EC07 value = %x", attr_value); - break; - case 0x28: - FAPI_ATTR_GET(ATTR_PG_EC08, i_target, attr_value); - FAPI_DBG("ATTR_PG_EC08 value = %x", attr_value); - break; - case 0x29: - FAPI_ATTR_GET(ATTR_PG_EC09, i_target, attr_value); - FAPI_DBG("ATTR_PG_EC09 value = %x", attr_value); - break; - case 0x2A: - FAPI_ATTR_GET(ATTR_PG_EC10, i_target, attr_value); - FAPI_DBG("ATTR_PG_EC10 value = %x", attr_value); - break; - case 0x2B: - FAPI_ATTR_GET(ATTR_PG_EC11, i_target, attr_value); - FAPI_DBG("ATTR_PG_EC11 value = %x", attr_value); - break; - case 0x2C: - FAPI_ATTR_GET(ATTR_PG_EC12, i_target, attr_value); - FAPI_DBG("ATTR_PG_EC12 value = %x", attr_value); - break; - case 0x2D: - FAPI_ATTR_GET(ATTR_PG_EC13, i_target, attr_value); - FAPI_DBG("ATTR_PG_EC13 value = %x", attr_value); - break; - case 0x2E: - FAPI_ATTR_GET(ATTR_PG_EC14, i_target, attr_value); - FAPI_DBG("ATTR_PG_EC14 value = %x", attr_value); - break; - case 0x2F: - FAPI_ATTR_GET(ATTR_PG_EC15, i_target, attr_value); - FAPI_DBG("ATTR_PG_EC15 value = %x", attr_value); - break; - case 0x30: - FAPI_ATTR_GET(ATTR_PG_EC16, i_target, attr_value); - FAPI_DBG("ATTR_PG_EC16 value = %x", attr_value); - break; - case 0x31: - FAPI_ATTR_GET(ATTR_PG_EC17, i_target, attr_value); - FAPI_DBG("ATTR_PG_EC17 value = %x", attr_value); - break; - case 0x32: - FAPI_ATTR_GET(ATTR_PG_EC18, i_target, attr_value); - FAPI_DBG("ATTR_PG_EC18 value = %x", attr_value); - break; - case 0x33: - FAPI_ATTR_GET(ATTR_PG_EC19, i_target, attr_value); - FAPI_DBG("ATTR_PG_EC19 value = %x", attr_value); - break; - case 0x34: - FAPI_ATTR_GET(ATTR_PG_EC20, i_target, attr_value); - FAPI_DBG("ATTR_PG_EC20 value = %x", attr_value); - break; - case 0x35: - FAPI_ATTR_GET(ATTR_PG_EC21, i_target, attr_value); - FAPI_DBG("ATTR_PG_EC21 value = %x", attr_value); - break; - case 0x36: - FAPI_ATTR_GET(ATTR_PG_EC22, i_target, attr_value); - FAPI_DBG("ATTR_PG_EC22 value = %x", attr_value); - break; - case 0x37: - FAPI_ATTR_GET(ATTR_PG_EC23, i_target, attr_value); - FAPI_DBG("ATTR_PG_EC23 value = %x", attr_value); - break; - default: - FAPI_ERR("PervPGTargets: invalid chiplet number %u", i_chiplet_num); - } - - if (attr_value & 0xC000) + uint32_t attr_value = 0; + FAPI_ATTR_GET(fapi2::ATTR_PG, + i_target, + attr_value); + FAPI_DBG("Target: 0x%08X, ATTR_PG value = %x", static_cast<uint32_t>(i_target.get().value), attr_value); + if (0 == (attr_value & 0x1000)) { o_present = true; } - return fapi2::FAPI2_RC_SUCCESS; - } /// @brief Function to determine if pervsaive target within a chip is /// present and, thus, considered functional per PG attributes - template<fapi2::TargetType K> fapi2::ReturnCode - plat_TargetPresent( fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> & i_chip_target, - fapi2::Target<K> & i_chiplet_target, + plat_TargetPresent( fapi2::Target<fapi2::TARGET_TYPE_PERV> & i_chiplet_target, bool & b_present) { // Find the PERV target number in the partial good initialization // array - fapi2::ChipletNumber_t chiplet_number = i_chiplet_target.getChipletNumber(); - - FAPI_TRY(plat_PervPGTargets(i_chip_target, chiplet_number, b_present)); + FAPI_TRY(plat_PervPGTargets(i_chiplet_target, b_present)); if (b_present) { @@ -285,7 +86,7 @@ namespace fapi2 else { FAPI_DBG("Perv target NOT present (nor functional): chiplet_number = %d", - chiplet_number); + i_chiplet_target.getChipletNumber()); } FAPI_DBG("Target present = %u, Target functional = %u", @@ -350,7 +151,7 @@ fapi_try_exit: // Determine if the chiplet is present and, thus, functional // via partial good attributes - FAPI_TRY(plat_TargetPresent(chip_target, target_name, b_present)); + FAPI_TRY(plat_TargetPresent(target_name, b_present)); G_vec_targets.at(l_beginning_offset+i) = revle32((fapi2::plat_target_handle_t)(target_name.get())); } @@ -363,12 +164,13 @@ fapi_try_exit: for (uint32_t i = 0; i < MCBIST_TARGET_COUNT; ++i) { fapi2::Target<fapi2::TARGET_TYPE_MCBIST> target_name((fapi2::plat_target_handle_t)i); + fapi2::Target<fapi2::TARGET_TYPE_PERV> l_perv = target_name.getParent<fapi2::TARGET_TYPE_PERV>(); // Determine if the chiplet is present and, thus, functional // via partial good attributes - FAPI_TRY(plat_TargetPresent(chip_target, target_name, b_present)); + FAPI_TRY(plat_TargetPresent(l_perv, b_present)); - G_vec_targets.at(l_beginning_offset+i) = revle32((fapi2::plat_target_handle_t)(target_name.get())); + G_vec_targets.at(l_beginning_offset+i) = revle32((fapi2::plat_target_handle_t)(l_perv.get())); } @@ -383,7 +185,7 @@ fapi_try_exit: // Determine if the chiplet is present and, thus, functional // via partial good attributes - FAPI_TRY(plat_TargetPresent(chip_target, target_name, b_present)); + FAPI_TRY(plat_TargetPresent(target_name, b_present)); G_vec_targets.at(i) = revle32((fapi2::plat_target_handle_t)(target_name.get())); } @@ -395,12 +197,13 @@ fapi_try_exit: for (uint32_t i = 0; i < EQ_TARGET_COUNT; ++i) { fapi2::Target<fapi2::TARGET_TYPE_EQ> target_name((fapi2::plat_target_handle_t)i); + fapi2::Target<fapi2::TARGET_TYPE_PERV> l_perv = target_name.getParent<fapi2::TARGET_TYPE_PERV>(); // Determine if the chiplet is present and, thus, functional // via partial good attributes - FAPI_TRY(plat_TargetPresent(chip_target, target_name, b_present)); + FAPI_TRY(plat_TargetPresent(l_perv, b_present)); - G_vec_targets.at(l_beginning_offset+i) = revle32((fapi2::plat_target_handle_t)(target_name.get())); + G_vec_targets.at(l_beginning_offset+i) = revle32((fapi2::plat_target_handle_t)(l_perv.get())); } /* @@ -411,12 +214,13 @@ fapi_try_exit: for (uint32_t i = 0; i < CORE_TARGET_COUNT; ++i) { fapi2::Target<fapi2::TARGET_TYPE_CORE> target_name((fapi2::plat_target_handle_t)i); + fapi2::Target<fapi2::TARGET_TYPE_PERV> l_perv = target_name.getParent<fapi2::TARGET_TYPE_PERV>(); // Determine if the chiplet is present and, thus, functional // via partial good attributes - FAPI_TRY(plat_TargetPresent(chip_target, target_name, b_present)); + FAPI_TRY(plat_TargetPresent(l_perv, b_present)); - G_vec_targets.at(l_beginning_offset+i) = revle32((fapi2::plat_target_handle_t)(target_name.get())); + G_vec_targets.at(l_beginning_offset+i) = revle32((fapi2::plat_target_handle_t)(l_perv.get())); } /* @@ -428,15 +232,29 @@ fapi_try_exit: { fapi2::Target<fapi2::TARGET_TYPE_EX> target_name((fapi2::plat_target_handle_t)i); - // Check if at least one of the cores in the EX are good, if they - // are, set the EX present and functional - if((G_vec_targets.at(CORE_TARGET_OFFSET + (CORES_PER_EX * i))).fields.present || - (G_vec_targets.at(CORE_TARGET_OFFSET + (CORES_PER_EX * i) + 1)).fields.present) + fapi2::Target<fapi2::TARGET_TYPE_EQ> l_parent = target_name.getParent<fapi2::TARGET_TYPE_EQ>(); + + // Get the parent EQ's ATTR_PG + uint32_t l_eqAttrPg = 0; + FAPI_ATTR_GET(fapi2::ATTR_PG, l_parent.getParent<TARGET_TYPE_PERV>(), l_eqAttrPg); + + // Check if this EX's L2 and L3 regions are marked "good" + if(0 == (i % EX_PER_QUAD)) + { + // Bits 6 and 8 need to be 0 + l_eqAttrPg &= 0x0280; + } + else + { + // Bits 7 and 9 need to be 0 + l_eqAttrPg &= 0x0140; + } + + if(0 == l_eqAttrPg) { target_name.setPresent(); target_name.setFunctional(true); } - G_vec_targets.at(l_beginning_offset+i) = revle32((fapi2::plat_target_handle_t)(target_name.get())); } @@ -449,10 +267,24 @@ fapi_try_exit: { fapi2::Target<fapi2::TARGET_TYPE_MCS> target_name((fapi2::plat_target_handle_t)i); - // Check if both the MCBIST as well as the NEST chiplets for the MCS - // are present and functional - if((G_vec_targets.at(MCBIST_TARGET_OFFSET + (i / MCS_PER_MCBIST))).fields.present && - (plat_getTargetHandleByChipletNumber(N3_CHIPLET - (MCS_PER_MCBIST * (i / MCS_PER_MCBIST)))).fields.present) + fapi2::Target<fapi2::TARGET_TYPE_PERV> l_nestTarget((plat_getTargetHandleByChipletNumber(N3_CHIPLET - (MCS_PER_MCBIST * (i / MCS_PER_MCBIST))))); + + uint32_t l_attrPg = 0; + + FAPI_ATTR_GET(fapi2::ATTR_PG, l_nestTarget, l_attrPg); + + if(0 == (i / MCS_PER_MCBIST)) + { + // Bit 10 needs to be 0 for MCS 0, 1 + l_attrPg &= 0x0020; + } + else + { + // Bit 9 needs to be 0 for MCS 2, 3 + l_attrPg &= 0x0040; + } + + if(0 == l_attrPg) { target_name.setPresent(); target_name.setFunctional(true); diff --git a/import/chips/p9/procedures/xml/attribute_info/pg_attributes.xml b/import/chips/p9/procedures/xml/attribute_info/pg_attributes.xml deleted file mode 100644 index 6fbf6b6e..00000000 --- a/import/chips/p9/procedures/xml/attribute_info/pg_attributes.xml +++ /dev/null @@ -1,680 +0,0 @@ -<!-- IBM_PROLOG_BEGIN_TAG --> -<!-- This is an automatically generated prolog. --> -<!-- --> -<!-- $Source: chips/p9/procedures/xml/attribute_info/pg_attributes.xml $ --> -<!-- --> -<!-- IBM CONFIDENTIAL --> -<!-- --> -<!-- EKB Project --> -<!-- --> -<!-- COPYRIGHT 2015 --> -<!-- [+] International Business Machines Corp. --> -<!-- --> -<!-- --> -<!-- The source code for this program is not published or otherwise --> -<!-- divested of its trade secrets, irrespective of what has been --> -<!-- deposited with the U.S. Copyright Office. --> -<!-- --> -<!-- IBM_PROLOG_END_TAG --> -<!-- pg_attributes.xml --> -<attributes> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_FSI</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for FSI chiplet. A 0 indicates a GOOD subregion. - bit 4: fsi0 - bit 5: fsi1 - bit 6: fsia - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_PRV</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Pervasive chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: net - bit 6: pib - bit 7: occ - bit 8: anperv - bit 14: pllnest - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_N0</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Nest0 chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: nx - bit 6: cxa0 - bit 7: pbioe0 - bit 8: pbioe1 - bit 9: pbioe2 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_N1</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Nest1 chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: mcd - bit 6: va - bit 7: pbioo0 - bit 8: pbioo1 - bit 9: mcs23 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_N2</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Nest2 chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: cxa1 - bit 6: pcis0 - bit 7: pcis1 - bit 8: pcis2 - bit 9: iopsi - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_N3</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Nest3 chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: pb - bit 6: br - bit 7: npu - bit 8: mm - bit 9: int - bit 10: mcs01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_XB</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for XBus chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: iox0 - bit 6: iox1 - bit 7: iox2 - bit 8: pbiox0 - bit 9: pbiox1 - bit 10: pbiox2 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_MC01</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for MC01 chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: mca01 - bit 6: iom01 - bit 7: iom23 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_MC23</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for MC23 chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: mca23 - bit 6: iom45 - bit 7: iom67 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_OB0</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for OBus0 chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: pbiooa0 - bit 6: ioo0 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_OB1</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for OBus1 chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: pbiooa1 - bit 6: ioo1 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_OB2</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for OBus2 chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: pbiooa2 - bit 6: ioo2 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_OB3</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for OBus3 chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: pbiooa3 - bit 6: ioo3 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_PCI0</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for PCI0 chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: pci00 - bit 6: iopci0 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_PCI1</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for PCI1 chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: pci11 - bit 6: pci12 - bit 7: iopci1 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_PCI2</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for PCI2 chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: pci23 - bit 6: pci24 - bit 7: pci25 - bit 8: iopci2 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EQ0</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for EQ0 chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: eqpb - bit 6: l30 - bit 7: l31 - bit 8: l20 - bit 9: l21 - bit 10: an - bit 13: refr - bit 14: dpll - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EQ1</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for EQ1 chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: eqpb - bit 6: l30 - bit 7: l31 - bit 8: l20 - bit 9: l21 - bit 10: an - bit 13: refr - bit 14: dpll - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EQ2</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for EQ2 chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: eqpb - bit 6: l30 - bit 7: l31 - bit 8: l20 - bit 9: l21 - bit 10: an - bit 13: refr - bit 14: dpll - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EQ3</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for EQ3 chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: eqpb - bit 6: l30 - bit 7: l31 - bit 8: l20 - bit 9: l21 - bit 10: an - bit 13: refr - bit 14: dpll - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EQ4</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for EQ4 chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: eqpb - bit 6: l30 - bit 7: l31 - bit 8: l20 - bit 9: l21 - bit 10: an - bit 13: refr - bit 14: dpll - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EQ5</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for EQ5 chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: eqpb - bit 6: l30 - bit 7: l31 - bit 8: l20 - bit 9: l21 - bit 10: an - bit 13: refr - bit 14: dpll - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EC00</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Core (EC00) chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: c00 - bit 6: c01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EC01</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Core (EC01) chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: c00 - bit 6: c01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EC02</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Core (EC02) chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: c00 - bit 6: c01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EC03</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Core (EC03) chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: c00 - bit 6: c01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EC04</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Core (EC04) chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: c00 - bit 6: c01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EC05</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Core (EC05) chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: c00 - bit 6: c01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EC06</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Core (EC06) chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: c00 - bit 6: c01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EC07</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Core (EC07) chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: c00 - bit 6: c01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EC08</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Core (EC08) chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: c00 - bit 6: c01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EC09</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Core (EC09) chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: c00 - bit 6: c01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EC10</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Core (EC10) chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: c00 - bit 6: c01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EC11</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Core (EC11) chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: c00 - bit 6: c01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EC12</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Core (EC12) chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: c00 - bit 6: c01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EC13</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Core (EC13) chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: c00 - bit 6: c01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EC14</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Core (EC14) chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: c00 - bit 6: c01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EC15</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Core (EC15) chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: c00 - bit 6: c01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EC16</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Core (EC16) chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: c00 - bit 6: c01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EC17</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Core (EC17) chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: c00 - bit 6: c01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EC18</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Core (EC18) chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: c00 - bit 6: c01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EC19</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Core (EC19) chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: c00 - bit 6: c01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EC20</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Core (EC20) chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: c00 - bit 6: c01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EC21</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Core (EC21) chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: c00 - bit 6: c01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EC22</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Core (EC22) chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: c00 - bit 6: c01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_PG_EC23</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Partial good mask for Core (EC23) chiplet. A 0 indicates a GOOD subregion. - bit 3: vital - bit 4: perv - bit 5: c00 - bit 6: c01 - </description> - <valueType>uint16</valueType> - </attribute> - <!-- ********************************************************************* --> -</attributes> diff --git a/sbe/image/Makefile b/sbe/image/Makefile index 562701e5..bf1ba77e 100644 --- a/sbe/image/Makefile +++ b/sbe/image/Makefile @@ -300,7 +300,6 @@ buildInfo: #Create an obj directory if needed $(LINK_OBJS) $(OBJS) $(OBJS:.o=.d) $(OBJDIR)/base_sbe_fixed.o $(OBJDIR)/base_sbe_fixed.d: | $(OBJDIR) -ATTRFILES += $(IMPORT_XML_DIR)/attribute_info/pg_attributes.xml ATTRFILES += $(IMPORT_XML_DIR)/attribute_info/pervasive_attributes.xml # TODO via RTC 142708 # Workaound for ATTR_CHIP_UNIT_POS. Remove Mirror_WA_attributes.xml once fapi diff --git a/tools/image/sbe_default_tool.c b/tools/image/sbe_default_tool.c index aca20f14..b61efeb5 100644 --- a/tools/image/sbe_default_tool.c +++ b/tools/image/sbe_default_tool.c @@ -1,3 +1,27 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: tools/image/sbe_default_tool.c $ */ +/* */ +/* OpenPOWER sbe Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ /// \file sbe_default_tool.c /// \brief P9-XIP image setter tool for attributes in fixed section /// @@ -110,35 +134,35 @@ void setAttribute(void* image, const char* attribute, unsigned int index, uint64 if(item.iv_toc->iv_type == P9_XIP_UINT8) { - *((uint8_t*)thePointer + (index * sizeof(uint8_t))) = (uint8_t)val; + *((uint8_t*)thePointer + index) = (uint8_t)val; } else if(item.iv_toc->iv_type == P9_XIP_INT8) { - *((int8_t*)thePointer + (index * sizeof(int8_t))) = (int8_t)val; + *((int8_t*)thePointer + index) = (int8_t)val; } else if(item.iv_toc->iv_type == P9_XIP_UINT16) { - *((uint16_t*)thePointer + (index * sizeof(uint16_t))) = htobe16((uint16_t)val); + *((uint16_t*)thePointer + index) = htobe16((uint16_t)val); } else if(item.iv_toc->iv_type == P9_XIP_INT16) { - *((int16_t*)thePointer + (index * sizeof(int16_t))) = htobe16((int16_t)val); + *((int16_t*)thePointer + index) = htobe16((int16_t)val); } else if(item.iv_toc->iv_type == P9_XIP_UINT32) { - *((uint32_t*)thePointer + (index * sizeof(uint32_t))) = htobe32((uint32_t)val); + *((uint32_t*)thePointer + index) = htobe32((uint32_t)val); } else if(item.iv_toc->iv_type == P9_XIP_INT32) { - *((int32_t*)thePointer + (index * sizeof(int32_t))) = htobe32((int32_t)val); + *((int32_t*)thePointer + index) = htobe32((int32_t)val); } else if(item.iv_toc->iv_type == P9_XIP_UINT64) { - *((uint64_t*)thePointer + (index * sizeof(uint64_t))) = htobe64((uint64_t)val); + *((uint64_t*)thePointer + index) = htobe64((uint64_t)val); } else if(item.iv_toc->iv_type == P9_XIP_INT64) { - *((int64_t*)thePointer + (index * sizeof(int64_t))) = htobe64((int64_t)val); + *((int64_t*)thePointer + index) = htobe64((int64_t)val); } else { fprintf(stderr, "sbe_default_tool: type not available"); @@ -181,38 +205,38 @@ uint64_t getAttribute(void* image, const char* attribute, unsigned int index) { if(item.iv_toc->iv_type == P9_XIP_UINT8) { - val = *((uint8_t*)thePointer + (index * sizeof(uint8_t))); + val = *((uint8_t*)thePointer + index); } else if(item.iv_toc->iv_type == P9_XIP_INT8) { - val = *((int8_t*)thePointer + (index * sizeof(int8_t))); + val = *((int8_t*)thePointer + index); val &= 0xFF; } else if(item.iv_toc->iv_type == P9_XIP_UINT16) { - val = htobe16(*((uint16_t*)thePointer + (index * sizeof(uint16_t)))); + val = htobe16(*((uint16_t*)thePointer + index)); } else if(item.iv_toc->iv_type == P9_XIP_INT16) { - val = htobe16(*((int16_t*)thePointer + (index * sizeof(int16_t)))); + val = htobe16(*((int16_t*)thePointer + index)); val &= 0xFFFF; } else if(item.iv_toc->iv_type == P9_XIP_UINT32) { - val = htobe32(*((uint32_t*)thePointer + (index * sizeof(uint32_t)))); + val = htobe32(*((uint32_t*)thePointer + (index))); } else if(item.iv_toc->iv_type == P9_XIP_INT32) { - val = htobe32(*((int32_t*)thePointer + (index * sizeof(int32_t)))); + val = htobe32(*((int32_t*)thePointer + index)); val &= 0xFFFFFFFF; } else if(item.iv_toc->iv_type == P9_XIP_UINT64) { - val = htobe64(*((uint64_t*)thePointer + (index * sizeof(uint64_t)))); + val = htobe64(*((uint64_t*)thePointer + index)); } else if(item.iv_toc->iv_type == P9_XIP_INT64) { - val = htobe64(*((int64_t*)thePointer + (index * sizeof(int64_t)))); + val = htobe64(*((int64_t*)thePointer + index)); } else { fprintf(stderr, "sbe_default_tool: type not available"); |