diff options
| author | Anusha Reddy Rangareddygari <anusrang@in.ibm.com> | 2016-05-04 12:28:25 +0200 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2016-05-05 01:18:54 -0400 |
| commit | c90202f245da58039853e8193d028fe9eb483f9f (patch) | |
| tree | ce44d9381355deadad2bc53c8f6a7dad9776912d | |
| parent | ccade972b384204fd6f0be112d2715ecd2cd5be8 (diff) | |
| download | talos-sbe-c90202f245da58039853e8193d028fe9eb483f9f.tar.gz talos-sbe-c90202f245da58039853e8193d028fe9eb483f9f.zip | |
IPL optimized codes
Change-Id: I60bd09be22ae75561667253204ffd33c6fdeb58d
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24060
Tested-by: Jenkins Server
Tested-by: PPE CI
Tested-by: Hostboot CI
Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Reviewed-by: Sangeetha T S <sangeet2@in.ibm.com>
Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24061
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
8 files changed, 558 insertions, 946 deletions
diff --git a/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.C b/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.C index f2917668..3faaa0c8 100644 --- a/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.C +++ b/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.C @@ -88,11 +88,14 @@ fapi2::ReturnCode p9_perv_sbe_cmn_array_init_module(const fapi2::buffer<uint16_t> l_scan_count; fapi2::buffer<uint16_t> l_misr_a_value; fapi2::buffer<uint16_t> l_misr_b_value; + fapi2::buffer<uint16_t> l_regions; fapi2::buffer<uint64_t> l_data64; int l_timeout = 0; fapi2::buffer<uint64_t> l_data64_clk_region; FAPI_INF("Entering ..."); + i_regions.extractToRight<5, 11>(l_regions); + FAPI_DBG("Drop vital fence (moved to arrayinit from sacn0 module)"); //Setting CPLT_CTRL1 register value l_data64.flush<0>(); @@ -101,17 +104,11 @@ fapi2::ReturnCode p9_perv_sbe_cmn_array_init_module(const FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_CPLT_CTRL1_CLEAR, l_data64)); FAPI_DBG("Start pervasive regions Clocks"); - l_data64_clk_region.flush<0>(); //Setting CLK_REGION register value l_data64_clk_region.insertFromRight<PERV_1_CLK_REGION_CLOCK_CMD, PERV_1_CLK_REGION_CLOCK_CMD_LEN> (0b01); //CLK_REGION.CLOCK_CMD = 0b01 l_data64_clk_region.setBit<4>(); //CLK_REGION.CLOCK_REGION_PERV = 1 - //CLK_REGION.SEL_THOLD_SL = 1 - l_data64_clk_region.setBit<PERV_1_CLK_REGION_SEL_THOLD_SL>(); - //CLK_REGION.SEL_THOLD_NSL = 1 - l_data64_clk_region.setBit<PERV_1_CLK_REGION_SEL_THOLD_NSL>(); - //CLK_REGION.SEL_THOLD_ARY = 1 - l_data64_clk_region.setBit<PERV_1_CLK_REGION_SEL_THOLD_ARY>(); + l_data64_clk_region.setBit<48, 3>(); //CLK_REGION.SEL_THOLD_ALL = 0b111 FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_CLK_REGION, l_data64_clk_region)); @@ -126,17 +123,11 @@ fapi2::ReturnCode p9_perv_sbe_cmn_array_init_module(const FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_SPA_MASK, 0xFFFFFFFFFFFFFFFF)); FAPI_DBG("Stop Pervasive regions clocks"); - l_data64_clk_region.flush<0>(); //Setting CLK_REGION register value l_data64_clk_region.insertFromRight<PERV_1_CLK_REGION_CLOCK_CMD, PERV_1_CLK_REGION_CLOCK_CMD_LEN> (0b10); //CLK_REGION.CLOCK_CMD = 0b10 l_data64_clk_region.setBit<4>(); //CLK_REGION.CLOCK_REGION_PERV = 1 - //CLK_REGION.SEL_THOLD_SL = 1 - l_data64_clk_region.setBit<PERV_1_CLK_REGION_SEL_THOLD_SL>(); - //CLK_REGION.SEL_THOLD_NSL = 1 - l_data64_clk_region.setBit<PERV_1_CLK_REGION_SEL_THOLD_NSL>(); - //CLK_REGION.SEL_THOLD_ARY = 1 - l_data64_clk_region.setBit<PERV_1_CLK_REGION_SEL_THOLD_ARY>(); + l_data64_clk_region.setBit<48, 3>(); //CLK_REGION.SEL_THOLD_ALL = 0b111 FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_CLK_REGION, l_data64_clk_region)); @@ -155,28 +146,7 @@ fapi2::ReturnCode p9_perv_sbe_cmn_array_init_module(const l_data64.writeBit<PERV_1_BIST_TC_SRAM_ABIST_MODE_DC>(i_select_sram); //BIST.TC_EDRAM_ABIST_MODE_DC = i_select_edram l_data64.writeBit<PERV_1_BIST_TC_EDRAM_ABIST_MODE_DC>(i_select_edram); - //BIST.BIST_PERV = i_regions.getBit<5>() - l_data64.writeBit<4>(i_regions.getBit<5>()); - //BIST.BIST_UNIT1 = i_regions.getBit<6>() - l_data64.writeBit<5>(i_regions.getBit<6>()); - //BIST.BIST_UNIT2 = i_regions.getBit<7>() - l_data64.writeBit<6>(i_regions.getBit<7>()); - //BIST.BIST_UNIT3 = i_regions.getBit<8>() - l_data64.writeBit<7>(i_regions.getBit<8>()); - //BIST.BIST_UNIT4 = i_regions.getBit<9>() - l_data64.writeBit<8>(i_regions.getBit<9>()); - //BIST.BIST_UNIT5 = i_regions.getBit<10>() - l_data64.writeBit<9>(i_regions.getBit<10>()); - //BIST.BIST_UNIT6 = i_regions.getBit<11>() - l_data64.writeBit<10>(i_regions.getBit<11>()); - //BIST.BIST_UNIT7 = i_regions.getBit<12>() - l_data64.writeBit<11>(i_regions.getBit<12>()); - //BIST.BIST_UNIT8 = i_regions.getBit<13>() - l_data64.writeBit<12>(i_regions.getBit<13>()); - //BIST.BIST_UNIT9 = i_regions.getBit<14>() - l_data64.writeBit<13>(i_regions.getBit<14>()); - //BIST.BIST_UNIT10 = i_regions.getBit<15>() - l_data64.writeBit<14>(i_regions.getBit<15>()); + l_data64.insertFromRight<4, 11>(l_regions); //BIST.BIST_ALL_UNITS = l_regions FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_BIST, l_data64)); FAPI_DBG("l_data64 value:%#018lX", l_data64); @@ -184,62 +154,17 @@ fapi2::ReturnCode p9_perv_sbe_cmn_array_init_module(const //Setting CLK_REGION register value FAPI_TRY(fapi2::getScom(i_target_chiplets, PERV_CLK_REGION, l_data64_clk_region)); - //CLK_REGION.CLOCK_REGION_PERV = i_regions.getBit<5>() - l_data64_clk_region.writeBit<4>(i_regions.getBit<5>()); - //CLK_REGION.CLOCK_REGION_UNIT1 = i_regions.getBit<6>() - l_data64_clk_region.writeBit<5>(i_regions.getBit<6>()); - //CLK_REGION.CLOCK_REGION_UNIT2 = i_regions.getBit<7>() - l_data64_clk_region.writeBit<6>(i_regions.getBit<7>()); - //CLK_REGION.CLOCK_REGION_UNIT3 = i_regions.getBit<8>() - l_data64_clk_region.writeBit<7>(i_regions.getBit<8>()); - //CLK_REGION.CLOCK_REGION_UNIT4 = i_regions.getBit<9>() - l_data64_clk_region.writeBit<8>(i_regions.getBit<9>()); - //CLK_REGION.CLOCK_REGION_UNIT5 = i_regions.getBit<10>() - l_data64_clk_region.writeBit<9>(i_regions.getBit<10>()); - //CLK_REGION.CLOCK_REGION_UNIT6 = i_regions.getBit<11>() - l_data64_clk_region.writeBit<10>(i_regions.getBit<11>()); - //CLK_REGION.CLOCK_REGION_UNIT7 = i_regions.getBit<12>() - l_data64_clk_region.writeBit<11>(i_regions.getBit<12>()); - //CLK_REGION.CLOCK_REGION_UNIT8 = i_regions.getBit<13>() - l_data64_clk_region.writeBit<12>(i_regions.getBit<13>()); - //CLK_REGION.CLOCK_REGION_UNIT9 = i_regions.getBit<14>() - l_data64_clk_region.writeBit<13>(i_regions.getBit<14>()); - //CLK_REGION.CLOCK_REGION_UNIT10 = i_regions.getBit<15>() - l_data64_clk_region.writeBit<14>(i_regions.getBit<15>()); - //CLK_REGION.SEL_THOLD_SL = 1 - l_data64_clk_region.setBit<PERV_1_CLK_REGION_SEL_THOLD_SL>(); - //CLK_REGION.SEL_THOLD_NSL = 1 - l_data64_clk_region.setBit<PERV_1_CLK_REGION_SEL_THOLD_NSL>(); - //CLK_REGION.SEL_THOLD_ARY = 1 - l_data64_clk_region.setBit<PERV_1_CLK_REGION_SEL_THOLD_ARY>(); + //CLK_REGION.CLOCK_REGION_ALL_UNITS = l_regions + l_data64_clk_region.insertFromRight<4, 11>(l_regions); + l_data64_clk_region.setBit<48, 3>(); //CLK_REGION.SEL_THOLD_ALL = 0b111 FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_CLK_REGION, l_data64_clk_region)); FAPI_DBG("Drop Region fences"); //Setting CPLT_CTRL1 register value l_data64.flush<0>(); - l_data64.writeBit<PERV_1_CPLT_CTRL1_TC_PERV_REGION_FENCE> - (i_regions.getBit<5>()); //CPLT_CTRL1.TC_PERV_REGION_FENCE = i_regions.getBit<5>() - //CPLT_CTRL1.TC_REGION1_FENCE = i_regions.getBit<6>() - l_data64.writeBit<5>(i_regions.getBit<6>()); - //CPLT_CTRL1.TC_REGION2_FENCE = i_regions.getBit<7>() - l_data64.writeBit<6>(i_regions.getBit<7>()); - //CPLT_CTRL1.TC_REGION3_FENCE = i_regions.getBit<8>() - l_data64.writeBit<PERV_1_CPLT_CTRL1_TC_REGION3_FENCE>(i_regions.getBit<8>()); - //CPLT_CTRL1.TC_REGION4_FENCE = i_regions.getBit<9>() - l_data64.writeBit<8>(i_regions.getBit<9>()); - //CPLT_CTRL1.TC_REGION5_FENCE = i_regions.getBit<10>() - l_data64.writeBit<9>(i_regions.getBit<10>()); - //CPLT_CTRL1.TC_REGION6_FENCE = i_regions.getBit<11>() - l_data64.writeBit<10>(i_regions.getBit<11>()); - //CPLT_CTRL1.TC_REGION7_FENCE = i_regions.getBit<12>() - l_data64.writeBit<11>(i_regions.getBit<12>()); - //CPLT_CTRL1.UNUSED_12B = i_regions.getBit<13>() - l_data64.writeBit<PERV_1_CPLT_CTRL1_UNUSED_12B>(i_regions.getBit<13>()); - //CPLT_CTRL1.UNUSED_13B = i_regions.getBit<14>() - l_data64.writeBit<PERV_1_CPLT_CTRL1_UNUSED_13B>(i_regions.getBit<14>()); - //CPLT_CTRL1.UNUSED_14B = i_regions.getBit<15>() - l_data64.writeBit<PERV_1_CPLT_CTRL1_UNUSED_14B>(i_regions.getBit<15>()); + //CPLT_CTRL1.TC_ALL_REGIONS_FENCE = l_regions + l_data64.insertFromRight<4, 11>(l_regions); FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_CPLT_CTRL1_CLEAR, l_data64)); FAPI_DBG("Setup: loopcount , OPCG engine start ABIST, run-N mode"); @@ -338,12 +263,12 @@ fapi_try_exit: /// @brief Region value settings /// -/// @param[in] i_target_chiplet Reference to TARGET_TYPE_PERV target -/// @param[in] i_regions_value regions except vital and pll -/// @param[out] o_regions_value regions value +/// @param[in] i_target_chip Reference to TARGET_TYPE_PERV target ATTR_PG of the corresponding chiplet +/// @param[in] i_regions_value regions except vital and pll +/// @param[out] o_regions_value regions value /// @return FAPI2_RC_SUCCESS if success, else error code. fapi2::ReturnCode p9_perv_sbe_cmn_regions_setup_16(const - fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet, + fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chip, const fapi2::buffer<uint16_t> i_regions_value, fapi2::buffer<uint16_t>& o_regions_value) { @@ -353,7 +278,7 @@ fapi2::ReturnCode p9_perv_sbe_cmn_regions_setup_16(const FAPI_INF("Entering ..."); FAPI_DBG("Reading ATTR_PG"); - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_chiplet, l_read_attr)); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_chip, l_read_attr)); FAPI_DBG("ATTR_PG Value : %#018lX", l_read_attr); FAPI_DBG("i_regions_value input from calling function: %#018lX", @@ -448,10 +373,15 @@ fapi2::ReturnCode p9_perv_sbe_cmn_scan0_module(const const fapi2::buffer<uint16_t> i_regions, const fapi2::buffer<uint16_t> i_scan_types) { + fapi2::buffer<uint16_t> l_regions; + fapi2::buffer<uint16_t> l_scan_types; fapi2::buffer<uint64_t> l_data64; int l_timeout = 0; FAPI_INF("Entering ..."); + i_regions.extractToRight<5, 11>(l_regions); + i_scan_types.extractToRight<4, 12>(l_scan_types); + FAPI_DBG("raise Vital clock region fence"); //Setting CPLT_CTRL1 register value l_data64.flush<0>(); @@ -462,103 +392,24 @@ fapi2::ReturnCode p9_perv_sbe_cmn_scan0_module(const FAPI_DBG("Raise region fences for scanned regions"); //Setting CPLT_CTRL1 register value l_data64.flush<0>(); - //CPLT_CTRL1.TC_PERV_REGION_FENCE = 1 - l_data64.setBit<PERV_1_CPLT_CTRL1_TC_PERV_REGION_FENCE>(); - l_data64.setBit<5>(); //CPLT_CTRL1.TC_REGION1_FENCE = 1 - l_data64.setBit<6>(); //CPLT_CTRL1.TC_REGION2_FENCE = 1 - //CPLT_CTRL1.TC_REGION3_FENCE = 1 - l_data64.setBit<PERV_1_CPLT_CTRL1_TC_REGION3_FENCE>(); - l_data64.setBit<8>(); //CPLT_CTRL1.TC_REGION4_FENCE = 1 - l_data64.setBit<9>(); //CPLT_CTRL1.TC_REGION5_FENCE = 1 - l_data64.setBit<10>(); //CPLT_CTRL1.TC_REGION6_FENCE = 1 - l_data64.setBit<11>(); //CPLT_CTRL1.TC_REGION7_FENCE = 1 - l_data64.setBit<PERV_1_CPLT_CTRL1_UNUSED_12B>(); //CPLT_CTRL1.UNUSED_12B = 1 - l_data64.setBit<PERV_1_CPLT_CTRL1_UNUSED_13B>(); //CPLT_CTRL1.UNUSED_13B = 1 - l_data64.setBit<PERV_1_CPLT_CTRL1_UNUSED_14B>(); //CPLT_CTRL1.UNUSED_14B = 1 + l_data64.setBit<4, 11>(); //CPLT_CTRL1.TC_ALL_REGIONS_FENCE = 0b11111111111 FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_CPLT_CTRL1_OR, l_data64)); FAPI_DBG("Setup all Clock Domains and Clock Types"); //Setting CLK_REGION register value FAPI_TRY(fapi2::getScom(i_target_chiplets, PERV_CLK_REGION, l_data64)); - //CLK_REGION.CLOCK_REGION_PERV = i_regions.getBit<5>() - l_data64.writeBit<4>(i_regions.getBit<5>()); - //CLK_REGION.CLOCK_REGION_UNIT1 = i_regions.getBit<6>() - l_data64.writeBit<5>(i_regions.getBit<6>()); - //CLK_REGION.CLOCK_REGION_UNIT2 = i_regions.getBit<7>() - l_data64.writeBit<6>(i_regions.getBit<7>()); - //CLK_REGION.CLOCK_REGION_UNIT3 = i_regions.getBit<8>() - l_data64.writeBit<7>(i_regions.getBit<8>()); - //CLK_REGION.CLOCK_REGION_UNIT4 = i_regions.getBit<9>() - l_data64.writeBit<8>(i_regions.getBit<9>()); - //CLK_REGION.CLOCK_REGION_UNIT5 = i_regions.getBit<10>() - l_data64.writeBit<9>(i_regions.getBit<10>()); - //CLK_REGION.CLOCK_REGION_UNIT6 = i_regions.getBit<11>() - l_data64.writeBit<10>(i_regions.getBit<11>()); - //CLK_REGION.CLOCK_REGION_UNIT7 = i_regions.getBit<12>() - l_data64.writeBit<11>(i_regions.getBit<12>()); - //CLK_REGION.CLOCK_REGION_UNIT8 = i_regions.getBit<13>() - l_data64.writeBit<12>(i_regions.getBit<13>()); - //CLK_REGION.CLOCK_REGION_UNIT9 = i_regions.getBit<14>() - l_data64.writeBit<13>(i_regions.getBit<14>()); - //CLK_REGION.CLOCK_REGION_UNIT10 = i_regions.getBit<15>() - l_data64.writeBit<14>(i_regions.getBit<15>()); - //CLK_REGION.SEL_THOLD_SL = 1 - l_data64.setBit<PERV_1_CLK_REGION_SEL_THOLD_SL>(); - //CLK_REGION.SEL_THOLD_NSL = 1 - l_data64.setBit<PERV_1_CLK_REGION_SEL_THOLD_NSL>(); - //CLK_REGION.SEL_THOLD_ARY = 1 - l_data64.setBit<PERV_1_CLK_REGION_SEL_THOLD_ARY>(); + //CLK_REGION.CLOCK_REGION_ALL_UNITS = l_regions + l_data64.insertFromRight<4, 11>(l_regions); + l_data64.setBit<48, 3>(); //CLK_REGION.SEL_THOLD_ALL = 0b111 FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_CLK_REGION, l_data64)); FAPI_DBG("Write scan select register"); //Setting SCAN_REGION_TYPE register value l_data64.flush<0>(); //SCAN_REGION_TYPE = 0 - //SCAN_REGION_TYPE.SCAN_REGION_PERV = i_regions.getBit<5>() - l_data64.writeBit<4>(i_regions.getBit<5>()); - //SCAN_REGION_TYPE.SCAN_REGION_UNIT1 = i_regions.getBit<6>() - l_data64.writeBit<5>(i_regions.getBit<6>()); - //SCAN_REGION_TYPE.SCAN_REGION_UNIT2 = i_regions.getBit<7>() - l_data64.writeBit<6>(i_regions.getBit<7>()); - //SCAN_REGION_TYPE.SCAN_REGION_UNIT3 = i_regions.getBit<8>() - l_data64.writeBit<7>(i_regions.getBit<8>()); - //SCAN_REGION_TYPE.SCAN_REGION_UNIT4 = i_regions.getBit<9>() - l_data64.writeBit<8>(i_regions.getBit<9>()); - //SCAN_REGION_TYPE.SCAN_REGION_UNIT5 = i_regions.getBit<10>() - l_data64.writeBit<9>(i_regions.getBit<10>()); - //SCAN_REGION_TYPE.SCAN_REGION_UNIT6 = i_regions.getBit<11>() - l_data64.writeBit<10>(i_regions.getBit<11>()); - //SCAN_REGION_TYPE.SCAN_REGION_UNIT7 = i_regions.getBit<12>() - l_data64.writeBit<11>(i_regions.getBit<12>()); - //SCAN_REGION_TYPE.SCAN_REGION_UNIT8 = i_regions.getBit<13>() - l_data64.writeBit<12>(i_regions.getBit<13>()); - //SCAN_REGION_TYPE.SCAN_REGION_UNIT9 = i_regions.getBit<14>() - l_data64.writeBit<13>(i_regions.getBit<14>()); - //SCAN_REGION_TYPE.SCAN_REGION_UNIT10 = i_regions.getBit<15>() - l_data64.writeBit<14>(i_regions.getBit<15>()); - //SCAN_REGION_TYPE.SCAN_TYPE_FUNC = i_scan_types.getBit<4>() - l_data64.writeBit<48>(i_scan_types.getBit<4>()); - //SCAN_REGION_TYPE.SCAN_TYPE_CFG = i_scan_types.getBit<5>() - l_data64.writeBit<49>(i_scan_types.getBit<5>()); - //SCAN_REGION_TYPE.SCAN_TYPE_CCFG_GPTR = i_scan_types.getBit<6>() - l_data64.writeBit<50>(i_scan_types.getBit<6>()); - //SCAN_REGION_TYPE.SCAN_TYPE_REGF = i_scan_types.getBit<7>() - l_data64.writeBit<51>(i_scan_types.getBit<7>()); - //SCAN_REGION_TYPE.SCAN_TYPE_LBIST = i_scan_types.getBit<8>() - l_data64.writeBit<52>(i_scan_types.getBit<8>()); - //SCAN_REGION_TYPE.SCAN_TYPE_ABIST = i_scan_types.getBit<9>() - l_data64.writeBit<53>(i_scan_types.getBit<9>()); - //SCAN_REGION_TYPE.SCAN_TYPE_REPR = i_scan_types.getBit<10>() - l_data64.writeBit<54>(i_scan_types.getBit<10>()); - //SCAN_REGION_TYPE.SCAN_TYPE_TIME = i_scan_types.getBit<11>() - l_data64.writeBit<55>(i_scan_types.getBit<11>()); - //SCAN_REGION_TYPE.SCAN_TYPE_BNDY = i_scan_types.getBit<12>() - l_data64.writeBit<56>(i_scan_types.getBit<12>()); - //SCAN_REGION_TYPE.SCAN_TYPE_FARR = i_scan_types.getBit<13>() - l_data64.writeBit<57>(i_scan_types.getBit<13>()); - //SCAN_REGION_TYPE.SCAN_TYPE_CMSK = i_scan_types.getBit<14>() - l_data64.writeBit<58>(i_scan_types.getBit<14>()); - //SCAN_REGION_TYPE.SCAN_TYPE_INEX = i_scan_types.getBit<15>() - l_data64.writeBit<59>(i_scan_types.getBit<15>()); + //SCAN_REGION_TYPE.SCAN_REGION_ALL_UNITS = l_regions + l_data64.insertFromRight<4, 11>(l_regions); + //SCAN_REGION_TYPE.SCAN_ALL_TYPES = l_scan_types + l_data64.insertFromRight<48, 12>(l_scan_types); FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_SCAN_REGION_TYPE, l_data64)); FAPI_DBG("set OPCG_REG0 register bit 0='0'"); diff --git a/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.H b/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.H index 32027b4a..791b785c 100644 --- a/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.H +++ b/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.H @@ -46,7 +46,7 @@ fapi2::ReturnCode p9_perv_sbe_cmn_array_init_module(const const fapi2::buffer<uint64_t> i_start_abist_match_value); fapi2::ReturnCode p9_perv_sbe_cmn_regions_setup_16(const - fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet, + fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chip, const fapi2::buffer<uint16_t> i_regions_value, fapi2::buffer<uint16_t>& o_regions_value); diff --git a/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C b/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C index 212e651d..e96b0a3a 100644 --- a/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C +++ b/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C @@ -26,6 +26,7 @@ /// 4) Similar way, Reset sys.config and OPCG setting for Nest and MC chiplet in sync mode /// /// Done +/// //------------------------------------------------------------------------------ // *HWP HW Owner : Abhishek Agarwal <abagarw8@in.ibm.com> // *HWP HW Backup Owner : Srinivas V. Naga <srinivan@in.ibm.com> @@ -38,6 +39,8 @@ //## auto_generated #include "p9_sbe_chiplet_reset.H" +//## auto_generated +#include "p9_const_common.H" #include <p9_perv_scom_addresses.H> #include <p9_perv_scom_addresses_fld.H> @@ -45,14 +48,17 @@ static fapi2::ReturnCode p9_sbe_chiplet_reset_all_cplt_hang_cnt_setup( - const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_cplt); + const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_cplt, + const uint8_t i_reg0_val = 0xff, + const uint8_t i_reg1_val = 0xff, + const uint8_t i_reg2_val = 0xff, + const uint8_t i_reg3_val = 0xff, + const uint8_t i_reg4_val = 0xff, + const uint8_t i_reg5_val = 0xff); static fapi2::ReturnCode p9_sbe_chiplet_reset_all_cplt_net_cntl_setup( const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_cplt); -static fapi2::ReturnCode p9_sbe_chiplet_reset_cache_hang_cnt_setup( - const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_ep); - static fapi2::ReturnCode p9_sbe_chiplet_reset_clk_mux_MC( const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet, const fapi2::buffer<uint32_t> i_clk_mux_value); @@ -72,17 +78,12 @@ static fapi2::ReturnCode p9_sbe_chiplet_reset_clk_mux_xbus( const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet, const fapi2::buffer<uint32_t> i_clk_mux_value); -static fapi2::ReturnCode p9_sbe_chiplet_reset_core_hang_cnt_setup( - const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_ec); - -static fapi2::ReturnCode p9_sbe_chiplet_reset_disable_listen_to_sync( - const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet); - static fapi2::ReturnCode p9_sbe_chiplet_reset_div_clk_bypass( const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet); static fapi2::ReturnCode p9_sbe_chiplet_reset_enable_listen_to_sync( - const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet); + const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet, + const bool i_enable); static fapi2::ReturnCode p9_sbe_chiplet_reset_enable_pll( const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet); @@ -91,23 +92,16 @@ static fapi2::ReturnCode p9_sbe_chiplet_reset_mc_net_ctrl_clk_async_reset( const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet); static fapi2::ReturnCode p9_sbe_chiplet_reset_mc_setup(const - fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet); - -static fapi2::ReturnCode p9_sbe_chiplet_reset_mc_setup_MC( - const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet); + fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet, + const uint64_t i_mc_grp1_val, + const uint64_t i_mc_grp2_val = 0x0); static fapi2::ReturnCode p9_sbe_chiplet_reset_mc_setup_cache( const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet); -static fapi2::ReturnCode p9_sbe_chiplet_reset_mc_setup_core( - const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet); - static fapi2::ReturnCode p9_sbe_chiplet_reset_nest_hang_cnt_setup( const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_cplt); -static fapi2::ReturnCode p9_sbe_chiplet_reset_nest_mc_call( - const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_cplt); - static fapi2::ReturnCode p9_sbe_chiplet_reset_net_ctrl_lvltrans_fence_pcb_ep_reset( const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet); @@ -124,6 +118,9 @@ static fapi2::ReturnCode p9_sbe_chiplet_reset_scan0_call( static fapi2::ReturnCode p9_sbe_chiplet_reset_setup(const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet); +static fapi2::ReturnCode p9_sbe_chiplet_reset_setup_iop_logic( + const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chip); + fapi2::ReturnCode p9_sbe_chiplet_reset(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip) { @@ -131,14 +128,24 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const //uint8_t l_mc_sync_mode = 0; FAPI_INF("Entering ..."); - // Configuring chiplet multicasting registers.. - FAPI_TRY(p9_sbe_chiplet_reset_nest_mc_call(i_target_chip)); + for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_NEST | + fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_ALL_PCI | + fapi2::TARGET_FILTER_XBUS), fapi2::TARGET_STATE_FUNCTIONAL)) + { + // Configuring chiplet multicasting registers. + FAPI_DBG("Configuring multicasting registers for Nest,Xb,Obus,pcie chiplets" ); + FAPI_TRY(p9_sbe_chiplet_reset_mc_setup(l_target_cplt, + p9SbeChipletReset::MCGR0_CNFG_SETTINGS)); + } for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_MC, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("Configuring multicast registers for MC01,MC23"); - FAPI_TRY(p9_sbe_chiplet_reset_mc_setup_MC(l_target_cplt)); + FAPI_TRY(p9_sbe_chiplet_reset_mc_setup(l_target_cplt, + p9SbeChipletReset::MCGR0_CNFG_SETTINGS, + p9SbeChipletReset::MCGR2_CNFG_SETTINGS)); } for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> @@ -154,7 +161,9 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const { // Configuring chiplet multicasting registers.. FAPI_DBG("Configuring core chiplet multicasting registers"); - FAPI_TRY(p9_sbe_chiplet_reset_mc_setup_core(l_target_cplt)); + FAPI_TRY(p9_sbe_chiplet_reset_mc_setup(l_target_cplt, + p9SbeChipletReset::MCGR0_CNFG_SETTINGS, + p9SbeChipletReset::MCGR1_CNFG_SETTINGS)); } for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> @@ -171,12 +180,22 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC | - fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_ALL_PCI | fapi2::TARGET_FILTER_XBUS), fapi2::TARGET_STATE_FUNCTIONAL)) { // Setting up hang pulse counter for register 0 and register 6 - FAPI_DBG("Setup hang pulse counter for Mc,Xbus,Obus,Pcie"); - FAPI_TRY(p9_sbe_chiplet_reset_all_cplt_hang_cnt_setup(l_target_cplt)); + FAPI_DBG("Setup hang pulse counter for Mc,Pcie"); + FAPI_TRY(p9_sbe_chiplet_reset_all_cplt_hang_cnt_setup(l_target_cplt, + p9SbeChipletReset::HANG_PULSE_0X10)); + } + + for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_XBUS | + fapi2::TARGET_FILTER_ALL_OBUS), fapi2::TARGET_STATE_FUNCTIONAL)) + { + // Setting up hang pulse counter for register 0 and register 6 + FAPI_DBG("Setup hang pulse counter for Xbus,Obus"); + FAPI_TRY(p9_sbe_chiplet_reset_all_cplt_hang_cnt_setup(l_target_cplt, + p9SbeChipletReset::HANG_PULSE_0X10, p9SbeChipletReset::HANG_PULSE_0X04)); } for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> @@ -192,7 +211,9 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const { // Setting up hang pulse counter for register 5 FAPI_DBG("Setup hang pulse counter for core chiplet"); - FAPI_TRY(p9_sbe_chiplet_reset_core_hang_cnt_setup(l_target_cplt)); + FAPI_TRY(p9_sbe_chiplet_reset_all_cplt_hang_cnt_setup(l_target_cplt, + p9SbeChipletReset::HANG_PULSE_0X10, p9SbeChipletReset::HANG_PULSE_0X1A, 0xff, + 0xff, 0xff, p9SbeChipletReset::HANG_PULSE_0X06)); } for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> @@ -200,7 +221,10 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const { // Setting up hang pulse counter for register 5 FAPI_DBG("Setup hang pulse counter for cache chiplet"); - FAPI_TRY(p9_sbe_chiplet_reset_cache_hang_cnt_setup(l_target_cplt)); + FAPI_TRY(p9_sbe_chiplet_reset_all_cplt_hang_cnt_setup(l_target_cplt, + p9SbeChipletReset::HANG_PULSE_0X10, p9SbeChipletReset::HANG_PULSE_0X01, + p9SbeChipletReset::HANG_PULSE_0X01, p9SbeChipletReset::HANG_PULSE_0X04, + p9SbeChipletReset::HANG_PULSE_0X00, p9SbeChipletReset::HANG_PULSE_0X06)); } FAPI_DBG("Clock mux settings"); @@ -256,13 +280,6 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const } for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> - (fapi2::TARGET_FILTER_ALL_PCI, fapi2::TARGET_STATE_FUNCTIONAL)) - { - FAPI_DBG("Setup IOP logic for PCIe chiplet"); - FAPI_TRY(p9_sbe_chiplet_reset_pcie_iop_logic_setup(l_target_cplt)); - } - - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC | fapi2::TARGET_FILTER_ALL_NEST | fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_ALL_PCI | fapi2::TARGET_FILTER_XBUS), @@ -278,14 +295,23 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const fapi2::TARGET_FILTER_XBUS), fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("Enable listen to sync for NEST,OB,XB,PCIe"); - FAPI_TRY(p9_sbe_chiplet_reset_enable_listen_to_sync(l_target_cplt)); + FAPI_TRY(p9_sbe_chiplet_reset_enable_listen_to_sync(l_target_cplt, true)); } for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> - (fapi2::TARGET_FILTER_ALL_MC, fapi2::TARGET_STATE_FUNCTIONAL)) + (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC | + fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_ALL_PCI | + fapi2::TARGET_FILTER_XBUS), fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("Disable listen_to_sync for Nest,MC,XB,OB,PCIe"); - FAPI_TRY(p9_sbe_chiplet_reset_disable_listen_to_sync(l_target_cplt)); + FAPI_TRY(p9_sbe_chiplet_reset_enable_listen_to_sync(l_target_cplt, false)); + } + + for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (fapi2::TARGET_FILTER_ALL_PCI, fapi2::TARGET_STATE_FUNCTIONAL)) + { + FAPI_DBG("Setup IOP Logic for PCIe"); + FAPI_TRY(p9_sbe_chiplet_reset_setup_iop_logic(l_target_cplt)); } for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> @@ -314,61 +340,93 @@ fapi_try_exit: } -/// @brief Setup IOP logic for PCIe chiplet -/// -/// @param[in] i_target_chip Reference to TARGET_TYPE_PERV target -/// @return FAPI2_RC_SUCCESS if success, else error code. -fapi2::ReturnCode p9_sbe_chiplet_reset_pcie_iop_logic_setup( - const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chip) -{ - fapi2::buffer<uint64_t> l_data64_cplt_conf1; - FAPI_INF("Entering ..."); - - //Setting CPLT_CONF1 register value - l_data64_cplt_conf1.flush<0>(); - l_data64_cplt_conf1.setBit<30>(); //CPLT_CONF1.TC_IOP_HSSPORWREN = 0b1 - FAPI_TRY(fapi2::putScom(i_target_chip, PERV_CPLT_CONF1_OR, - l_data64_cplt_conf1)); - - fapi2::delay(p9SbeChipletReset::HW_NS_DELAY, - p9SbeChipletReset::SIM_CYCLE_DELAY); - - //Setting CPLT_CONF1 register value - l_data64_cplt_conf1.flush<0>(); - l_data64_cplt_conf1.setBit<28>(); //CPLT_CONF1.TC_IOP_SYS_RESET_PCS = 0b1 - l_data64_cplt_conf1.setBit<29>(); //CPLT_CONF1.TC_IOP_SYS_RESET_PMA = 0b1 - FAPI_TRY(fapi2::putScom(i_target_chip, PERV_CPLT_CONF1_OR, - l_data64_cplt_conf1)); - - FAPI_INF("Exiting ..."); - -fapi_try_exit: - return fapi2::current_err; - -} - /// @brief Setting up hang pulse counter for all parital good chiplet except for Tp,nest, core and cache /// /// @param[in] i_target_cplt Reference to TARGET_TYPE_PERV target +/// @param[in] i_reg0_val value for HANG_PULSE_0_REG +/// @param[in] i_reg1_val value for HANG_PULSE_1_REG +/// @param[in] i_reg2_val value for HANG_PULSE_2_REG +/// @param[in] i_reg3_val value for HANG_PULSE_3_REG +/// @param[in] i_reg4_val value for HANG_PULSE_4_REG +/// @param[in] i_reg5_val value for HANG_PULSE_5_REG /// @return FAPI2_RC_SUCCESS if success, else error code. static fapi2::ReturnCode p9_sbe_chiplet_reset_all_cplt_hang_cnt_setup( - const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_cplt) + const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_cplt, + const uint8_t i_reg0_val, + const uint8_t i_reg1_val, + const uint8_t i_reg2_val, + const uint8_t i_reg3_val, + const uint8_t i_reg4_val, + const uint8_t i_reg5_val) { + uint32_t l_attr_pg = 0; fapi2::buffer<uint64_t> l_data64; FAPI_INF("Entering ..."); - uint32_t l_attr_pg; - FAPI_DBG("Reading ATTR_PG"); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_cplt, l_attr_pg)); if ( l_attr_pg != 0xFFFF ) { //Setting HANG_PULSE_0_REG register value (Setting all fields) - //HANG_PULSE_0_REG.HANG_PULSE_REG_0 = p9SbeChipletReset::HANG_PULSE_0X10 - l_data64.insertFromRight<0, 6>(p9SbeChipletReset::HANG_PULSE_0X10); - l_data64.clearBit<6>(); //HANG_PULSE_0_REG.SUPPRESS_HANG_0 = 0 - FAPI_TRY(fapi2::putScom(i_target_cplt, PERV_HANG_PULSE_0_REG, l_data64)); + if (i_reg0_val != 0xff) + { + //HANG_PULSE_0_REG.HANG_PULSE_REG_0 = (i_reg0_val != 0xff) ? i_reg0_val + l_data64.insertFromRight<0, 6>(i_reg0_val); + //HANG_PULSE_0_REG.SUPPRESS_HANG_0 = (i_reg0_val != 0xff) ? 0 + l_data64.clearBit<6>(); + FAPI_TRY(fapi2::putScom(i_target_cplt, PERV_HANG_PULSE_0_REG, l_data64)); + } + + //Setting HANG_PULSE_1_REG register value (Setting all fields) + if (i_reg1_val != 0xff) + { + //HANG_PULSE_1_REG.HANG_PULSE_REG_1 = (i_reg1_val != 0xff) ? i_reg1_val + l_data64.insertFromRight<0, 6>(i_reg1_val); + //HANG_PULSE_1_REG.SUPPRESS_HANG_1 = (i_reg1_val != 0xff) ? 0 + l_data64.clearBit<6>(); + FAPI_TRY(fapi2::putScom(i_target_cplt, PERV_HANG_PULSE_1_REG, l_data64)); + } + + //Setting HANG_PULSE_2_REG register value (Setting all fields) + if (i_reg2_val != 0xff) + { + //HANG_PULSE_2_REG.HANG_PULSE_REG_2 = (i_reg2_val != 0xff) ? i_reg2_val + l_data64.insertFromRight<0, 6>(i_reg2_val); + //HANG_PULSE_2_REG.SUPPRESS_HANG_2 = (i_reg2_val != 0xff) ? 0 + l_data64.clearBit<6>(); + FAPI_TRY(fapi2::putScom(i_target_cplt, PERV_HANG_PULSE_2_REG, l_data64)); + } + + //Setting HANG_PULSE_3_REG register value (Setting all fields) + if (i_reg3_val != 0xff) + { + //HANG_PULSE_3_REG.HANG_PULSE_REG_3 = (i_reg3_val != 0xff) ? i_reg3_val + l_data64.insertFromRight<0, 6>(i_reg3_val); + //HANG_PULSE_3_REG.SUPPRESS_HANG_3 = (i_reg3_val != 0xff) ? 0 + l_data64.clearBit<6>(); + FAPI_TRY(fapi2::putScom(i_target_cplt, PERV_HANG_PULSE_3_REG, l_data64)); + } + + //Setting HANG_PULSE_4_REG register value (Setting all fields) + if (i_reg4_val != 0xff) + { + //HANG_PULSE_4_REG.HANG_PULSE_REG_4 = (i_reg4_val != 0xff) ? i_reg4_val + l_data64.insertFromRight<0, 6>(i_reg4_val); + //HANG_PULSE_4_REG.SUPPRESS_HANG_4 = (i_reg4_val != 0xff) ? 0 + l_data64.clearBit<6>(); + FAPI_TRY(fapi2::putScom(i_target_cplt, PERV_HANG_PULSE_4_REG, l_data64)); + } + + //Setting HANG_PULSE_5_REG register value (Setting all fields) + if (i_reg5_val != 0xff) + { + //HANG_PULSE_5_REG.HANG_PULSE_REG_5 = (i_reg5_val != 0xff) ? i_reg5_val + l_data64.insertFromRight<0, 6>(i_reg5_val); + //HANG_PULSE_5_REG.SUPPRESS_HANG_5 = (i_reg5_val != 0xff) ? 0 + l_data64.clearBit<6>(); + FAPI_TRY(fapi2::putScom(i_target_cplt, PERV_HANG_PULSE_5_REG, l_data64)); + } } FAPI_INF("Exiting ..."); @@ -403,62 +461,6 @@ fapi_try_exit: } -/// @brief Setup Cache hang pulse counter configuration... -/// -/// @param[in] i_target_ep Reference to TARGET_TYPE_PERV target -/// @return FAPI2_RC_SUCCESS if success, else error code. -static fapi2::ReturnCode p9_sbe_chiplet_reset_cache_hang_cnt_setup( - const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_ep) -{ - fapi2::buffer<uint64_t> l_data64; - FAPI_INF("Entering ..."); - - uint32_t l_attr_pg; - - FAPI_DBG("Reading ATTR_PG"); - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_ep, l_attr_pg)); - - if ( l_attr_pg != 0xFFFF ) - { - //Setting HANG_PULSE_0_REG register value (Setting all fields) - //HANG_PULSE_0_REG.HANG_PULSE_REG_0 = p9SbeChipletReset::HANG_PULSE_0X10 - l_data64.insertFromRight<0, 6>(p9SbeChipletReset::HANG_PULSE_0X10); - l_data64.clearBit<6>(); //HANG_PULSE_0_REG.SUPPRESS_HANG_0 = 0 - FAPI_TRY(fapi2::putScom(i_target_ep, PERV_HANG_PULSE_0_REG, l_data64)); - //Setting HANG_PULSE_1_REG register value (Setting all fields) - //HANG_PULSE_1_REG.HANG_PULSE_REG_1 = p9SbeChipletReset::HANG_PULSE_0X01 - l_data64.insertFromRight<0, 6>(p9SbeChipletReset::HANG_PULSE_0X01); - l_data64.clearBit<6>(); //HANG_PULSE_1_REG.SUPPRESS_HANG_1 = 0 - FAPI_TRY(fapi2::putScom(i_target_ep, PERV_HANG_PULSE_1_REG, l_data64)); - //Setting HANG_PULSE_2_REG register value (Setting all fields) - //HANG_PULSE_2_REG.HANG_PULSE_REG_2 = p9SbeChipletReset::HANG_PULSE_0X01 - l_data64.insertFromRight<0, 6>(p9SbeChipletReset::HANG_PULSE_0X01); - l_data64.clearBit<6>(); //HANG_PULSE_2_REG.SUPPRESS_HANG_2 = 0 - FAPI_TRY(fapi2::putScom(i_target_ep, PERV_HANG_PULSE_2_REG, l_data64)); - //Setting HANG_PULSE_3_REG register value (Setting all fields) - //HANG_PULSE_3_REG.HANG_PULSE_REG_3 = p9SbeChipletReset::HANG_PULSE_0X04 - l_data64.insertFromRight<0, 6>(p9SbeChipletReset::HANG_PULSE_0X04); - l_data64.clearBit<6>(); //HANG_PULSE_3_REG.SUPPRESS_HANG_3 = 0 - FAPI_TRY(fapi2::putScom(i_target_ep, PERV_HANG_PULSE_3_REG, l_data64)); - //Setting HANG_PULSE_4_REG register value (Setting all fields) - //HANG_PULSE_4_REG.HANG_PULSE_REG_4 = p9SbeChipletReset::HANG_PULSE_0X00 - l_data64.insertFromRight<0, 6>(p9SbeChipletReset::HANG_PULSE_0X00); - l_data64.clearBit<6>(); //HANG_PULSE_4_REG.SUPPRESS_HANG_4 = 0 - FAPI_TRY(fapi2::putScom(i_target_ep, PERV_HANG_PULSE_4_REG, l_data64)); - //Setting HANG_PULSE_5_REG register value (Setting all fields) - //HANG_PULSE_5_REG.HANG_PULSE_REG_5 = p9SbeChipletReset::HANG_PULSE_0X06 - l_data64.insertFromRight<0, 6>(p9SbeChipletReset::HANG_PULSE_0X06); - l_data64.clearBit<6>(); //HANG_PULSE_5_REG.SUPPRESS_HANG_5 = 0 - FAPI_TRY(fapi2::putScom(i_target_ep, PERV_HANG_PULSE_5_REG, l_data64)); - } - - FAPI_INF("Exiting ..."); - -fapi_try_exit: - return fapi2::current_err; - -} - /// @brief clock mux settings for Mc chiplet /// /// @param[in] i_target_chiplet Reference to TARGET_TYPE_PERV target @@ -468,11 +470,10 @@ static fapi2::ReturnCode p9_sbe_chiplet_reset_clk_mux_MC( const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet, const fapi2::buffer<uint32_t> i_clk_mux_value) { + uint32_t l_attr_pg = 0; fapi2::buffer<uint64_t> l_data64; FAPI_INF("Entering ..."); - uint32_t l_attr_pg; - FAPI_DBG("Reading ATTR_PG"); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_chiplet, l_attr_pg)); @@ -626,12 +627,11 @@ static fapi2::ReturnCode p9_sbe_chiplet_reset_clk_mux_pcie( const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet, const fapi2::buffer<uint32_t> i_clk_mux_value) { + uint32_t l_attr_pg = 0; + uint8_t l_attr_unit_pos = 0; fapi2::buffer<uint64_t> l_data64; FAPI_INF("Entering ..."); - uint32_t l_attr_pg; - uint8_t l_attr_unit_pos; - FAPI_DBG("Reading ATTR_PG"); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_chiplet, l_attr_pg)); @@ -640,25 +640,22 @@ static fapi2::ReturnCode p9_sbe_chiplet_reset_clk_mux_pcie( FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, i_target_chiplet, l_attr_unit_pos)); - if ( l_attr_unit_pos == 0x0D ) + if ( l_attr_unit_pos != 0x0E ) { //Setting NET_CTRL1 register value FAPI_TRY(fapi2::getScom(i_target_chiplet, PERV_NET_CTRL1, l_data64)); - //NET_CTRL1.PLL_CLKIN_SEL = i_clk_mux_value.getBit<5>() - l_data64.writeBit<PERV_1_NET_CTRL1_PLL_CLKIN_SEL>(i_clk_mux_value.getBit<5>()); - l_data64.writeBit<PERV_1_NET_CTRL1_REFCLK_CLKMUX0_SEL> - (i_clk_mux_value.getBit<10>()); //NET_CTRL1.REFCLK_CLKMUX0_SEL = i_clk_mux_value.getBit<10>() - l_data64.writeBit<PERV_1_NET_CTRL1_REFCLK_CLKMUX1_SEL> - (i_clk_mux_value.getBit<11>()); //NET_CTRL1.REFCLK_CLKMUX1_SEL = i_clk_mux_value.getBit<11>() - FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_NET_CTRL1, l_data64)); - } + l_data64.writeBit<PERV_1_NET_CTRL1_PLL_CLKIN_SEL>((l_attr_unit_pos == 0x0D) ? + i_clk_mux_value.getBit<5>() : + i_clk_mux_value.getBit<4>()); //NET_CTRL1.PLL_CLKIN_SEL = (l_attr_unit_pos == 0x0D)? i_clk_mux_value.getBit<5>() : i_clk_mux_value.getBit<4>() + + if (l_attr_unit_pos == 0x0D) + { + l_data64.writeBit<PERV_1_NET_CTRL1_REFCLK_CLKMUX0_SEL> + (i_clk_mux_value.getBit<10>()); //NET_CTRL1.REFCLK_CLKMUX0_SEL = (l_attr_unit_pos == 0x0D)? i_clk_mux_value.getBit<10>() + l_data64.writeBit<PERV_1_NET_CTRL1_REFCLK_CLKMUX1_SEL> + (i_clk_mux_value.getBit<11>()); //NET_CTRL1.REFCLK_CLKMUX1_SEL = (l_attr_unit_pos == 0x0D)? i_clk_mux_value.getBit<11>() + } - if ( l_attr_unit_pos == 0x0F ) - { - //Setting NET_CTRL1 register value - FAPI_TRY(fapi2::getScom(i_target_chiplet, PERV_NET_CTRL1, l_data64)); - //NET_CTRL1.PLL_CLKIN_SEL = i_clk_mux_value.getBit<4>() - l_data64.writeBit<PERV_1_NET_CTRL1_PLL_CLKIN_SEL>(i_clk_mux_value.getBit<4>()); FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_NET_CTRL1, l_data64)); } } @@ -680,20 +677,19 @@ static fapi2::ReturnCode p9_sbe_chiplet_reset_clk_mux_xbus( const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet, const fapi2::buffer<uint32_t> i_clk_mux_value) { + uint32_t l_attr_pg = 0; fapi2::buffer<uint64_t> l_data64; FAPI_INF("Entering ..."); - uint32_t l_attr_pg; - FAPI_DBG("Reading ATTR_PG"); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_chiplet, l_attr_pg)); - if ( l_attr_pg != 0xFFFF ) + //Setting NET_CTRL1 register value + if (l_attr_pg != 0xFFFF) { - //Setting NET_CTRL1 register value FAPI_TRY(fapi2::getScom(i_target_chiplet, PERV_NET_CTRL1, l_data64)); - //NET_CTRL1.PLL_CLKIN_SEL = i_clk_mux_value.getBit<8>() - l_data64.writeBit<PERV_1_NET_CTRL1_PLL_CLKIN_SEL>(i_clk_mux_value.getBit<8>()); + l_data64.writeBit<PERV_1_NET_CTRL1_PLL_CLKIN_SEL> + (i_clk_mux_value.getBit<8>()); //NET_CTRL1.PLL_CLKIN_SEL = (l_attr_pg != 0xFFFF) ? i_clk_mux_value.getBit<8>() FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_NET_CTRL1, l_data64)); } @@ -704,76 +700,6 @@ fapi_try_exit: } -/// @brief Setup core hang pulse counter configuration... -/// -/// @param[in] i_target_ec Reference to TARGET_TYPE_PERV target -/// @return FAPI2_RC_SUCCESS if success, else error code. -static fapi2::ReturnCode p9_sbe_chiplet_reset_core_hang_cnt_setup( - const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_ec) -{ - fapi2::buffer<uint64_t> l_data64; - FAPI_INF("Entering ..."); - - uint32_t l_attr_pg; - - FAPI_DBG("Reading ATTR_PG"); - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_ec, l_attr_pg)); - - if ( l_attr_pg != 0xFFFF ) - { - //Setting HANG_PULSE_0_REG register value (Setting all fields) - //HANG_PULSE_0_REG.HANG_PULSE_REG_0 = p9SbeChipletReset::HANG_PULSE_0X10 - l_data64.insertFromRight<0, 6>(p9SbeChipletReset::HANG_PULSE_0X10); - l_data64.clearBit<6>(); //HANG_PULSE_0_REG.SUPPRESS_HANG_0 = 0 - FAPI_TRY(fapi2::putScom(i_target_ec, PERV_HANG_PULSE_0_REG, l_data64)); - //Setting HANG_PULSE_1_REG register value (Setting all fields) - //HANG_PULSE_1_REG.HANG_PULSE_REG_1 = p9SbeChipletReset::HANG_PULSE_0X1A - l_data64.insertFromRight<0, 6>(p9SbeChipletReset::HANG_PULSE_0X1A); - l_data64.clearBit<6>(); //HANG_PULSE_1_REG.SUPPRESS_HANG_1 = 0 - FAPI_TRY(fapi2::putScom(i_target_ec, PERV_HANG_PULSE_1_REG, l_data64)); - //Setting HANG_PULSE_5_REG register value (Setting all fields) - //HANG_PULSE_5_REG.HANG_PULSE_REG_5 = p9SbeChipletReset::HANG_PULSE_0X06 - l_data64.insertFromRight<0, 6>(p9SbeChipletReset::HANG_PULSE_0X06); - l_data64.clearBit<6>(); //HANG_PULSE_5_REG.SUPPRESS_HANG_5 = 0 - FAPI_TRY(fapi2::putScom(i_target_ec, PERV_HANG_PULSE_5_REG, l_data64)); - } - - FAPI_INF("Exiting ..."); - -fapi_try_exit: - return fapi2::current_err; - -} - -/// @brief Disable listen_to_sync mode for MC -/// -/// @param[in] i_target_chiplet Reference to TARGET_TYPE_PERV target -/// @return FAPI2_RC_SUCCESS if success, else error code. -static fapi2::ReturnCode p9_sbe_chiplet_reset_disable_listen_to_sync( - const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet) -{ - FAPI_INF("Entering ..."); - - uint32_t l_attr_pg; - - FAPI_DBG("Reading ATTR_PG"); - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_chiplet, l_attr_pg)); - - if ( l_attr_pg != 0xFFFF ) - { - //Setting SYNC_CONFIG register value - //SYNC_CONFIG = p9SbeChipletReset::SYNC_CONFIG_4TO1 - FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_SYNC_CONFIG, - p9SbeChipletReset::SYNC_CONFIG_4TO1)); - } - - FAPI_INF("Exiting ..."); - -fapi_try_exit: - return fapi2::current_err; - -} - /// @brief Drop clk div bypass for Mc chiplet /// /// @param[in] i_target_chiplet Reference to TARGET_TYPE_PERV target @@ -781,20 +707,20 @@ fapi_try_exit: static fapi2::ReturnCode p9_sbe_chiplet_reset_div_clk_bypass( const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet) { + uint32_t l_attr_pg = 0; fapi2::buffer<uint64_t> l_data64; FAPI_INF("Entering ..."); - uint32_t l_attr_pg; - FAPI_DBG("Reading ATTR_PG"); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_chiplet, l_attr_pg)); - if ( l_attr_pg != 0xFFFF ) + FAPI_DBG("drop clk_div_bypass_en"); + + //Setting NET_CTRL1 register value + if (l_attr_pg != 0xFFFF) { - FAPI_DBG("drop clk_div_bypass_en"); - //Setting NET_CTRL1 register value l_data64.flush<1>(); - //NET_CTRL1.CLK_DIV_BYPASS_EN = 0 + //NET_CTRL1.CLK_DIV_BYPASS_EN = (l_attr_pg != 0xFFFF) ? 0 l_data64.clearBit<PERV_1_NET_CTRL1_CLK_DIV_BYPASS_EN>(); FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_NET_CTRL1_WAND, l_data64)); } @@ -810,23 +736,25 @@ fapi_try_exit: /// /// /// @param[in] i_target_chiplet Reference to TARGET_TYPE_PERV target +/// @param[in] i_enable if TRUE - enable, FALSE - disable /// @return FAPI2_RC_SUCCESS if success, else error code. static fapi2::ReturnCode p9_sbe_chiplet_reset_enable_listen_to_sync( - const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet) + const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet, + const bool i_enable) { + uint32_t l_attr_pg = 0; FAPI_INF("Entering ..."); - uint32_t l_attr_pg; - FAPI_DBG("Reading ATTR_PG"); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_chiplet, l_attr_pg)); if ( l_attr_pg != 0xFFFF ) { //Setting SYNC_CONFIG register value - //SYNC_CONFIG = p9SbeChipletReset::SYNC_CONFIG_DEFAULT + //SYNC_CONFIG = i_enable? p9SbeChipletReset::SYNC_CONFIG_DEFAULT : p9SbeChipletReset::SYNC_CONFIG_4TO1 FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_SYNC_CONFIG, - p9SbeChipletReset::SYNC_CONFIG_DEFAULT)); + i_enable ? p9SbeChipletReset::SYNC_CONFIG_DEFAULT : + p9SbeChipletReset::SYNC_CONFIG_4TO1)); } FAPI_INF("Exiting ..."); @@ -874,11 +802,10 @@ fapi_try_exit: static fapi2::ReturnCode p9_sbe_chiplet_reset_mc_net_ctrl_clk_async_reset( const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet) { + uint32_t l_attr_pg = 0; fapi2::buffer<uint64_t> l_data64; FAPI_INF("Entering ..."); - uint32_t l_attr_pg; - FAPI_DBG("Reading ATTR_PG"); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_chiplet, l_attr_pg)); @@ -908,56 +835,34 @@ fapi_try_exit: /// @brief Configuring multicast registers for nest, cache, core /// /// @param[in] i_target_chiplet Reference to TARGET_TYPE_PERV target +/// @param[in] i_mc_grp1_val value for MULTICAST_GROUP1 register +/// @param[in] i_mc_grp2_val value for MULTICAST_GROUP2 register /// @return FAPI2_RC_SUCCESS if success, else error code. static fapi2::ReturnCode p9_sbe_chiplet_reset_mc_setup(const - fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet) + fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet, + const uint64_t i_mc_grp1_val, + const uint64_t i_mc_grp2_val) { + uint32_t l_attr_pg = 0; FAPI_INF("Entering ..."); - uint32_t l_attr_pg; - FAPI_DBG("Reading ATTR_PG"); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_chiplet, l_attr_pg)); if ( l_attr_pg != 0xFFFF ) { //Setting MULTICAST_GROUP_1 register value - //MULTICAST_GROUP_1 = p9SbeChipletReset::MCGR0_CNFG_SETTINGS + //MULTICAST_GROUP_1 = i_mc_grp1_val FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_MULTICAST_GROUP_1, - p9SbeChipletReset::MCGR0_CNFG_SETTINGS)); - } - - FAPI_INF("Exiting ..."); - -fapi_try_exit: - return fapi2::current_err; - -} + i_mc_grp1_val)); -/// @brief Multicast register setup for MC01, MC23 -/// -/// @param[in] i_target_chiplet Reference to TARGET_TYPE_PERV target -/// @return FAPI2_RC_SUCCESS if success, else error code. -static fapi2::ReturnCode p9_sbe_chiplet_reset_mc_setup_MC( - const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet) -{ - FAPI_INF("Entering ..."); - - uint32_t l_attr_pg; - - FAPI_DBG("Reading ATTR_PG"); - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_chiplet, l_attr_pg)); - - if ( l_attr_pg != 0xFFFF ) - { - //Setting MULTICAST_GROUP_1 register value - //MULTICAST_GROUP_1 = p9SbeChipletReset::MCGR0_CNFG_SETTINGS - FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_MULTICAST_GROUP_1, - p9SbeChipletReset::MCGR0_CNFG_SETTINGS)); //Setting MULTICAST_GROUP_2 register value - //MULTICAST_GROUP_2 = p9SbeChipletReset::MCGR2_CNFG_SETTINGS - FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_MULTICAST_GROUP_2, - p9SbeChipletReset::MCGR2_CNFG_SETTINGS)); + if (i_mc_grp2_val != 0x0) + { + //MULTICAST_GROUP_2 = (i_mc_grp2_val != 0x0) ? i_mc_grp2_val + FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_MULTICAST_GROUP_2, + i_mc_grp2_val)); + } } FAPI_INF("Exiting ..."); @@ -1014,39 +919,6 @@ fapi_try_exit: } -/// @brief Multicast register setup for core chiplets -/// -/// @param[in] i_target_chiplet Reference to TARGET_TYPE_PERV target -/// @return FAPI2_RC_SUCCESS if success, else error code. -static fapi2::ReturnCode p9_sbe_chiplet_reset_mc_setup_core( - const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet) -{ - FAPI_INF("Entering ..."); - - uint32_t l_attr_pg; - - FAPI_DBG("Reading ATTR_PG"); - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_chiplet, l_attr_pg)); - - if ( l_attr_pg != 0xFFFF ) - { - //Setting MULTICAST_GROUP_1 register value - //MULTICAST_GROUP_1 = p9SbeChipletReset::MCGR0_CNFG_SETTINGS - FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_MULTICAST_GROUP_1, - p9SbeChipletReset::MCGR0_CNFG_SETTINGS)); - //Setting MULTICAST_GROUP_2 register value - //MULTICAST_GROUP_2 = p9SbeChipletReset::MCGR1_CNFG_SETTINGS - FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_MULTICAST_GROUP_2, - p9SbeChipletReset::MCGR1_CNFG_SETTINGS)); - } - - FAPI_INF("Exiting ..."); - -fapi_try_exit: - return fapi2::current_err; - -} - /// @brief Setting up hang pulse counter for partial good Nest chiplet /// /// @param[in] i_target_cplt Reference to TARGET_TYPE_PERV target @@ -1054,16 +926,16 @@ fapi_try_exit: static fapi2::ReturnCode p9_sbe_chiplet_reset_nest_hang_cnt_setup( const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_cplt) { - fapi2::buffer<uint64_t> l_data64; - FAPI_INF("Entering ..."); - // Local variables // - uint8_t l_attr_chipunit_pos; - uint32_t l_attr_pg; - const uint8_t N0 = 0x02; - const uint8_t N1 = 0x03; - const uint8_t N3 = 0x05; + uint8_t l_attr_chipunit_pos = 0; + uint32_t l_attr_pg = 0; + const uint8_t l_n0 = 0x02; + const uint8_t l_n1 = 0x03; + const uint8_t l_n2 = 0x04; + const uint8_t l_n3 = 0x05; + fapi2::buffer<uint64_t> l_data64; + FAPI_INF("Entering ..."); FAPI_DBG("Reading ATTR_PG"); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_cplt, l_attr_pg)); @@ -1085,11 +957,11 @@ static fapi2::ReturnCode p9_sbe_chiplet_reset_nest_hang_cnt_setup( l_data64.clearBit<6>(); //HANG_PULSE_5_REG.SUPPRESS_HANG_5 = 0 FAPI_TRY(fapi2::putScom(i_target_cplt, PERV_HANG_PULSE_5_REG, l_data64)); - if ( l_attr_chipunit_pos == N0 ) + if ( l_attr_chipunit_pos == l_n0 ) { //Setting HANG_PULSE_1_REG register value (Setting all fields) - //HANG_PULSE_1_REG.HANG_PULSE_REG_1 = p9SbeChipletReset::HANG_PULSE_0X10 - l_data64.insertFromRight<0, 6>(p9SbeChipletReset::HANG_PULSE_0X10); + //HANG_PULSE_1_REG.HANG_PULSE_REG_1 = p9SbeChipletReset::HANG_PULSE_0X18 + l_data64.insertFromRight<0, 6>(p9SbeChipletReset::HANG_PULSE_0X18); l_data64.clearBit<6>(); //HANG_PULSE_1_REG.SUPPRESS_HANG_1 = 0 FAPI_TRY(fapi2::putScom(i_target_cplt, PERV_HANG_PULSE_1_REG, l_data64)); //Setting HANG_PULSE_2_REG register value (Setting all fields) @@ -1097,9 +969,14 @@ static fapi2::ReturnCode p9_sbe_chiplet_reset_nest_hang_cnt_setup( l_data64.insertFromRight<0, 6>(p9SbeChipletReset::HANG_PULSE_0X22); l_data64.clearBit<6>(); //HANG_PULSE_2_REG.SUPPRESS_HANG_2 = 0 FAPI_TRY(fapi2::putScom(i_target_cplt, PERV_HANG_PULSE_2_REG, l_data64)); + //Setting HANG_PULSE_3_REG register value (Setting all fields) + //HANG_PULSE_3_REG.HANG_PULSE_REG_3 = p9SbeChipletReset::HANG_PULSE_0X12 + l_data64.insertFromRight<0, 6>(p9SbeChipletReset::HANG_PULSE_0X12); + l_data64.clearBit<6>(); //HANG_PULSE_3_REG.SUPPRESS_HANG_3 = 0 + FAPI_TRY(fapi2::putScom(i_target_cplt, PERV_HANG_PULSE_3_REG, l_data64)); } - if ( l_attr_chipunit_pos == N1 ) + if ( l_attr_chipunit_pos == l_n1 ) { //Setting HANG_PULSE_2_REG register value (Setting all fields) //HANG_PULSE_2_REG.HANG_PULSE_REG_2 = p9SbeChipletReset::HANG_PULSE_0X0F @@ -1108,7 +985,16 @@ static fapi2::ReturnCode p9_sbe_chiplet_reset_nest_hang_cnt_setup( FAPI_TRY(fapi2::putScom(i_target_cplt, PERV_HANG_PULSE_2_REG, l_data64)); } - if ( l_attr_chipunit_pos == N3 ) + if ( l_attr_chipunit_pos == l_n2 ) + { + //Setting HANG_PULSE_3_REG register value (Setting all fields) + //HANG_PULSE_3_REG.HANG_PULSE_REG_3 = p9SbeChipletReset::HANG_PULSE_0X12 + l_data64.insertFromRight<0, 6>(p9SbeChipletReset::HANG_PULSE_0X12); + l_data64.clearBit<6>(); //HANG_PULSE_3_REG.SUPPRESS_HANG_3 = 0 + FAPI_TRY(fapi2::putScom(i_target_cplt, PERV_HANG_PULSE_3_REG, l_data64)); + } + + if ( l_attr_chipunit_pos == l_n3 ) { //Setting HANG_PULSE_1_REG register value (Setting all fields) //HANG_PULSE_1_REG.HANG_PULSE_REG_1 = p9SbeChipletReset::HANG_PULSE_0X17 @@ -1125,6 +1011,11 @@ static fapi2::ReturnCode p9_sbe_chiplet_reset_nest_hang_cnt_setup( l_data64.insertFromRight<0, 6>(p9SbeChipletReset::HANG_PULSE_0X0F); l_data64.clearBit<6>(); //HANG_PULSE_3_REG.SUPPRESS_HANG_3 = 0 FAPI_TRY(fapi2::putScom(i_target_cplt, PERV_HANG_PULSE_3_REG, l_data64)); + //Setting HANG_PULSE_4_REG register value (Setting all fields) + //HANG_PULSE_4_REG.HANG_PULSE_REG_4 = p9SbeChipletReset::HANG_PULSE_0X1C + l_data64.insertFromRight<0, 6>(p9SbeChipletReset::HANG_PULSE_0X1C); + l_data64.clearBit<6>(); //HANG_PULSE_4_REG.SUPPRESS_HANG_4 = 0 + FAPI_TRY(fapi2::putScom(i_target_cplt, PERV_HANG_PULSE_4_REG, l_data64)); } } @@ -1135,32 +1026,6 @@ fapi_try_exit: } -/// @brief Calling nest/mc/other bus multicasting set up -/// -/// @param[in] i_target_cplt Reference to TARGET_TYPE_PROC_CHIP target -/// @return FAPI2_RC_SUCCESS if success, else error code. -static fapi2::ReturnCode p9_sbe_chiplet_reset_nest_mc_call( - const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_cplt) -{ - FAPI_INF("Entering ..."); - - for (auto l_target_cplt : i_target_cplt.getChildren<fapi2::TARGET_TYPE_PERV> - (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_NEST | - fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_ALL_PCI | - fapi2::TARGET_FILTER_XBUS), fapi2::TARGET_STATE_FUNCTIONAL)) - { - // Configuring chiplet multicasting registers. - FAPI_DBG("Configuring multicasting registers for Nest,Xb,Obus,pcie chiplets" ); - FAPI_TRY(p9_sbe_chiplet_reset_mc_setup(l_target_cplt)); - } - - FAPI_INF("Exiting ..."); - -fapi_try_exit: - return fapi2::current_err; - -} - /// @brief Drop Endpoint reset /// Drop lvltrans fence /// @@ -1170,11 +1035,10 @@ static fapi2::ReturnCode p9_sbe_chiplet_reset_net_ctrl_lvltrans_fence_pcb_ep_reset( const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet) { + uint32_t l_attr_pg = 0; fapi2::buffer<uint64_t> l_data64; FAPI_INF("Entering ..."); - uint32_t l_attr_pg; - FAPI_DBG("Reading ATTR_PG"); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_chiplet, l_attr_pg)); @@ -1210,11 +1074,10 @@ fapi_try_exit: static fapi2::ReturnCode p9_sbe_chiplet_reset_opcg_cnfg( const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet) { + uint32_t l_attr_pg = 0; fapi2::buffer<uint64_t> l_data64; FAPI_INF("Entering ..."); - uint32_t l_attr_pg; - FAPI_DBG("Reading ATTR_PG"); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_chiplet, l_attr_pg)); @@ -1247,21 +1110,21 @@ fapi_try_exit: static fapi2::ReturnCode p9_sbe_chiplet_reset_opcg_cnfg_scan_ratio( const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_cplt) { + uint32_t l_attr_pg = 0; fapi2::buffer<uint64_t> l_data64; FAPI_INF("Entering ..."); - uint32_t l_attr_pg; - FAPI_DBG("Reading ATTR_PG"); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_cplt, l_attr_pg)); - if ( l_attr_pg != 0xFFFF ) + FAPI_DBG("Set scan ratio to 1:1 as long as PLL is in bypass mode"); + + //Setting OPCG_ALIGN register value + if (l_attr_pg != 0xFFFF) { - FAPI_DBG("Set scan ratio to 1:1 as long as PLL is in bypass mode"); - //Setting OPCG_ALIGN register value FAPI_TRY(fapi2::getScom(i_target_cplt, PERV_OPCG_ALIGN, l_data64)); l_data64.insertFromRight<PERV_1_OPCG_ALIGN_SCAN_RATIO, PERV_1_OPCG_ALIGN_SCAN_RATIO_LEN> - (p9SbeChipletReset::SCAN_RATIO_0X0); //OPCG_ALIGN.SCAN_RATIO = p9SbeChipletReset::SCAN_RATIO_0X0 + (p9SbeChipletReset::SCAN_RATIO_0X0); //OPCG_ALIGN.SCAN_RATIO = (l_attr_pg != 0xFFFF) ? p9SbeChipletReset::SCAN_RATIO_0X0 FAPI_TRY(fapi2::putScom(i_target_cplt, PERV_OPCG_ALIGN, l_data64)); } @@ -1280,26 +1143,18 @@ static fapi2::ReturnCode p9_sbe_chiplet_reset_scan0_call( const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chip) { fapi2::buffer<uint16_t> l_regions; - int l_timeout = 1 ; FAPI_INF("Entering ..."); FAPI_TRY(p9_perv_sbe_cmn_regions_setup_16(i_target_chip, p9SbeChipletReset::REGIONS_EXCEPT_VITAL, l_regions)); - while(l_timeout != 0) - { - - FAPI_DBG("run scan0 module for region except vital and pll, scan types GPTR, TIME, REPR"); - FAPI_TRY(p9_perv_sbe_cmn_scan0_module(i_target_chip, l_regions, - p9SbeChipletReset::SCAN_TYPES_TIME_GPTR_REPR)); + FAPI_DBG("run scan0 module for region except vital and pll, scan types GPTR, TIME, REPR"); + FAPI_TRY(p9_perv_sbe_cmn_scan0_module(i_target_chip, l_regions, + p9SbeChipletReset::SCAN_TYPES_TIME_GPTR_REPR)); - FAPI_DBG("run scan0 module for region except vital and pll, scan types except GPTR, TIME, REPR"); - FAPI_TRY(p9_perv_sbe_cmn_scan0_module(i_target_chip, l_regions, - p9SbeChipletReset::SCAN_TYPES_EXCEPT_TIME_GPTR_REPR)); - FAPI_DBG("Loop Count :%d", l_timeout); - --l_timeout; - - } + FAPI_DBG("run scan0 module for region except vital and pll, scan types except GPTR, TIME, REPR"); + FAPI_TRY(p9_perv_sbe_cmn_scan0_module(i_target_chip, l_regions, + p9SbeChipletReset::SCAN_TYPES_EXCEPT_TIME_GPTR_REPR)); FAPI_INF("Exiting ..."); @@ -1315,13 +1170,12 @@ fapi_try_exit: static fapi2::ReturnCode p9_sbe_chiplet_reset_setup(const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet) { + // Local variable and constant definition + uint32_t l_attr_pg = 0; + const uint64_t l_error_default_value = 0xFFFFFFFFFFFFFFFFull; fapi2::buffer<uint64_t> l_data64; FAPI_INF("Entering ..."); - // Local variable and constant definition - uint32_t l_attr_pg; - const uint64_t ERROR_DEFAULT_VALUE = 0xFFFFFFFFFFFFFFFFull; - FAPI_DBG("Reading ATTR_PG"); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_chiplet, l_attr_pg)); @@ -1335,8 +1189,9 @@ static fapi2::ReturnCode p9_sbe_chiplet_reset_setup(const FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_NET_CTRL0_WOR, l_data64)); //Setting ERROR_REG register value - //ERROR_REG = ERROR_DEFAULT_VALUE - FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_ERROR_REG, ERROR_DEFAULT_VALUE)); + //ERROR_REG = l_error_default_value + FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_ERROR_REG, + l_error_default_value)); } FAPI_INF("Exiting ..."); @@ -1345,3 +1200,34 @@ fapi_try_exit: return fapi2::current_err; } + +/// @brief Setup IOP Logic for PCIe +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PERV target +/// @return FAPI2_RC_SUCCESS if success, else error code. +static fapi2::ReturnCode p9_sbe_chiplet_reset_setup_iop_logic( + const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chip) +{ + fapi2::buffer<uint64_t> l_data64; + FAPI_INF("Entering ..."); + + //Setting CPLT_CONF1 register value + l_data64.flush<0>(); + l_data64.setBit<30>(); //CPLT_CONF1.TC_IOP_HSSPORWREN = 0b1 + FAPI_TRY(fapi2::putScom(i_target_chip, PERV_CPLT_CONF1_OR, l_data64)); + + fapi2::delay(p9SbeChipletReset::HW_NS_DELAY, + p9SbeChipletReset::SIM_CYCLE_DELAY); + + //Setting CPLT_CONF1 register value + l_data64.flush<0>(); + l_data64.setBit<28>(); //CPLT_CONF1.TC_IOP_SYS_RESET_PCS = 0b1 + l_data64.setBit<29>(); //CPLT_CONF1.TC_IOP_SYS_RESET_PMA = 0b1 + FAPI_TRY(fapi2::putScom(i_target_chip, PERV_CPLT_CONF1_OR, l_data64)); + + FAPI_INF("Exiting ..."); + +fapi_try_exit: + return fapi2::current_err; + +} diff --git a/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H b/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H index 441d1319..7867d6cf 100644 --- a/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H +++ b/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H @@ -26,6 +26,7 @@ /// 4) Similar way, Reset sys.config and OPCG setting for Nest and MC chiplet in sync mode /// /// Done +/// //------------------------------------------------------------------------------ // *HWP HW Owner : Abhishek Agarwal <abagarw8@in.ibm.com> // *HWP HW Backup Owner : Srinivas V. Naga <srinivan@in.ibm.com> @@ -55,7 +56,7 @@ enum P9_SBE_CHIPLET_RESET_Public_Constants HANG_PULSE_0X10 = 0x10, HANG_PULSE_0X0F = 0x0F, HANG_PULSE_0X06 = 0x06, - HANG_PULSE_0X17 = 0x18, + HANG_PULSE_0X17 = 0x17, HANG_PULSE_0X18 = 0x18, HANG_PULSE_0X22 = 0x22, HANG_PULSE_0X13 = 0x13, @@ -80,7 +81,9 @@ enum P9_SBE_CHIPLET_RESET_Public_Constants SCAN_RATIO_0X0 = 0x0, SYNC_CONFIG_4TO1 = 0X0800000000000000, HW_NS_DELAY = 200000, // unit is nano seconds - SIM_CYCLE_DELAY = 10000 // unit is cycles + SIM_CYCLE_DELAY = 10000, // unit is cycles + HANG_PULSE_0X12 = 0x12, + HANG_PULSE_0X1C = 0x1C }; } @@ -111,7 +114,4 @@ extern "C" fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip); } -fapi2::ReturnCode p9_sbe_chiplet_reset_pcie_iop_logic_setup( - const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chip); - #endif diff --git a/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C b/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C index dbdb7dc6..5952d1ee 100644 --- a/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C +++ b/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C @@ -7,7 +7,7 @@ /* */ /* EKB Project */ /* */ -/* COPYRIGHT 2015 */ +/* COPYRIGHT 2015,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -32,10 +32,12 @@ //## auto_generated #include "p9_sbe_common.H" +//## auto_generated #include "p9_const_common.H" -#include "p9_misc_scom_addresses_fld.H" -#include "p9_perv_scom_addresses.H" +#include <p9_perv_scom_addresses.H> +#include <p9_perv_scom_addresses_fld.H> +#include <p9_const_common.H> enum P9_SBE_COMMON_Private_Constants @@ -58,39 +60,39 @@ fapi2::ReturnCode p9_sbe_common_align_chiplets(const { fapi2::buffer<uint64_t> l_data64; int l_timeout = 0; - FAPI_DBG("Entering ..."); + FAPI_INF("Entering ..."); - FAPI_INF("For all chiplets: exit flush"); + FAPI_DBG("For all chiplets: exit flush"); //Setting CPLT_CTRL0 register value l_data64.flush<0>(); //CPLT_CTRL0.CTRL_CC_FLUSHMODE_INH_DC = 1 - l_data64.setBit<PEC_CPLT_CTRL0_CTRL_CC_FLUSHMODE_INH_DC>(); + l_data64.setBit<PERV_1_CPLT_CTRL0_CTRL_CC_FLUSHMODE_INH_DC>(); FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_CPLT_CTRL0_OR, l_data64)); - FAPI_INF("For all chiplets: enable alignement"); + FAPI_DBG("For all chiplets: enable alignement"); //Setting CPLT_CTRL0 register value l_data64.flush<0>(); //CPLT_CTRL0.CTRL_CC_FORCE_ALIGN_DC = 1 - l_data64.setBit<PEC_CPLT_CTRL0_CTRL_CC_FORCE_ALIGN_DC>(); + l_data64.setBit<PERV_1_CPLT_CTRL0_CTRL_CC_FORCE_ALIGN_DC>(); FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_CPLT_CTRL0_OR, l_data64)); - FAPI_INF("Clear chiplet is aligned"); + FAPI_DBG("Clear chiplet is aligned"); //Setting SYNC_CONFIG register value FAPI_TRY(fapi2::getScom(i_target_chiplets, PERV_SYNC_CONFIG, l_data64)); //SYNC_CONFIG.CLEAR_CHIPLET_IS_ALIGNED = 0b1 - l_data64.setBit<PEC_SYNC_CONFIG_CLEAR_CHIPLET_IS_ALIGNED>(); + l_data64.setBit<PERV_1_SYNC_CONFIG_CLEAR_CHIPLET_IS_ALIGNED>(); FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_SYNC_CONFIG, l_data64)); - FAPI_INF("unset clear chiplet is aligned" ); + FAPI_DBG("Unset Clear chiplet is aligned"); //Setting SYNC_CONFIG register value FAPI_TRY(fapi2::getScom(i_target_chiplets, PERV_SYNC_CONFIG, l_data64)); //SYNC_CONFIG.CLEAR_CHIPLET_IS_ALIGNED = 0b0 - l_data64.clearBit<PEC_SYNC_CONFIG_CLEAR_CHIPLET_IS_ALIGNED>(); + l_data64.clearBit<PERV_1_SYNC_CONFIG_CLEAR_CHIPLET_IS_ALIGNED>(); FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_SYNC_CONFIG, l_data64)); fapi2::delay(NS_DELAY, SIM_CYCLE_DELAY); - FAPI_INF("Poll OPCG done bit to check for run-N completeness"); + FAPI_DBG("Poll OPCG done bit to check for run-N completeness"); l_timeout = CPLT_ALIGN_CHECK_POLL_COUNT; //UNTIL CPLT_STAT0.CC_CTRL_CHIPLET_IS_ALIGNED_DC == 1 @@ -99,7 +101,7 @@ fapi2::ReturnCode p9_sbe_common_align_chiplets(const //Getting CPLT_STAT0 register value FAPI_TRY(fapi2::getScom(i_target_chiplets, PERV_CPLT_STAT0, l_data64)); bool l_poll_data = - l_data64.getBit<PEC_CPLT_STAT0_CC_CTRL_CHIPLET_IS_ALIGNED_DC>(); //bool l_poll_data = CPLT_STAT0.CC_CTRL_CHIPLET_IS_ALIGNED_DC + l_data64.getBit<PERV_1_CPLT_STAT0_CC_CTRL_CHIPLET_IS_ALIGNED_DC>(); //bool l_poll_data = CPLT_STAT0.CC_CTRL_CHIPLET_IS_ALIGNED_DC if (l_poll_data == 1) { @@ -110,26 +112,65 @@ fapi2::ReturnCode p9_sbe_common_align_chiplets(const --l_timeout; } - FAPI_INF("Loop Count :%d", l_timeout); + FAPI_DBG("Loop Count :%d", l_timeout); FAPI_ASSERT(l_timeout > 0, fapi2::CPLT_NOT_ALIGNED_ERR(), "ERROR:CHIPLET NOT ALIGNED"); - FAPI_INF("For all chiplets: disable alignement"); + FAPI_DBG("For all chiplets: disable alignement"); //Setting CPLT_CTRL0 register value l_data64.flush<0>(); //CPLT_CTRL0.CTRL_CC_FORCE_ALIGN_DC = 0 - l_data64.setBit<PEC_CPLT_CTRL0_CTRL_CC_FORCE_ALIGN_DC>(); + l_data64.setBit<PERV_1_CPLT_CTRL0_CTRL_CC_FORCE_ALIGN_DC>(); FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_CPLT_CTRL0_CLEAR, l_data64)); - FAPI_DBG("Exiting ..."); + FAPI_INF("Exiting ..."); fapi_try_exit: return fapi2::current_err; } +/// @brief check clocks status +/// +/// @param[in] i_regions regions from upper level input +/// @param[in] i_clock_status clock status +/// @param[in] i_reg bit status +/// @param[in] i_clock_cmd clock command +/// @param[out] o_exp_clock_status expected clock status +/// @return FAPI2_RC_SUCCESS if success, else error code. +fapi2::ReturnCode p9_sbe_common_check_status(const fapi2::buffer<uint64_t> + i_regions, + const fapi2::buffer<uint64_t> i_clock_status, + const bool i_reg, + const fapi2::buffer<uint8_t> i_clock_cmd, + fapi2::buffer<uint64_t>& o_exp_clock_status) +{ + FAPI_INF("Entering ..."); + + if ( (i_reg) && (i_clock_cmd == 0b01) ) + { + o_exp_clock_status = i_clock_status & (~(i_regions << 49)); + } + else + { + if ( (i_reg) && (i_clock_cmd == 0b10) ) + { + o_exp_clock_status = i_clock_status | (i_regions << 49); + } + else + { + o_exp_clock_status = i_clock_status; + } + } + + FAPI_INF("Exiting ..."); + + return fapi2::FAPI2_RC_SUCCESS; + +} + /// @brief --Setting Clock Region Register /// --Reading Clock status /// @@ -141,14 +182,14 @@ fapi2::ReturnCode p9_sbe_common_clock_start_allRegions(const fapi2::buffer<uint64_t> l_sl_clock_status; fapi2::buffer<uint64_t> l_nsl_clock_status; fapi2::buffer<uint64_t> l_ary_clock_status; - FAPI_DBG("Entering ..."); + FAPI_INF("Entering ..."); - FAPI_INF("Start remaining pervasive clocks (beyond PIB & NET)"); + FAPI_DBG("Start remaining pervasive clocks (beyond PIB & NET)"); //Setting CLK_REGION register value //CLK_REGION = CLK_REGION_VALUE FAPI_TRY(fapi2::putScom(i_anychiplet, PERV_CLK_REGION, CLK_REGION_VALUE)); - FAPI_INF("Check for clocks running (SL , NSL , ARY)"); + FAPI_DBG("Check for clocks running (SL , NSL , ARY)"); //Getting CLOCK_STAT_SL register value FAPI_TRY(fapi2::getScom(i_anychiplet, PERV_CLOCK_STAT_SL, l_sl_clock_status)); //l_sl_clock_status = CLOCK_STAT_SL @@ -174,7 +215,7 @@ fapi2::ReturnCode p9_sbe_common_clock_start_allRegions(const .set_READ_CLK_ARY(l_ary_clock_status), "CLOCK RUNNING STATUS IS NOT MATCHING WITH EXPECTED VALUE FOR ARRAY TYPE"); - FAPI_DBG("Exiting ..."); + FAPI_INF("Exiting ..."); fapi_try_exit: return fapi2::current_err; @@ -207,29 +248,33 @@ fapi2::ReturnCode p9_sbe_common_clock_start_stop(const fapi2::buffer<uint64_t> l_exp_nsl_clock_status; fapi2::buffer<uint64_t> l_exp_ary_clock_status; fapi2::buffer<uint8_t> l_clk_cmd; + fapi2::buffer<uint16_t> l_regions; + fapi2::buffer<uint8_t> l_reg_all; bool l_reg_sl = false; bool l_reg_nsl = false; bool l_reg_ary = false; fapi2::buffer<uint64_t> l_data64; - FAPI_DBG("Entering ..."); + FAPI_INF("Entering ..."); + i_regions.extractToRight<53, 11>(l_regions); + i_clock_types.extractToRight<5, 3>(l_reg_all); l_reg_sl = i_clock_types.getBit<5>(); l_reg_nsl = i_clock_types.getBit<6>(); l_reg_ary = i_clock_types.getBit<7>(); - FAPI_INF("Chiplet exit flush"); + FAPI_DBG("Chiplet exit flush"); //Setting CPLT_CTRL0 register value l_data64.flush<0>(); //CPLT_CTRL0.CTRL_CC_FLUSHMODE_INH_DC = 1 - l_data64.setBit<PEC_CPLT_CTRL0_CTRL_CC_FLUSHMODE_INH_DC>(); + l_data64.setBit<PERV_1_CPLT_CTRL0_CTRL_CC_FLUSHMODE_INH_DC>(); FAPI_TRY(fapi2::putScom(i_target, PERV_CPLT_CTRL0_OR, l_data64)); - FAPI_INF("Clear Scan region type register"); + FAPI_DBG("Clear Scan region type register"); //Setting SCAN_REGION_TYPE register value //SCAN_REGION_TYPE = 0 FAPI_TRY(fapi2::putScom(i_target, PERV_SCAN_REGION_TYPE, 0)); - FAPI_INF("Reading the initial status of clock controller"); + FAPI_DBG("Reading the initial status of clock controller"); //Getting CLOCK_STAT_SL register value FAPI_TRY(fapi2::getScom(i_target, PERV_CLOCK_STAT_SL, l_sl_clock_status)); //l_sl_clock_status = CLOCK_STAT_SL @@ -239,48 +284,24 @@ fapi2::ReturnCode p9_sbe_common_clock_start_stop(const //Getting CLOCK_STAT_ARY register value FAPI_TRY(fapi2::getScom(i_target, PERV_CLOCK_STAT_ARY, l_ary_clock_status)); //l_ary_clock_status = CLOCK_STAT_ARY - FAPI_INF("Clock status of SL_Register:%#018lX NSL_Register:%#018lX ARY_Register:%#018lX", + FAPI_DBG("Clock status of SL_Register:%#018lX NSL_Register:%#018lX ARY_Register:%#018lX", l_sl_clock_status, l_nsl_clock_status, l_ary_clock_status); i_clock_cmd.extractToRight<6, 2>(l_clk_cmd); - FAPI_INF("Setup all Clock Domains and Clock Types"); + FAPI_DBG("Setup all Clock Domains and Clock Types"); //Setting CLK_REGION register value FAPI_TRY(fapi2::getScom(i_target, PERV_CLK_REGION, l_data64)); - l_data64.insertFromRight<PEC_CLK_REGION_CLOCK_CMD, PEC_CLK_REGION_CLOCK_CMD_LEN> + l_data64.insertFromRight<PERV_1_CLK_REGION_CLOCK_CMD, PERV_1_CLK_REGION_CLOCK_CMD_LEN> (l_clk_cmd); //CLK_REGION.CLOCK_CMD = l_clk_cmd //CLK_REGION.SLAVE_MODE = i_startslave - l_data64.writeBit<PEC_CLK_REGION_SLAVE_MODE>(i_startslave); + l_data64.writeBit<PERV_1_CLK_REGION_SLAVE_MODE>(i_startslave); //CLK_REGION.MASTER_MODE = i_startmaster - l_data64.writeBit<PEC_CLK_REGION_MASTER_MODE>(i_startmaster); - //CLK_REGION.CLOCK_REGION_PERV = i_regions.getBit<53>() - l_data64.writeBit<4>(i_regions.getBit<53>()); - //CLK_REGION.CLOCK_REGION_UNIT1 = i_regions.getBit<54>() - l_data64.writeBit<5>(i_regions.getBit<54>()); - //CLK_REGION.CLOCK_REGION_UNIT2 = i_regions.getBit<55>() - l_data64.writeBit<6>(i_regions.getBit<55>()); - //CLK_REGION.CLOCK_REGION_UNIT3 = i_regions.getBit<56>() - l_data64.writeBit<7>(i_regions.getBit<56>()); - //CLK_REGION.CLOCK_REGION_UNIT4 = i_regions.getBit<57>() - l_data64.writeBit<8>(i_regions.getBit<57>()); - //CLK_REGION.CLOCK_REGION_UNIT5 = i_regions.getBit<58>() - l_data64.writeBit<9>(i_regions.getBit<58>()); - //CLK_REGION.CLOCK_REGION_UNIT6 = i_regions.getBit<59>() - l_data64.writeBit<10>(i_regions.getBit<59>()); - //CLK_REGION.CLOCK_REGION_UNIT7 = i_regions.getBit<60>() - l_data64.writeBit<11>(i_regions.getBit<60>()); - //CLK_REGION.CLOCK_REGION_UNIT8 = i_regions.getBit<61>() - l_data64.writeBit<12>(i_regions.getBit<61>()); - //CLK_REGION.CLOCK_REGION_UNIT9 = i_regions.getBit<62>() - l_data64.writeBit<13>(i_regions.getBit<62>()); - //CLK_REGION.CLOCK_REGION_UNIT10 = i_regions.getBit<63>() - l_data64.writeBit<14>(i_regions.getBit<63>()); - //CLK_REGION.SEL_THOLD_SL = l_reg_sl - l_data64.writeBit<PEC_CLK_REGION_SEL_THOLD_SL>(l_reg_sl); - //CLK_REGION.SEL_THOLD_NSL = l_reg_nsl - l_data64.writeBit<PEC_CLK_REGION_SEL_THOLD_NSL>(l_reg_nsl); - //CLK_REGION.SEL_THOLD_ARY = l_reg_ary - l_data64.writeBit<PEC_CLK_REGION_SEL_THOLD_ARY>(l_reg_ary); + l_data64.writeBit<PERV_1_CLK_REGION_MASTER_MODE>(i_startmaster); + //CLK_REGION.CLOCK_REGION_ALL_UNITS = l_regions + l_data64.insertFromRight<4, 11>(l_regions); + //CLK_REGION.SEL_THOLD_ALL = l_reg_all + l_data64.insertFromRight<48, 3>(l_reg_all); FAPI_TRY(fapi2::putScom(i_target, PERV_CLK_REGION, l_data64)); //To do do checking only for chiplets that dont have Master-slave mode enabled @@ -289,59 +310,20 @@ fapi2::ReturnCode p9_sbe_common_clock_start_stop(const { // Calculating the Expected clock status - if ( (l_reg_sl) && (i_clock_cmd == 0b01) ) - { - l_exp_sl_clock_status = l_sl_clock_status & (~(i_regions << 49)); - } - else - { - if ( (l_reg_sl) && (i_clock_cmd == 0b10) ) - { - l_exp_sl_clock_status = l_sl_clock_status | (i_regions << 49); - } - else - { - l_exp_sl_clock_status = l_sl_clock_status; - } - } + FAPI_TRY(p9_sbe_common_check_status(i_regions, l_sl_clock_status, l_reg_sl, + i_clock_cmd, l_exp_sl_clock_status)); - if ( (l_reg_nsl) && (i_clock_cmd == 0b01) ) - { - l_exp_nsl_clock_status = l_nsl_clock_status & (~(i_regions << 49)); - } - else - { - if ( (l_reg_nsl) && (i_clock_cmd == 0b10) ) - { - l_exp_nsl_clock_status = l_nsl_clock_status | (i_regions << 49); - } - else - { - l_exp_nsl_clock_status = l_nsl_clock_status; - } - } + FAPI_TRY(p9_sbe_common_check_status(i_regions, l_nsl_clock_status, l_reg_nsl, + i_clock_cmd, l_exp_nsl_clock_status)); - if ( (l_reg_ary) && (i_clock_cmd == 0b01) ) - { - l_exp_ary_clock_status = l_ary_clock_status & (~(i_regions << 49)); - } - else - { - if ( (l_reg_ary) && (i_clock_cmd == 0b10) ) - { - l_exp_ary_clock_status = l_ary_clock_status | (i_regions << 49); - } - else - { - l_exp_ary_clock_status = l_ary_clock_status; - } - } + FAPI_TRY(p9_sbe_common_check_status(i_regions, l_ary_clock_status, l_reg_ary, + i_clock_cmd, l_exp_ary_clock_status)); - FAPI_INF("Check for clocks running SL"); + FAPI_DBG("Check for clocks running SL"); //Getting CLOCK_STAT_SL register value FAPI_TRY(fapi2::getScom(i_target, PERV_CLOCK_STAT_SL, l_sl_clock_status)); //l_sl_clock_status = CLOCK_STAT_SL - FAPI_INF("Expected value is %#018lX, Actaul value is %#018lX", + FAPI_DBG("Expected value is %#018lX, Actaul value is %#018lX", l_exp_sl_clock_status, l_sl_clock_status); FAPI_ASSERT(l_sl_clock_status == l_exp_sl_clock_status, @@ -349,11 +331,11 @@ fapi2::ReturnCode p9_sbe_common_clock_start_stop(const .set_READ_CLK_SL(l_sl_clock_status), "CLOCK RUNNING STATUS FOR SL TYPE NOT MATCHING WITH EXPECTED VALUES"); - FAPI_INF("Check for clocks running NSL"); + FAPI_DBG("Check for clocks running NSL"); //Getting CLOCK_STAT_NSL register value FAPI_TRY(fapi2::getScom(i_target, PERV_CLOCK_STAT_NSL, l_nsl_clock_status)); //l_nsl_clock_status = CLOCK_STAT_NSL - FAPI_INF("Expected value is %#018lX, Actaul value is %#018lX", + FAPI_DBG("Expected value is %#018lX, Actaul value is %#018lX", l_exp_nsl_clock_status, l_nsl_clock_status); FAPI_ASSERT(l_nsl_clock_status == l_exp_nsl_clock_status, @@ -361,11 +343,11 @@ fapi2::ReturnCode p9_sbe_common_clock_start_stop(const .set_READ_CLK_NSL(l_nsl_clock_status), "CLOCK RUNNING STATUS IS NOT MATCHING WITH EXPECTED VALUE FOR NSL TYPE"); - FAPI_INF("Check for clocks running ARY"); + FAPI_DBG("Check for clocks running ARY"); //Getting CLOCK_STAT_ARY register value FAPI_TRY(fapi2::getScom(i_target, PERV_CLOCK_STAT_ARY, l_ary_clock_status)); //l_ary_clock_status = CLOCK_STAT_ARY - FAPI_INF("Expected value is %#018lX, Actaul value is %#018lX", + FAPI_DBG("Expected value is %#018lX, Actaul value is %#018lX", l_exp_ary_clock_status, l_ary_clock_status); FAPI_ASSERT(l_ary_clock_status == l_exp_ary_clock_status, @@ -374,7 +356,7 @@ fapi2::ReturnCode p9_sbe_common_clock_start_stop(const "CLOCK RUNNING STATUS IS NOT MATCHING WITH EXPECTED VALUE FOR ARRAY TYPE"); } - FAPI_DBG("Exiting ..."); + FAPI_INF("Exiting ..."); fapi_try_exit: return fapi2::current_err; @@ -389,15 +371,15 @@ fapi2::ReturnCode p9_sbe_common_set_scan_ratio(const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplets) { fapi2::buffer<uint64_t> l_data64; - FAPI_DBG("Entering ..."); + FAPI_INF("Entering ..."); //Setting OPCG_ALIGN register value FAPI_TRY(fapi2::getScom(i_target_chiplets, PERV_OPCG_ALIGN, l_data64)); - l_data64.insertFromRight<PEC_OPCG_ALIGN_SCAN_RATIO, PEC_OPCG_ALIGN_SCAN_RATIO_LEN> + l_data64.insertFromRight<PERV_1_OPCG_ALIGN_SCAN_RATIO, PERV_1_OPCG_ALIGN_SCAN_RATIO_LEN> (0xE0); //OPCG_ALIGN.SCAN_RATIO = 0xE0 FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_OPCG_ALIGN, l_data64)); - FAPI_DBG("Exiting ..."); + FAPI_INF("Exiting ..."); fapi_try_exit: return fapi2::current_err; diff --git a/import/chips/p9/procedures/hwp/perv/p9_sbe_common.H b/import/chips/p9/procedures/hwp/perv/p9_sbe_common.H index 6aca606a..92e97fc6 100644 --- a/import/chips/p9/procedures/hwp/perv/p9_sbe_common.H +++ b/import/chips/p9/procedures/hwp/perv/p9_sbe_common.H @@ -7,7 +7,7 @@ /* */ /* EKB Project */ /* */ -/* COPYRIGHT 2015 */ +/* COPYRIGHT 2015,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -40,6 +40,13 @@ fapi2::ReturnCode p9_sbe_common_align_chiplets(const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplets); +fapi2::ReturnCode p9_sbe_common_check_status(const fapi2::buffer<uint64_t> + i_regions, + const fapi2::buffer<uint64_t> i_clock_status, + const bool i_reg, + const fapi2::buffer<uint8_t> i_clock_cmd, + fapi2::buffer<uint64_t>& o_exp_clock_status); + fapi2::ReturnCode p9_sbe_common_clock_start_allRegions(const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_anychiplet); diff --git a/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C b/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C index 233e6f2a..081d6954 100644 --- a/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C +++ b/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C @@ -32,9 +32,12 @@ //## auto_generated #include "p9_sbe_nest_startclocks.H" +//## auto_generated +#include "p9_const_common.H" #include <p9_perv_scom_addresses.H> #include <p9_perv_scom_addresses_fld.H> +#include <p9_quad_scom_addresses_fld.H> #include <p9_perv_sbe_cmn.H> #include <p9_sbe_common.H> @@ -100,112 +103,123 @@ fapi2::ReturnCode p9_sbe_nest_startclocks(const FAPI_DBG("pg targets vector: %#018lX", l_pg_vector); } - - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_NEST_WEST, fapi2::TARGET_STATE_FUNCTIONAL)) { - FAPI_DBG("Regions setup : N3 start clock"); - FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(l_trgt_chplt, + FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(l_target_cplt, REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_n3_clock_regions)); - FAPI_DBG("Regions value: %#018lX", l_n3_clock_regions); + FAPI_DBG("pg targets vector: %#018lX", l_pg_vector); - FAPI_DBG("Region setup : N3 check cc status"); - FAPI_TRY(p9_perv_sbe_cmn_regions_setup_16(l_trgt_chplt, + FAPI_TRY(p9_perv_sbe_cmn_regions_setup_16(l_target_cplt, REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_n3_ccstatus_regions)); - FAPI_DBG("Regions value: %#018lX", l_n3_ccstatus_regions); + FAPI_DBG("pg targets vector: %#018lX", l_pg_vector); } - FAPI_DBG("Reading ATTR_MC_SYNC_MODE"); + FAPI_DBG("Switch MC meshs to Nest mesh"); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MC_SYNC_MODE, i_target_chip, l_read_attr)); - if ( l_read_attr ) - { - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> - (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC | - fapi2::TARGET_FILTER_ALL_NEST), fapi2::TARGET_STATE_FUNCTIONAL)) - { - FAPI_DBG("Call p9_sbe_nest_startclocks_cplt_ctrl_action_function for Nest and Mc chiplets"); - FAPI_TRY(p9_sbe_nest_startclocks_cplt_ctrl_action_function(l_trgt_chplt)); - } + fapi2::TargetFilter l_nest_filter, l_nest_tp_filter; - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> - (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC | - fapi2::TARGET_FILTER_ALL_NEST | fapi2::TARGET_FILTER_TP), - fapi2::TARGET_STATE_FUNCTIONAL)) - { - FAPI_DBG("Call module align chiplets for Nest and Mc chiplets"); - FAPI_TRY(p9_sbe_common_align_chiplets(l_trgt_chplt)); - } + if (l_read_attr) + { + l_nest_filter = static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC | + fapi2::TARGET_FILTER_ALL_NEST); + l_nest_tp_filter = static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC + | fapi2::TARGET_FILTER_ALL_NEST | fapi2::TARGET_FILTER_TP); + } + else + { + l_nest_filter = fapi2::TARGET_FILTER_ALL_NEST; + l_nest_tp_filter = static_cast<fapi2::TargetFilter> + (fapi2::TARGET_FILTER_ALL_NEST | fapi2::TARGET_FILTER_TP); + } - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> - (fapi2::TARGET_FILTER_NEST_WEST, fapi2::TARGET_STATE_FUNCTIONAL)) - { - FAPI_DBG("Drop chiplet fence for N3"); - FAPI_TRY(p9_sbe_nest_startclocks_N3_fence_drop(l_trgt_chplt, l_pg_vector)); - } + for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (fapi2::TARGET_FILTER_NEST_WEST, fapi2::TARGET_STATE_FUNCTIONAL)) + { + FAPI_DBG("Drop chiplet fence for N3"); + FAPI_TRY(p9_sbe_nest_startclocks_N3_fence_drop(l_trgt_chplt, l_pg_vector)); + } - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> - (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_NEST_NORTH | - fapi2::TARGET_FILTER_NEST_SOUTH | fapi2::TARGET_FILTER_NEST_EAST), - fapi2::TARGET_STATE_FUNCTIONAL)) - { - FAPI_DBG("Drop chiplet fence for N0,N1,N2"); - FAPI_TRY(p9_sbe_nest_startclocks_nest_fence_drop(l_trgt_chplt, l_pg_vector)); - } + for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_NEST_NORTH | + fapi2::TARGET_FILTER_NEST_SOUTH | fapi2::TARGET_FILTER_NEST_EAST), + fapi2::TARGET_STATE_FUNCTIONAL)) + { + FAPI_DBG("Drop chiplet fence for N0,N1,N2"); + FAPI_TRY(p9_sbe_nest_startclocks_nest_fence_drop(l_trgt_chplt, l_pg_vector)); + } + if ( l_read_attr ) + { for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_MC, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("Drop chiplet fence for MC"); FAPI_TRY(p9_sbe_nest_startclocks_mc_fence_drop(l_trgt_chplt, l_pg_vector)); } + } - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> - (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_NEST_NORTH | - fapi2::TARGET_FILTER_NEST_SOUTH | fapi2::TARGET_FILTER_NEST_EAST), - fapi2::TARGET_STATE_FUNCTIONAL)) - { - FAPI_DBG("Regions value: %#018lX", l_clock_regions); - FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(l_trgt_chplt, - REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_clock_regions)); - FAPI_DBG("Regions value: %#018lX", l_clock_regions); + for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (l_nest_filter, fapi2::TARGET_STATE_FUNCTIONAL)) + { + FAPI_DBG("Call p9_sbe_nest_startclocks_cplt_ctrl_action_function for Nest and Mc chiplets"); + FAPI_TRY(p9_sbe_nest_startclocks_cplt_ctrl_action_function(l_trgt_chplt)); + } + for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (l_nest_tp_filter, fapi2::TARGET_STATE_FUNCTIONAL)) + { + FAPI_DBG("Call module align chiplets for Nest and Mc chiplets"); + FAPI_TRY(p9_sbe_common_align_chiplets(l_trgt_chplt)); + } - FAPI_DBG("Call module clock start stop for N0, N1, N2"); - FAPI_TRY(p9_sbe_common_clock_start_stop(l_trgt_chplt, CLOCK_CMD, STARTSLAVE, - DONT_STARTMASTER, l_clock_regions, CLOCK_TYPES)); - } + for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_NEST_NORTH | + fapi2::TARGET_FILTER_NEST_SOUTH | fapi2::TARGET_FILTER_NEST_EAST), + fapi2::TARGET_STATE_FUNCTIONAL)) + { + FAPI_DBG("Regions value: %#018lX", l_clock_regions); + FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(l_trgt_chplt, + REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_clock_regions)); - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> - (fapi2::TARGET_FILTER_NEST_WEST, fapi2::TARGET_STATE_FUNCTIONAL)) - { - FAPI_DBG("Call module clock start stop for N3"); - FAPI_TRY(p9_sbe_common_clock_start_stop(l_trgt_chplt, CLOCK_CMD, - DONT_STARTSLAVE, STARTMASTER, l_n3_clock_regions, CLOCK_TYPES)); - } + FAPI_DBG("Call module clock start stop for N0, N1, N2"); + FAPI_TRY(p9_sbe_common_clock_start_stop(l_trgt_chplt, CLOCK_CMD, STARTSLAVE, + DONT_STARTMASTER, l_clock_regions, CLOCK_TYPES)); + } - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> - (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_NEST_NORTH | - fapi2::TARGET_FILTER_NEST_SOUTH | fapi2::TARGET_FILTER_NEST_EAST), - fapi2::TARGET_STATE_FUNCTIONAL)) - { - FAPI_TRY(p9_perv_sbe_cmn_regions_setup_16(l_trgt_chplt, - REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_ccstatus_regions)); - FAPI_DBG("Regions value: %#018lX", l_ccstatus_regions); + for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (fapi2::TARGET_FILTER_NEST_WEST, fapi2::TARGET_STATE_FUNCTIONAL)) + { + FAPI_TRY(p9_sbe_common_clock_start_stop(l_target_cplt, CLOCK_CMD, + DONT_STARTSLAVE, STARTMASTER, l_n3_clock_regions, CLOCK_TYPES)); + FAPI_DBG("pg targets vector: %#018lX", l_pg_vector); + } - FAPI_DBG("Call clockstatus check function for N0,N1,N2"); - FAPI_TRY(p9_sbe_nest_startclocks_check_cc_status_function(l_trgt_chplt, - CLOCK_CMD, l_ccstatus_regions, CLOCK_TYPES)); - } + for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_NEST_NORTH | + fapi2::TARGET_FILTER_NEST_SOUTH | fapi2::TARGET_FILTER_NEST_EAST), + fapi2::TARGET_STATE_FUNCTIONAL)) + { + FAPI_TRY(p9_perv_sbe_cmn_regions_setup_16(l_trgt_chplt, + REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_ccstatus_regions)); + FAPI_DBG("Regions value: %#018lX", l_ccstatus_regions); - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> - (fapi2::TARGET_FILTER_NEST_WEST, fapi2::TARGET_STATE_FUNCTIONAL)) - { - FAPI_DBG("Call clockstatus check function for N3"); - FAPI_TRY(p9_sbe_nest_startclocks_check_cc_status_function(l_trgt_chplt, - CLOCK_CMD, l_n3_ccstatus_regions, CLOCK_TYPES)); - } + FAPI_DBG("Call clockstatus check function for N0,N1,N2"); + FAPI_TRY(p9_sbe_nest_startclocks_check_cc_status_function(l_trgt_chplt, + CLOCK_CMD, l_ccstatus_regions, CLOCK_TYPES)); + } + for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (fapi2::TARGET_FILTER_NEST_WEST, fapi2::TARGET_STATE_FUNCTIONAL)) + { + FAPI_TRY(p9_sbe_nest_startclocks_check_cc_status_function(l_target_cplt, + CLOCK_CMD, l_n3_ccstatus_regions, CLOCK_TYPES)); + FAPI_DBG("pg targets vector: %#018lX", l_pg_vector); + } + + if ( l_read_attr ) + { for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_MC, fapi2::TARGET_STATE_FUNCTIONAL)) { @@ -217,114 +231,19 @@ fapi2::ReturnCode p9_sbe_nest_startclocks(const FAPI_TRY(p9_sbe_common_clock_start_stop(l_trgt_chplt, CLOCK_CMD, DONT_STARTSLAVE, DONT_STARTMASTER, l_clock_regions, CLOCK_TYPES)); } - - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> - (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC | - fapi2::TARGET_FILTER_ALL_NEST), fapi2::TARGET_STATE_FUNCTIONAL)) - { - FAPI_DBG("Call sbe_nest_startclocks_check_checkstop_function for Nest and Mc chiplets "); - FAPI_TRY(p9_sbe_nest_startclocks_check_checkstop_function(l_trgt_chplt)); - } - - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> - (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC | - fapi2::TARGET_FILTER_ALL_NEST | fapi2::TARGET_FILTER_TP), - fapi2::TARGET_STATE_FUNCTIONAL)) - { - FAPI_TRY(p9_sbe_nest_startclocks_flushmode(l_trgt_chplt)); - } } - else - { - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> - (fapi2::TARGET_FILTER_ALL_NEST, fapi2::TARGET_STATE_FUNCTIONAL)) - { - FAPI_DBG("Call p9_sbe_nest_startclocks_cplt_ctrl_action_function for nest chiplets"); - FAPI_TRY(p9_sbe_nest_startclocks_cplt_ctrl_action_function(l_trgt_chplt)); - } - - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> - (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_NEST | - fapi2::TARGET_FILTER_TP), fapi2::TARGET_STATE_FUNCTIONAL)) - { - FAPI_DBG("call module align chiplets for nest chiplets"); - FAPI_TRY(p9_sbe_common_align_chiplets(l_trgt_chplt)); - } - - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> - (fapi2::TARGET_FILTER_NEST_WEST, fapi2::TARGET_STATE_FUNCTIONAL)) - { - FAPI_DBG("Drop chiplet fence for N3"); - FAPI_TRY(p9_sbe_nest_startclocks_N3_fence_drop(l_trgt_chplt, l_pg_vector)); - } - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> - (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_NEST_NORTH | - fapi2::TARGET_FILTER_NEST_SOUTH | fapi2::TARGET_FILTER_NEST_EAST), - fapi2::TARGET_STATE_FUNCTIONAL)) - { - FAPI_DBG("Drop chiplet fence for N0,N1,N2"); - FAPI_TRY(p9_sbe_nest_startclocks_nest_fence_drop(l_trgt_chplt, l_pg_vector)); - } - - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> - (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_NEST_NORTH | - fapi2::TARGET_FILTER_NEST_SOUTH | fapi2::TARGET_FILTER_NEST_EAST), - fapi2::TARGET_STATE_FUNCTIONAL)) - { - FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(l_trgt_chplt, - REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_clock_regions)); - FAPI_DBG("Regions value: %#018lX", l_clock_regions); - - FAPI_DBG("Call module clock start stop for N0, N1, N2"); - FAPI_TRY(p9_sbe_common_clock_start_stop(l_trgt_chplt, CLOCK_CMD, STARTSLAVE, - DONT_STARTMASTER, l_clock_regions, CLOCK_TYPES)); - } - - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> - (fapi2::TARGET_FILTER_NEST_WEST, fapi2::TARGET_STATE_FUNCTIONAL)) - { - FAPI_DBG("Call module clock start stop for N3"); - FAPI_TRY(p9_sbe_common_clock_start_stop(l_trgt_chplt, CLOCK_CMD, - DONT_STARTSLAVE, STARTMASTER, l_n3_clock_regions, CLOCK_TYPES)); - } - - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> - (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_NEST_NORTH | - fapi2::TARGET_FILTER_NEST_SOUTH | fapi2::TARGET_FILTER_NEST_EAST), - fapi2::TARGET_STATE_FUNCTIONAL)) - { - FAPI_DBG("region setup : n0,n1,n2"); - FAPI_TRY(p9_perv_sbe_cmn_regions_setup_16(l_trgt_chplt, - REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_ccstatus_regions)); - FAPI_DBG("Regions value: %#018lX", l_ccstatus_regions); - - FAPI_DBG("Call clockstatus check function for N0,N1,N2"); - FAPI_TRY(p9_sbe_nest_startclocks_check_cc_status_function(l_trgt_chplt, - CLOCK_CMD, l_ccstatus_regions, CLOCK_TYPES)); - } - - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> - (fapi2::TARGET_FILTER_NEST_WEST, fapi2::TARGET_STATE_FUNCTIONAL)) - { - FAPI_DBG("Call clockstatus check function for N3"); - FAPI_TRY(p9_sbe_nest_startclocks_check_cc_status_function(l_trgt_chplt, - CLOCK_CMD, l_n3_ccstatus_regions, CLOCK_TYPES)); - } - - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> - (fapi2::TARGET_FILTER_ALL_NEST, fapi2::TARGET_STATE_FUNCTIONAL)) - { - FAPI_DBG("call sbe_nest_startclocks_check_checkstop_function for nest chiplets"); - FAPI_TRY(p9_sbe_nest_startclocks_check_checkstop_function(l_trgt_chplt)); - } + for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (l_nest_filter, fapi2::TARGET_STATE_FUNCTIONAL)) + { + FAPI_DBG("Call sbe_nest_startclocks_check_checkstop_function for Nest and Mc chiplets "); + FAPI_TRY(p9_sbe_nest_startclocks_check_checkstop_function(l_trgt_chplt)); + } - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> - (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_NEST | - fapi2::TARGET_FILTER_TP), fapi2::TARGET_STATE_FUNCTIONAL)) - { - FAPI_TRY(p9_sbe_nest_startclocks_flushmode(l_trgt_chplt)); - } + for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + (l_nest_tp_filter, fapi2::TARGET_STATE_FUNCTIONAL)) + { + FAPI_TRY(p9_sbe_nest_startclocks_flushmode(l_trgt_chplt)); } FAPI_INF("Exiting ..."); @@ -334,7 +253,7 @@ fapi_try_exit: } -/// @brief Drop chiplet fence for N3 +/// @brief Drop chiplet fence for OB chiplet /// /// @param[in] i_target_chip Reference to TARGET_TYPE_PERV target /// @param[in] i_pg_vector Pg vector of targets @@ -351,7 +270,7 @@ static fapi2::ReturnCode p9_sbe_nest_startclocks_N3_fence_drop( FAPI_DBG("Drop chiplet fence"); //Setting NET_CTRL0 register value l_data64.flush<1>(); - l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>(); //NET_CTRL0.FENCE_EN = 0 + l_data64.clearBit<C_NET_CTRL0_FENCE_EN>(); //NET_CTRL0.FENCE_EN = 0 FAPI_TRY(fapi2::putScom(i_target_chip, PERV_NET_CTRL0_WAND, l_data64)); } @@ -544,49 +463,32 @@ fapi_try_exit: static fapi2::ReturnCode p9_sbe_nest_startclocks_cplt_ctrl_action_function( const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet) { - fapi2::buffer<uint64_t> l_data64; - FAPI_INF("Entering ..."); - // Local variable and constant definition fapi2::buffer <uint32_t> l_attr_pg; + fapi2::buffer <uint16_t> l_attr_pg_data; + fapi2::buffer<uint64_t> l_data64; + FAPI_INF("Entering ..."); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_chiplet, l_attr_pg)); l_attr_pg.invert(); + l_attr_pg.extractToRight<20, 11>(l_attr_pg_data); FAPI_DBG("Drop partial good fences"); //Setting CPLT_CTRL1 register value l_data64.flush<0>(); - l_data64.writeBit<PERV_1_CPLT_CTRL1_TC_VITL_REGION_FENCE> - (l_attr_pg.getBit<19>()); //CPLT_CTRL1.TC_VITL_REGION_FENCE = l_attr_pg.getBit<19>() - l_data64.writeBit<PERV_1_CPLT_CTRL1_TC_PERV_REGION_FENCE> - (l_attr_pg.getBit<20>()); //CPLT_CTRL1.TC_PERV_REGION_FENCE = l_attr_pg.getBit<20>() - //CPLT_CTRL1.TC_REGION1_FENCE = l_attr_pg.getBit<21>() - l_data64.writeBit<5>(l_attr_pg.getBit<21>()); - //CPLT_CTRL1.TC_REGION2_FENCE = l_attr_pg.getBit<22>() - l_data64.writeBit<6>(l_attr_pg.getBit<22>()); - //CPLT_CTRL1.TC_REGION3_FENCE = l_attr_pg.getBit<23>() - l_data64.writeBit<PERV_1_CPLT_CTRL1_TC_REGION3_FENCE>(l_attr_pg.getBit<23>()); - //CPLT_CTRL1.TC_REGION4_FENCE = l_attr_pg.getBit<24>() - l_data64.writeBit<8>(l_attr_pg.getBit<24>()); - //CPLT_CTRL1.TC_REGION5_FENCE = l_attr_pg.getBit<25>() - l_data64.writeBit<9>(l_attr_pg.getBit<25>()); - //CPLT_CTRL1.TC_REGION6_FENCE = l_attr_pg.getBit<26>() - l_data64.writeBit<10>(l_attr_pg.getBit<26>()); - //CPLT_CTRL1.TC_REGION7_FENCE = l_attr_pg.getBit<27>() - l_data64.writeBit<11>(l_attr_pg.getBit<27>()); - //CPLT_CTRL1.UNUSED_12B = l_attr_pg.getBit<28>() - l_data64.writeBit<PERV_1_CPLT_CTRL1_UNUSED_12B>(l_attr_pg.getBit<28>()); - //CPLT_CTRL1.UNUSED_13B = l_attr_pg.getBit<29>() - l_data64.writeBit<PERV_1_CPLT_CTRL1_UNUSED_13B>(l_attr_pg.getBit<29>()); - //CPLT_CTRL1.UNUSED_14B = l_attr_pg.getBit<30>() - l_data64.writeBit<PERV_1_CPLT_CTRL1_UNUSED_14B>(l_attr_pg.getBit<30>()); + //CPLT_CTRL1.TC_VITL_REGION_FENCE = l_attr_pg.getBit<19>() + l_data64.writeBit<C_CPLT_CTRL1_TC_VITL_REGION_FENCE>(l_attr_pg.getBit<19>()); + //CPLT_CTRL1.TC_ALL_REGIONS_FENCE = l_attr_pg_data + l_data64.insertFromRight<4, 11>(l_attr_pg_data); FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_CPLT_CTRL1_CLEAR, l_data64)); FAPI_DBG("reset abistclk_muxsel and syncclk_muxsel"); //Setting CPLT_CTRL0 register value l_data64.flush<0>(); + //CPLT_CTRL0.CTRL_CC_ABSTCLK_MUXSEL_DC = 1 l_data64.setBit<PERV_1_CPLT_CTRL0_CTRL_CC_ABSTCLK_MUXSEL_DC>(); + //CPLT_CTRL0.TC_UNIT_SYNCCLK_MUXSEL_DC = 1 l_data64.setBit<PERV_1_CPLT_CTRL0_TC_UNIT_SYNCCLK_MUXSEL_DC>(); FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_CPLT_CTRL0_CLEAR, l_data64)); @@ -691,7 +593,7 @@ static fapi2::ReturnCode p9_sbe_nest_startclocks_mc_fence_drop( FAPI_DBG("Drop chiplet fence"); //Setting NET_CTRL0 register value l_data64.flush<1>(); - l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>(); //NET_CTRL0.FENCE_EN = 0 + l_data64.clearBit<C_NET_CTRL0_FENCE_EN>(); //NET_CTRL0.FENCE_EN = 0 FAPI_TRY(fapi2::putScom(i_target_chip, PERV_NET_CTRL0_WAND, l_data64)); } } @@ -703,7 +605,7 @@ static fapi2::ReturnCode p9_sbe_nest_startclocks_mc_fence_drop( FAPI_DBG("Drop chiplet fence"); //Setting NET_CTRL0 register value l_data64.flush<1>(); - l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>(); //NET_CTRL0.FENCE_EN = 0 + l_data64.clearBit<C_NET_CTRL0_FENCE_EN>(); //NET_CTRL0.FENCE_EN = 0 FAPI_TRY(fapi2::putScom(i_target_chip, PERV_NET_CTRL0_WAND, l_data64)); } } @@ -732,7 +634,7 @@ static fapi2::ReturnCode p9_sbe_nest_startclocks_nest_fence_drop( FAPI_DBG("Drop chiplet fence"); //Setting NET_CTRL0 register value l_data64.flush<1>(); - l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>(); //NET_CTRL0.FENCE_EN = 0 + l_data64.clearBit<C_NET_CTRL0_FENCE_EN>(); //NET_CTRL0.FENCE_EN = 0 FAPI_TRY(fapi2::putScom(i_target_chip, PERV_NET_CTRL0_WAND, l_data64)); } diff --git a/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C b/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C index c71b18b7..c14d0a57 100644 --- a/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C +++ b/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C @@ -32,6 +32,8 @@ //## auto_generated #include "p9_sbe_startclock_chiplets.H" +//## auto_generated +#include "p9_const_common.H" #include <p9_perv_scom_addresses.H> #include <p9_perv_scom_addresses_fld.H> @@ -113,20 +115,13 @@ fapi2::ReturnCode p9_sbe_startclock_chiplets(const DONT_STARTSLAVE, DONT_STARTMASTER, l_regions, CLOCK_TYPES)); } - //FAPI_DBG("Drop chiplet fence for Xbus"); - /* FAPI_TRY(p9_sbe_startclock_chiplets_xb_fence_drop( - i_target_chiplets.getChildren<fapi2::TARGET_TYPE_PERV> - (fapi2::TARGET_FILTER_XBUS, fapi2::TARGET_STATE_FUNCTIONAL)[0], l_pg_vector));*/ - for (auto l_trgt_chplt : i_target_chiplets.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_XBUS, fapi2::TARGET_STATE_FUNCTIONAL)) { - FAPI_DBG("Drop Chiplet fence for Xbus"); + FAPI_DBG("Drop chiplet fence for Xbus"); FAPI_TRY(p9_sbe_startclock_chiplets_xb_fence_drop(l_trgt_chplt, l_pg_vector)); } - - for (auto l_trgt_chplt : i_target_chiplets.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_OBUS, fapi2::TARGET_STATE_FUNCTIONAL)) { @@ -202,15 +197,16 @@ fapi_try_exit: static fapi2::ReturnCode p9_sbe_startclock_chiplets_cplt_ctrl_action_function( const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet) { - fapi2::buffer<uint64_t> l_data64; - FAPI_INF("Entering ..."); - // Local variable and constant definition fapi2::buffer <uint32_t> l_attr_pg; + fapi2::buffer <uint16_t> l_cplt_ctrl_init; + fapi2::buffer<uint64_t> l_data64; + FAPI_INF("Entering ..."); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_chiplet, l_attr_pg)); l_attr_pg.invert(); + l_attr_pg.extractToRight<20, 11>(l_cplt_ctrl_init); // Not needed as have only nest chiplet (no dual clock controller) Bit 62 ->0 // @@ -219,35 +215,17 @@ static fapi2::ReturnCode p9_sbe_startclock_chiplets_cplt_ctrl_action_function( l_data64.flush<0>(); l_data64.writeBit<PERV_1_CPLT_CTRL1_TC_VITL_REGION_FENCE> (l_attr_pg.getBit<19>()); //CPLT_CTRL1.TC_VITL_REGION_FENCE = l_attr_pg.getBit<19>() - l_data64.writeBit<PERV_1_CPLT_CTRL1_TC_PERV_REGION_FENCE> - (l_attr_pg.getBit<20>()); //CPLT_CTRL1.TC_PERV_REGION_FENCE = l_attr_pg.getBit<20>() - //CPLT_CTRL1.TC_REGION1_FENCE = l_attr_pg.getBit<21>() - l_data64.writeBit<5>(l_attr_pg.getBit<21>()); - //CPLT_CTRL1.TC_REGION2_FENCE = l_attr_pg.getBit<22>() - l_data64.writeBit<6>(l_attr_pg.getBit<22>()); - //CPLT_CTRL1.TC_REGION3_FENCE = l_attr_pg.getBit<23>() - l_data64.writeBit<PERV_1_CPLT_CTRL1_TC_REGION3_FENCE>(l_attr_pg.getBit<23>()); - //CPLT_CTRL1.TC_REGION4_FENCE = l_attr_pg.getBit<24>() - l_data64.writeBit<8>(l_attr_pg.getBit<24>()); - //CPLT_CTRL1.TC_REGION5_FENCE = l_attr_pg.getBit<25>() - l_data64.writeBit<9>(l_attr_pg.getBit<25>()); - //CPLT_CTRL1.TC_REGION6_FENCE = l_attr_pg.getBit<26>() - l_data64.writeBit<10>(l_attr_pg.getBit<26>()); - //CPLT_CTRL1.TC_REGION7_FENCE = l_attr_pg.getBit<27>() - l_data64.writeBit<11>(l_attr_pg.getBit<27>()); - //CPLT_CTRL1.UNUSED_12B = l_attr_pg.getBit<28>() - l_data64.writeBit<PERV_1_CPLT_CTRL1_UNUSED_12B>(l_attr_pg.getBit<28>()); - //CPLT_CTRL1.UNUSED_13B = l_attr_pg.getBit<29>() - l_data64.writeBit<PERV_1_CPLT_CTRL1_UNUSED_13B>(l_attr_pg.getBit<29>()); - //CPLT_CTRL1.UNUSED_14B = l_attr_pg.getBit<30>() - l_data64.writeBit<PERV_1_CPLT_CTRL1_UNUSED_14B>(l_attr_pg.getBit<30>()); + //CPLT_CTRL1.TC_ALL_REGIONS_FENCE = l_cplt_ctrl_init + l_data64.insertFromRight<4, 11>(l_cplt_ctrl_init); FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_CPLT_CTRL1_CLEAR, l_data64)); - FAPI_DBG("reset abistclk_muxsel"); + FAPI_DBG("reset abistclk_muxsel and syncclk_muxsel"); //Setting CPLT_CTRL0 register value l_data64.flush<0>(); - //CPLT_CTRL0.CTRL_CC_ABSTCLK_MUXSEL_DC = 0 + //CPLT_CTRL0.CTRL_CC_ABSTCLK_MUXSEL_DC = 1 l_data64.setBit<PERV_1_CPLT_CTRL0_CTRL_CC_ABSTCLK_MUXSEL_DC>(); + //CPLT_CTRL0.TC_UNIT_SYNCCLK_MUXSEL_DC = 1 + l_data64.setBit<PERV_1_CPLT_CTRL0_TC_UNIT_SYNCCLK_MUXSEL_DC>(); FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_CPLT_CTRL0_CLEAR, l_data64)); FAPI_INF("Exiting ..."); @@ -316,12 +294,14 @@ static fapi2::ReturnCode p9_sbe_startclock_chiplets_ob_fence_drop( fapi2::buffer<uint64_t> l_data64; FAPI_INF("Entering ..."); - if ( i_pg_vector.getBit<2>() == 1 ) + FAPI_DBG("Drop chiplet fence"); + + //Setting NET_CTRL0 register value + if (i_pg_vector.getBit<2>() == 1) { - FAPI_DBG("Drop chiplet fence"); - //Setting NET_CTRL0 register value l_data64.flush<1>(); - l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>(); //NET_CTRL0.FENCE_EN = 0 + //NET_CTRL0.FENCE_EN = (i_pg_vector.getBit<2>() == 1) ? 0 + l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>(); FAPI_TRY(fapi2::putScom(i_target_chip, PERV_NET_CTRL0_WAND, l_data64)); } @@ -344,12 +324,14 @@ static fapi2::ReturnCode p9_sbe_startclock_chiplets_pci_fence_drop( fapi2::buffer<uint64_t> l_data64; FAPI_INF("Entering ..."); - if ( i_pg_vector.getBit<3>() == 1 ) + FAPI_DBG("Drop chiplet fence"); + + //Setting NET_CTRL0 register value + if (i_pg_vector.getBit<3>() == 1) { - FAPI_DBG("Drop chiplet fence"); - //Setting NET_CTRL0 register value l_data64.flush<1>(); - l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>(); //NET_CTRL0.FENCE_EN = 0 + //NET_CTRL0.FENCE_EN = (i_pg_vector.getBit<3>() == 1) ? 0 + l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>(); FAPI_TRY(fapi2::putScom(i_target_chip, PERV_NET_CTRL0_WAND, l_data64)); } @@ -394,12 +376,14 @@ static fapi2::ReturnCode p9_sbe_startclock_chiplets_xb_fence_drop( fapi2::buffer<uint64_t> l_data64; FAPI_INF("Entering ..."); - if ( i_pg_vector.getBit<1>() == 1 ) + FAPI_DBG("Drop chiplet fence"); + + //Setting NET_CTRL0 register value + if (i_pg_vector.getBit<1>() == 1) { - FAPI_DBG("Drop chiplet fence"); - //Setting NET_CTRL0 register value l_data64.flush<1>(); - l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>(); //NET_CTRL0.FENCE_EN = 0 + //NET_CTRL0.FENCE_EN = (i_pg_vector.getBit<1>() == 1) ? 0 + l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>(); FAPI_TRY(fapi2::putScom(i_target_chip, PERV_NET_CTRL0_WAND, l_data64)); } |
