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authorJoe McGill <jmcgill@us.ibm.com>2015-11-09 13:28:05 -0600
committerSachin Gupta <sgupta2m@in.ibm.com>2015-11-19 03:13:55 -0600
commitba665709aafea1ba920f0bb8562b589a16aeccbe (patch)
tree0ed465e975536d8b719814698cc76039d9152e36
parent08cccbe48da0b70c246a717c8da98916bd1e7c1d (diff)
downloadtalos-sbe-ba665709aafea1ba920f0bb8562b589a16aeccbe.tar.gz
talos-sbe-ba665709aafea1ba920f0bb8562b589a16aeccbe.zip
Updates for p9_revert_sbe_mcs_setup, p9_sbe_mcs_setup (Level 2)
Add p9_revert_sbe_mcs_setup L2 content Update p9_sbe_mcs_setup to consider drawer base address, MI target type Add common routine in p9_fbc_utils to determine chip base addresses Update p9_sbe_bootloader to reference common base address routine Change size of fabric system ID attribute to accomodate small sytem memory map Change-Id: I57938d51ccce85bad5b6ecc797a23e6972901bd0 Original-Change-Id: Ifaf016b04c8cf7efbd6e5ee668f22a8059f0ed8d Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21908 Tested-by: Jenkins Server Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22202 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
-rw-r--r--import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C238
-rw-r--r--import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H13
-rw-r--r--import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml2
3 files changed, 194 insertions, 59 deletions
diff --git a/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C b/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C
index 0268cbcd..803b9673 100644
--- a/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C
+++ b/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C
@@ -23,6 +23,7 @@
/// The functions in this file provide:
/// - Information about the instantaneous state of the fabric
/// - Means to restart the fabric after a checkstop condition
+/// - Determination of the chip's base address in the real address map
///
/// @author Joe McGill <jmcgill@us.ibm.com>
/// @author Christy Graves <clgraves@us.ibm.com>
@@ -42,82 +43,203 @@
#include <p9_fbc_utils.H>
#include <p9_misc_scom_addresses.H>
-extern "C"
-{
//------------------------------------------------------------------------------
// Constant definitions
//------------------------------------------------------------------------------
// ADU PMisc Register field/bit definitions
- const uint32_t ALTD_SND_MODE_DISABLE_CHECKSTOP_BIT = 19;
- const uint32_t ALTD_SND_MODE_MANUAL_CLR_PB_STOP_BIT = 21;
- const uint32_t ALTD_SND_MODE_PB_STOP_BIT = 22;
+const uint32_t ALTD_SND_MODE_DISABLE_CHECKSTOP_BIT = 19;
+const uint32_t ALTD_SND_MODE_MANUAL_CLR_PB_STOP_BIT = 21;
+const uint32_t ALTD_SND_MODE_PB_STOP_BIT = 22;
// FBC Mode Register field/bit definitions
- const uint32_t PU_FBC_MODE_PB_INITIALIZED_BIT = 0;
+const uint32_t PU_FBC_MODE_PB_INITIALIZED_BIT = 0;
+
+// FBC base address determination constants
+// system ID (large system)
+const uint8_t FABRIC_ADDR_LS_SYSTEM_ID_START_BIT = 8;
+const uint8_t FABRIC_ADDR_LS_SYSTEM_ID_END_BIT = 12;
+// system ID (small system)
+const uint8_t FABRIC_ADDR_SS_SYSTEM_ID_FLD0_START_BIT = 8;
+const uint8_t FABRIC_ADDR_SS_SYSTEM_ID_FLD0_END_BIT = 12;
+const uint8_t FABRIC_ADDR_SS_SYSTEM_ID_FLD0_SHIFT = 5;
+const uint8_t FABRIC_ADDR_SS_SYSTEM_ID_FLD0_MASK = 0x1F;
+const uint8_t FABRIC_ADDR_SS_SYSTEM_ID_FLD1_START_BIT = 15;
+const uint8_t FABRIC_ADDR_SS_SYSTEM_ID_FLD1_END_BIT = 16;
+const uint8_t FABRIC_ADDR_SS_SYSTEM_ID_FLD1_SHIFT = 3;
+const uint8_t FABRIC_ADDR_SS_SYSTEM_ID_FLD1_MASK = 0x3;
+const uint8_t FABRIC_ADDR_SS_SYSTEM_ID_FLD2_START_BIT = 19;
+const uint8_t FABRIC_ADDR_SS_SYSTEM_ID_FLD2_END_BIT = 21;
+const uint8_t FABRIC_ADDR_SS_SYSTEM_ID_FLD2_SHIFT = 0;
+const uint8_t FABRIC_ADDR_SS_SYSTEM_ID_FLD2_MASK = 0x7;
+// group ID (large system)
+const uint8_t FABRIC_ADDR_LS_GROUP_ID_START_BIT = 15;
+const uint8_t FABRIC_ADDR_LS_GROUP_ID_END_BIT = 18;
+// group ID (small system)
+const uint8_t FABRIC_ADDR_SS_GROUP_ID_START_BIT = 17;
+const uint8_t FABRIC_ADDR_SS_GROUP_ID_END_BIT = 18;
+// chip ID (large system)
+const uint8_t FABRIC_ADDR_LS_CHIP_ID_START_BIT = 19;
+const uint8_t FABRIC_ADDR_LS_CHIP_ID_END_BIT = 21;
+// msel bit (large & small system)
+const uint8_t FABRIC_ADDR_MSEL_BIT = 13;
+
//------------------------------------------------------------------------------
// Function definitions
//------------------------------------------------------------------------------
- fapi2::ReturnCode p9_fbc_utils_get_fbc_state(
- const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
- bool& o_is_initialized,
- bool& o_is_running)
+fapi2::ReturnCode p9_fbc_utils_get_fbc_state(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
+ bool& o_is_initialized,
+ bool& o_is_running)
+{
+ FAPI_DBG("Start");
+
+ // TODO: HW328175
+ // fapi2::buffer<uint64_t> l_fbc_mode_data;
+ // FAPI_TRY(fapi2::getScom(i_target, PU_FBC_MODE_REG, l_fbc_mode_data),
+ // "Error reading FBC Mode Register");
+ // // fabric is initialized if PB_INITIALIZED bit is one/set
+ // o_is_initialized = l_fbc_mode_data.getBit<PU_FBC_MODE_PB_INITIALIZED_BIT>();
+
+ // currently, sampling FBC init from PB Mode register is unreliable
+ // as init can drop perodically at runtime (based on legacy sleep backoff)
+ // until this issue is fixed, just return true to caller
+ o_is_initialized = true;
+
+ // read ADU PMisc Mode Register state
+ fapi2::buffer<uint64_t> l_pmisc_mode_data;
+ FAPI_TRY(fapi2::getScom(i_target, PU_SND_MODE_REG, l_pmisc_mode_data),
+ "Error reading ADU PMisc Mode register");
+
+ // fabric is running if FBC_STOP bit is zero/clear
+ o_is_running = !(l_pmisc_mode_data.getBit<ALTD_SND_MODE_PB_STOP_BIT>());
+
+fapi_try_exit:
+ FAPI_DBG("End");
+ return fapi2::current_err;
+}
+
+
+fapi2::ReturnCode p9_fbc_utils_override_fbc_stop(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
+{
+ FAPI_DBG("Start");
+
+ // read ADU PMisc Mode Register state
+ fapi2::buffer<uint64_t> l_pmisc_mode_data;
+ FAPI_TRY(fapi2::getScom(i_target, PU_SND_MODE_REG, l_pmisc_mode_data),
+ "Error reading ADU PMisc Mode register");
+
+ // set bit to disable checkstop forwarding and write back
+ l_pmisc_mode_data.setBit<ALTD_SND_MODE_DISABLE_CHECKSTOP_BIT>();
+ FAPI_TRY(fapi2::putScom(i_target, PU_SND_MODE_REG, l_pmisc_mode_data),
+ "Error writing ADU PMisc Mode register to disable checkstop forwarding to FBC");
+
+ // set bit to manually clear stop control and write back
+ l_pmisc_mode_data.setBit<ALTD_SND_MODE_MANUAL_CLR_PB_STOP_BIT>();
+ FAPI_TRY(fapi2::putScom(i_target, PU_SND_MODE_REG, l_pmisc_mode_data),
+ "Error writing ADU PMisc Mode register to manually clear FBC stop control");
+
+fapi_try_exit:
+ FAPI_DBG("End");
+ return fapi2::current_err;
+}
+
+
+fapi2::ReturnCode p9_fbc_utils_get_chip_base_address(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
+ uint64_t& o_base_address_nm,
+ uint64_t& o_base_address_m)
+{
+ uint32_t l_fabric_system_id;
+ uint8_t l_fabric_group_id;
+ uint8_t l_fabric_chip_id;
+ uint8_t l_fabric_addr_bar_mode;
+ uint8_t l_msel;
+ fapi2::buffer<uint64_t> l_base_address;
+ const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
+
+
+ FAPI_DBG("Start");
+
+ // retreive attributes which statically determine chip's position in memory map
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_SYSTEM_ID, i_target, l_fabric_system_id),
+ "Error from FAPI_ATTR_GET (ATTR_FABRIC_SYSTEM_ID)");
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_GROUP_ID, i_target, l_fabric_group_id),
+ "Error from FAPI_ATTR_GET (ATTR_FABRIC_GROUP_ID)");
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_CHIP_ID, i_target, l_fabric_chip_id),
+ "Error from FAPI_ATTR_GET (ATTR_FABRIC_CHIP_ID)");
+
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_ADDR_BAR_MODE, FAPI_SYSTEM, l_fabric_addr_bar_mode),
+ "Error from FAPI_ATTR_GET (ATTR_PROC_FABRIC_ADDR_BAR_MODE)");
+
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MEM_MIRROR_PLACEMENT_POLICY, FAPI_SYSTEM, l_msel),
+ "Error from FAPI_ATTR_GET (ATTR_MEM_MIRROR_PLACEMENT_POLICY)");
+
+ // apply system ID
+ // occupies one field for large system map, split into three fields for small system map
+ if (l_fabric_addr_bar_mode == fapi2::ENUM_ATTR_PROC_FABRIC_ADDR_BAR_MODE_LARGE_SYSTEM)
{
- FAPI_DBG("Start");
-
- // TODO: HW328175
- // fapi2::buffer<uint64_t> l_fbc_mode_data;
- // FAPI_TRY(fapi2::getScom(i_target, PU_FBC_MODE_REG, l_fbc_mode_data),
- // "Error reading FBC Mode Register");
- // // fabric is initialized if PB_INITIALIZED bit is one/set
- // o_is_initialized = l_fbc_mode_data.getBit<PU_FBC_MODE_PB_INITIALIZED_BIT>();
-
- // currently, sampling FBC init from PB Mode register is unreliable
- // as init can drop perodically at runtime (based on legacy sleep backoff)
- // until this issue is fixed, just return true to caller
- o_is_initialized = true;
-
- // read ADU PMisc Mode Register state
- fapi2::buffer<uint64_t> l_pmisc_mode_data;
- FAPI_TRY(fapi2::getScom(i_target, PU_SND_MODE_REG, l_pmisc_mode_data),
- "Error reading ADU PMisc Mode register");
-
- // fabric is running if FBC_STOP bit is zero/clear
- o_is_running = !(l_pmisc_mode_data.getBit<ALTD_SND_MODE_PB_STOP_BIT>());
-
- fapi_try_exit:
- FAPI_DBG("End");
- return fapi2::current_err;
+ l_base_address.insertFromRight < FABRIC_ADDR_LS_SYSTEM_ID_START_BIT,
+ (FABRIC_ADDR_LS_SYSTEM_ID_END_BIT - FABRIC_ADDR_LS_SYSTEM_ID_START_BIT + 1) > (l_fabric_system_id);
+ }
+ else
+ {
+ uint32_t l_fabric_system_id_fld = (l_fabric_system_id >> FABRIC_ADDR_SS_SYSTEM_ID_FLD0_SHIFT) &
+ FABRIC_ADDR_SS_SYSTEM_ID_FLD0_MASK;
+ l_base_address.insertFromRight < FABRIC_ADDR_SS_SYSTEM_ID_FLD0_START_BIT,
+ (FABRIC_ADDR_SS_SYSTEM_ID_FLD0_END_BIT - FABRIC_ADDR_SS_SYSTEM_ID_FLD0_START_BIT + 1) > (l_fabric_system_id_fld);
+
+ l_fabric_system_id_fld = (l_fabric_system_id >> FABRIC_ADDR_SS_SYSTEM_ID_FLD1_SHIFT) &
+ FABRIC_ADDR_SS_SYSTEM_ID_FLD1_MASK;
+ l_base_address.insertFromRight < FABRIC_ADDR_SS_SYSTEM_ID_FLD1_START_BIT,
+ (FABRIC_ADDR_SS_SYSTEM_ID_FLD1_END_BIT - FABRIC_ADDR_SS_SYSTEM_ID_FLD1_START_BIT + 1) > (l_fabric_system_id_fld);
+
+ l_fabric_system_id_fld = (l_fabric_system_id >> FABRIC_ADDR_SS_SYSTEM_ID_FLD2_SHIFT) &
+ FABRIC_ADDR_SS_SYSTEM_ID_FLD2_MASK;
+ l_base_address.insertFromRight < FABRIC_ADDR_SS_SYSTEM_ID_FLD2_START_BIT,
+ (FABRIC_ADDR_SS_SYSTEM_ID_FLD2_END_BIT - FABRIC_ADDR_SS_SYSTEM_ID_FLD2_START_BIT + 1) > (l_fabric_system_id_fld);
}
+ // apply group ID
+ if (l_fabric_addr_bar_mode == fapi2::ENUM_ATTR_PROC_FABRIC_ADDR_BAR_MODE_LARGE_SYSTEM)
+ {
+ l_base_address.insertFromRight < FABRIC_ADDR_LS_GROUP_ID_START_BIT,
+ (FABRIC_ADDR_LS_GROUP_ID_END_BIT - FABRIC_ADDR_LS_GROUP_ID_START_BIT + 1) > (l_fabric_group_id);
+ }
+ else
+ {
+ l_base_address.insertFromRight < FABRIC_ADDR_SS_GROUP_ID_START_BIT,
+ (FABRIC_ADDR_SS_GROUP_ID_END_BIT - FABRIC_ADDR_SS_GROUP_ID_START_BIT + 1) > (l_fabric_group_id);
+ }
- fapi2::ReturnCode p9_fbc_utils_override_fbc_stop(
- const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
+ // apply chip ID (relevant for large system map only)
+ if (l_fabric_addr_bar_mode == fapi2::ENUM_ATTR_PROC_FABRIC_ADDR_BAR_MODE_LARGE_SYSTEM)
{
- FAPI_DBG("Start");
-
- // read ADU PMisc Mode Register state
- fapi2::buffer<uint64_t> l_pmisc_mode_data;
- FAPI_TRY(fapi2::getScom(i_target, PU_SND_MODE_REG, l_pmisc_mode_data),
- "Error reading ADU PMisc Mode register");
-
- // set bit to disable checkstop forwarding and write back
- l_pmisc_mode_data.setBit<ALTD_SND_MODE_DISABLE_CHECKSTOP_BIT>();
- FAPI_TRY(fapi2::putScom(i_target, PU_SND_MODE_REG, l_pmisc_mode_data),
- "Error writing ADU PMisc Mode register to disable checkstop forwarding to FBC");
-
- // set bit to manually clear stop control and write back
- l_pmisc_mode_data.setBit<ALTD_SND_MODE_MANUAL_CLR_PB_STOP_BIT>();
- FAPI_TRY(fapi2::putScom(i_target, PU_SND_MODE_REG, l_pmisc_mode_data),
- "Error writing ADU PMisc Mode register to manually clear FBC stop control");
-
- fapi_try_exit:
- FAPI_DBG("End");
- return fapi2::current_err;
+ l_base_address.insertFromRight < FABRIC_ADDR_LS_CHIP_ID_START_BIT,
+ (FABRIC_ADDR_LS_CHIP_ID_END_BIT - FABRIC_ADDR_LS_CHIP_ID_START_BIT + 1) > (l_fabric_chip_id);
}
+ // set output addresses based on application of msel
+ if (l_msel == fapi2::ENUM_ATTR_MEM_MIRROR_PLACEMENT_POLICY_NORMAL)
+ {
+ // nm = 0b00, m = 0b10
+ o_base_address_nm = l_base_address();
+ l_base_address.setBit(FABRIC_ADDR_MSEL_BIT);
+ o_base_address_m = l_base_address();
+ }
+ else
+ {
+ // m = 0b10, m = 0b00
+ o_base_address_m = l_base_address();
+ l_base_address.setBit(FABRIC_ADDR_MSEL_BIT);
+ o_base_address_nm = l_base_address();
+ }
-} // extern "C"
+fapi_try_exit:
+ FAPI_DBG("End");
+ return fapi2::current_err;
+}
diff --git a/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H b/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H
index 9411821d..6bccaba5 100644
--- a/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H
+++ b/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H
@@ -82,6 +82,19 @@ extern "C" {
fapi2::ReturnCode p9_fbc_utils_override_fbc_stop(
const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+///
+/// @brief Return base address origin (non-mirrored/mirrored) for this chip
+///
+/// @param[in] i_target Reference to processor chip target
+/// @param[out] o_base_address_nm Non-mirrored base address for this chip
+/// @param[out] o_base_address_m Mirrored base address for this chip
+/// @return fapi::ReturnCode, FAPI2_RC_SUCCESS if success, else error code.
+///
+ fapi2::ReturnCode p9_fbc_utils_get_chip_base_address(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
+ uint64_t& o_base_address_nm,
+ uint64_t& o_base_address_m);
+
} // extern "C"
#endif // _P9_FBC_UTILS_H_
diff --git a/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml b/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml
index bd98c3c9..3b7c57ff 100644
--- a/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml
+++ b/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml
@@ -258,7 +258,7 @@
<description>
Logical fabric system ID associated with this chip.Provided by the MRW.
</description>
- <valueType>uint8</valueType>
+ <valueType>uint32</valueType>
<platInit/>
</attribute>
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