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authorAnusha Reddy Rangareddygari <anusrang@in.ibm.com>2016-03-02 14:57:43 +0100
committerSachin Gupta <sgupta2m@in.ibm.com>2016-04-06 00:13:12 -0400
commitb1cb29bf8642948de83f12e6f774eac554347b6f (patch)
tree22818af4c8c08c441d46cdc94e377683739d920b
parentc7a4b8b32956cfa1c56b268a043bbb2985650234 (diff)
downloadtalos-sbe-b1cb29bf8642948de83f12e6f774eac554347b6f.tar.gz
talos-sbe-b1cb29bf8642948de83f12e6f774eac554347b6f.zip
Level 2 HWP for p9_sbe_tp_switch_gears
* Included wrapper,makefiles * Added ATTR_BACKUP_SEEPROM_SELECT into base_hwp_attribute_file Change-Id: I05c7d716f0a281446c8a1d7086d427241106d08b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21586 Tested-by: Jenkins Server Tested-by: PPE CI Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21587 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
-rw-r--r--import/chips/p9/procedures/hwp/perv/p9_sbe_tp_switch_gears.C115
-rw-r--r--import/chips/p9/procedures/hwp/perv/p9_sbe_tp_switch_gears.H7
-rw-r--r--import/chips/p9/sw_simulation/pervasive.act21
3 files changed, 133 insertions, 10 deletions
diff --git a/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_switch_gears.C b/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_switch_gears.C
index a7c1016c..5e76ed5c 100644
--- a/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_switch_gears.C
+++ b/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_switch_gears.C
@@ -7,7 +7,7 @@
/* */
/* EKB Project */
/* */
-/* COPYRIGHT 2015 */
+/* COPYRIGHT 2015,2016 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -21,7 +21,7 @@
///
/// @brief Switch from refclock to PLL AND adjust I2C
//------------------------------------------------------------------------------
-// *HWP HW Owner : abagarw8 <srinivan@in.ibm.com>
+// *HWP HW Owner : Anusha Reddy Rangareddygari <anusrang@in.ibm.com>
// *HWP HW Backup Owner : Srinivas V Naga <srinivan@in.ibm.com>
// *HWP FW Owner : sunil kumar <skumarj8@in.ibm.com>
// *HWP Team : Perv
@@ -33,22 +33,123 @@
//## auto_generated
#include "p9_sbe_tp_switch_gears.H"
-#include "p9_sbe_gear_switcher.H"
+#include <p9_misc_scom_addresses.H>
+#include <p9_perv_scom_addresses.H>
+#include <p9_perv_scom_addresses_fld.H>
+#include <p9_sbe_gear_switcher.H>
+enum P9_SBE_TP_SWITCH_GEARS_Private_Constants
+{
+ BACKUP_SEEPROM_MAGIC_NUM_ADDRESS = 0xD8A9029000000000, // Magic number value from Backup SEEPROM
+ BUS_STATUS_BUSY_POLL_COUNT = 256,
+ MAGIC_NUMBER = 0x584950205345504D,
+ NORMAL_SEEPROM_MAGIC_NUM_ADDRESS = 0xD8A9009000000000 // Magic number value from SEEPROM
+};
+
fapi2::ReturnCode p9_sbe_tp_switch_gears(const
fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip)
{
- FAPI_DBG("Entering ...");
-#if 0
+ fapi2::buffer<uint64_t> l_data64;
+ FAPI_INF("Entering ...");
+
+ FAPI_DBG("switch from refclock to PLL speed");
+ //Setting PERV_CTRL0 register value
+ FAPI_TRY(fapi2::getScom(i_target_chip, PERV_PERV_CTRL0_SCOM, l_data64));
+ //PIB.PERV_CTRL0.TP_PLLBYP_DC = 0
+ l_data64.clearBit<PERV_PERV_CTRL0_SET_TP_PLLBYP_DC>();
+ FAPI_TRY(fapi2::putScom(i_target_chip, PERV_PERV_CTRL0_SCOM, l_data64));
+
FAPI_TRY(p9_sbe_gear_switcher_apply_i2c_bit_rate_divisor_setting(
i_target_chip));
FAPI_TRY(p9_sbe_gear_switcher_i2c_stop_sequence(i_target_chip));
- FAPI_DBG("Exiting ...");
+
+ FAPI_DBG("Checking Magic number");
+ FAPI_TRY(p9_sbe_tp_switch_gears_check_magicnumber(i_target_chip));
+
+ FAPI_INF("Exiting ...");
+
+fapi_try_exit:
+ return fapi2::current_err;
+
+}
+
+/// @brief check for magic number
+///
+/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target
+/// @return FAPI2_RC_SUCCESS if success, else error code.
+fapi2::ReturnCode p9_sbe_tp_switch_gears_check_magicnumber(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip)
+{
+ fapi2::buffer<uint64_t> l_read_reg;
+ fapi2::buffer<uint8_t> l_read_attr = 0;
+ int l_timeout = 0;
+ fapi2::buffer<uint64_t> l_data64;
+ FAPI_INF("Entering ...");
+
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_BACKUP_SEEPROM_SELECT, i_target_chip,
+ l_read_attr));
+
+ if ( l_read_attr.getBit<7>() == 1 )
+ {
+ FAPI_DBG("Read magic number from Backup SEEPROM");
+ //Setting CONTROL_REGISTER_B register value
+ //PIB.CONTROL_REGISTER_B = BACKUP_SEEPROM_MAGIC_NUM_ADDRESS
+ FAPI_TRY(fapi2::putScom(i_target_chip, PU_CONTROL_REGISTER_B,
+ BACKUP_SEEPROM_MAGIC_NUM_ADDRESS));
+ }
+ else
+ {
+ FAPI_DBG("Read magic number from SEEPROM");
+ //Setting CONTROL_REGISTER_B register value
+ //PIB.CONTROL_REGISTER_B = NORMAL_SEEPROM_MAGIC_NUM_ADDRESS
+ FAPI_TRY(fapi2::putScom(i_target_chip, PU_CONTROL_REGISTER_B,
+ NORMAL_SEEPROM_MAGIC_NUM_ADDRESS));
+ }
+
+ FAPI_DBG("Poll for stop command completion");
+ l_timeout = BUS_STATUS_BUSY_POLL_COUNT;
+
+ //UNTIL STATUS_REGISTER_B.BUS_STATUS_BUSY_0 == 0
+ while (l_timeout != 0)
+ {
+ //Getting STATUS_REGISTER_B register value
+ FAPI_TRY(fapi2::getScom(i_target_chip, PU_STATUS_REGISTER_B, l_data64));
+ //bool l_poll_data = PIB.STATUS_REGISTER_B.BUS_STATUS_BUSY_0
+ bool l_poll_data = l_data64.getBit<44>();
+
+ if (l_poll_data == 0)
+ {
+ break;
+ }
+
+ --l_timeout;
+ }
+
+ FAPI_DBG("Loop Count :%d", l_timeout);
+
+ FAPI_ASSERT(l_timeout > 0,
+ fapi2::BUS_STATUS_BUSY0(),
+ "ERROR:BUS_STSTUS_BUSY_0 NOT SET TO 0");
+
+ FAPI_DBG("Reading the value of DATA0TO7_REGISTER_B");
+ //Getting DATA0TO7_REGISTER_B register value
+ FAPI_TRY(fapi2::getScom(i_target_chip, PU_DATA0TO7_REGISTER_B,
+ l_read_reg)); //l_read_reg = PIB.DATA0TO7_REGISTER_B
+
+
+ FAPI_DBG("DATA0TO7_REGISTER_B value: %#018lX", l_read_reg);
+ FAPI_DBG("DATA0TO7_REGISTER_B value compared to the Magicnumber : %#018lX", MAGIC_NUMBER);
+
+
+ FAPI_ASSERT(l_read_reg == MAGIC_NUMBER,
+ fapi2::MAGIC_NUMBER_NOT_VALID(),
+ "ERROR: Magic number not matching");
+
+ FAPI_INF("Exiting ...");
fapi_try_exit:
-#endif
return fapi2::current_err;
}
diff --git a/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_switch_gears.H b/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_switch_gears.H
index af8437bb..f61998f6 100644
--- a/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_switch_gears.H
+++ b/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_switch_gears.H
@@ -7,7 +7,7 @@
/* */
/* EKB Project */
/* */
-/* COPYRIGHT 2015 */
+/* COPYRIGHT 2015,2016 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -21,7 +21,7 @@
///
/// @brief Switch from refclock to PLL AND adjust I2C
//------------------------------------------------------------------------------
-// *HWP HW Owner : abagarw8 <srinivan@in.ibm.com>
+// *HWP HW Owner : Anusha Reddy Rangareddygari <anusrang@in.ibm.com>
// *HWP HW Backup Owner : Srinivas V Naga <srinivan@in.ibm.com>
// *HWP FW Owner : sunil kumar <skumarj8@in.ibm.com>
// *HWP Team : Perv
@@ -55,4 +55,7 @@ extern "C"
fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip);
}
+fapi2::ReturnCode p9_sbe_tp_switch_gears_check_magicnumber(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chiplet);
+
#endif
diff --git a/import/chips/p9/sw_simulation/pervasive.act b/import/chips/p9/sw_simulation/pervasive.act
index da32a15d..25ab1c7a 100644
--- a/import/chips/p9/sw_simulation/pervasive.act
+++ b/import/chips/p9/sw_simulation/pervasive.act
@@ -111,7 +111,7 @@ EFFECT: TARGET=[REG(MYCHIPLET,0x00000100)] OP=[BIT,ON] BIT=[9]
# Simics action for p9_sbe_tp_switchgear
# =============================================================================
CAUSE_EFFECT {
-LABEL=[Gear Switcher i2c stop Sequence]
+LABEL=[I2C Stop Sequence]
# Watch PU_CONTROL_REGISTER_B
WATCH=[REG(0x000A0000)]
# PIB.CONTROL_REGISTER_B.PIB_CNTR_REG_BIT_WITHSTOP_0 = 1
@@ -122,6 +122,25 @@ CAUSE: TARGET=[REG(0x000A0000)] OP=[BIT,ON] BIT=[26]
EFFECT: TARGET=[REG(0x000A0002)] OP=[BIT,OFF] BIT=[44]
}
+CAUSE_EFFECT {
+LABEL=[Backup Seeprom Magic Num]
+# Watch PU_CONTROL_REGISTER_B
+WATCH=[REG(0x000A0000)]
+CAUSE: TARGET=[REG(0x000A0000)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,0xD8A90290 00000000)]
+# PIB.STATUS_REGISTER_B.BUS_STATUS_BUSY_0
+EFFECT: TARGET=[REG(0x000A0002)] OP=[BIT,OFF] BIT=[44]
+EFFECT: TARGET=[REG(0x000A0003)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,0x58495020 5345504D)]
+}
+
+CAUSE_EFFECT {
+LABEL=[Normal Seeprom Sequnce Num]
+# Watch PU_CONTROL_REGISTER_B
+WATCH=[REG(0x000A0000)]
+CAUSE: TARGET=[REG(0x000A0000)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,0xD8A90090 00000000)]
+# PIB.STATUS_REGISTER_B.BUS_STATUS_BUSY_0
+EFFECT: TARGET=[REG(0x000A0002)] OP=[BIT,OFF] BIT=[44]
+EFFECT: TARGET=[REG(0x000A0003)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,0x58495020 5345504D)]
+}
# =============================================================================
# Simics action for p9_sbe_chiplet_pll_setup
# =============================================================================
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