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| author | Joe McGill <jmcgill@us.ibm.com> | 2017-01-20 18:27:15 -0600 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-01-24 03:49:30 -0500 |
| commit | ae0b09138cddb4f714502181ea5999fcb108d89b (patch) | |
| tree | a5fa9c36f2e8bd115f48c02b17e836db72c20b32 | |
| parent | 3356e6294d6a580927f282b2fee18272684a4991 (diff) | |
| download | talos-sbe-ae0b09138cddb4f714502181ea5999fcb108d89b.tar.gz talos-sbe-ae0b09138cddb4f714502181ea5999fcb108d89b.zip | |
p9_sbe_tp_chiplet_init3 -- disable TP TOD hang pulse
Change-Id: I838703170232b7ad39ae752f0fcde996f5bd577e
CQ: HW401184
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35199
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35202
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
3 files changed, 34 insertions, 3 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C index 8eab2a7d..b4039571 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C @@ -86,6 +86,7 @@ fapi2::ReturnCode p9_sbe_tp_chiplet_init3(const fapi2::TARGET_STATE_FUNCTIONAL)[0]; fapi2::buffer<uint64_t> l_data64; int l_timeout = 0; + fapi2::ATTR_CHIP_EC_FEATURE_HW401184_Type l_disable_tod_hp = 0; FAPI_INF("p9_sbe_tp_chiplet_init3: Entering ..."); FAPI_DBG("Reading ATTR_PFET_OFF_CONTROLS"); @@ -187,9 +188,18 @@ fapi2::ReturnCode p9_sbe_tp_chiplet_init3(const FAPI_TRY(fapi2::putScom(i_target_chip, PERV_TP_HANG_PULSE_2_REG, l_data64)); //Setting HANG_PULSE_3_REG register value (Setting all fields) //PERV.HANG_PULSE_3_REG.HANG_PULSE_REG_3 = 0b000001 - l_data64.insertFromRight<0, 6>(0b000001); - l_data64.clearBit<6>(); //PERV.HANG_PULSE_3_REG.SUPPRESS_HANG_3 = 0b0 - FAPI_TRY(fapi2::putScom(i_target_chip, PERV_TP_HANG_PULSE_3_REG, l_data64)); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW401184, + i_target_chip, + l_disable_tod_hp), + "Error from ATTR_CHIP_EC_FEATURE_HW401184"); + + if (!l_disable_tod_hp) + { + l_data64.insertFromRight<0, 6>(0b000001); + l_data64.clearBit<6>(); //PERV.HANG_PULSE_3_REG.SUPPRESS_HANG_3 = 0b0 + FAPI_TRY(fapi2::putScom(i_target_chip, PERV_TP_HANG_PULSE_3_REG, l_data64)); + } + //Setting HANG_PULSE_5_REG register value (Setting all fields) //PERV.HANG_PULSE_5_REG.HANG_PULSE_REG_5 = 0b000110 l_data64.insertFromRight<0, 6>(0b000110); diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index b0a88471..b484c15b 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -1867,6 +1867,23 @@ </chip> </chipEcFeature> </attribute> + <!-- ******************************************************************** --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_HW401184</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Nimbus DD1: Silent Baron: TB and DEC SPRs stray apart with TOD enabled + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x20</value> + <test>LESS_THAN</test> + </ec> + </chip> + </chipEcFeature> + </attribute> <!-- ******************************************************************** --> <!-- Memory Section --> diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml index 338a29ff..daf348d1 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml @@ -420,6 +420,10 @@ attribute tank <name>ATTR_CHIP_EC_FEATURE_SLOW_PCI_REF_CLOCK</name> <virtual/> </entry> + <entry> + <name>ATTR_CHIP_EC_FEATURE_HW401184</name> + <virtual/> + </entry> <entry> <name>ATTR_PROC_XSCOM_BAR_BASE_ADDR_OFFSET</name> |
