p9_setup_evid L2 commit

Change-Id: I923c0d7da9e825dbbb4a111648fc3457da22d572
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/20613
Tested-by: Jenkins Server
Tested-by: PPE CI
Tested-by: Hostboot CI
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22271
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>

2 files changed, 62 insertions, 0 deletions

diff --git a/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml b/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml
index 852f72c2..0d94a079 100644
--- a/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml
+++ b/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml
@@ -119,6 +119,22 @@
   </attribute>
   <!-- ********************************************************************* -->
   <attribute>
+    <id>ATTR_VCS_AVSBUS_BUSNUM</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+      Defines the AVSBus (0 or 1) which has the chip VCS rail VRM
+
+      Producer:  Machine Readable Workbook
+      Consumers: p9_set_evid;
+                 p9_set_voltage (tool);
+                 p9_build_pstate_datablock ->
+                        Pstate Parameter Block (PSPB) for PGPE
+    </description>
+    <valueType>uint8</valueType>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
     <id>ATTR_VDD_AVSBUS_RAIL</id>
     <targetType>TARGET_TYPE_PROC_CHIP</targetType>
     <description>
@@ -152,6 +168,23 @@
     <platInit/>
   </attribute>
   <!-- ********************************************************************* -->
+ <attribute>
+   <id>ATTR_VCS_AVSBUS_RAIL</id>
+   <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+   <description>
+    Defines the AVSBus rail selector number (0 - 15) for the VCS VRM on the bus
+    defined by ATTR_AVSBUS_VDN_BUSNUM.
+
+     Producer:  Machine Readable Workbook
+     Consumers:
+     p9_set_avsbus_voltage (tool);
+ 	       p9_build_pstate_datablock ->
+ 		      Pstate Parameter Block (PSPB) for PGPE
+   </description>
+   <valueType>uint8</valueType>
+   <platInit/>
+ </attribute>
+  <!-- ********************************************************************* -->
   <attribute>
     <id>ATTR_VCS_I2C_BUSNUM</id>
     <targetType>TARGET_TYPE_PROC_CHIP</targetType>
diff --git a/import/chips/p9/sw_simulation/powermgmt.act b/import/chips/p9/sw_simulation/powermgmt.act
index 17d81715..03ec7e72 100644
--- a/import/chips/p9/sw_simulation/powermgmt.act
+++ b/import/chips/p9/sw_simulation/powermgmt.act
@@ -575,6 +575,35 @@ CAUSE_EFFECT {
   CAUSE: TARGET=[REG(0x0006D072)] OP=[BIT,ON] BIT=[5]
   EFFECT: TARGET=[REG(0x0006D071)] OP=[BIT,ON] BIT=[4]
   EFFECT: TARGET=[REG(0x0006D071)] OP=[BIT,OFF] BIT=[5]
+## Actions for Procedure - p9_setup_evid
+##
+
+CAUSE_EFFECT {
+ LABEL=[AVSBus Write data register 0B]
+ WATCH=[REG(0x0006C718)]
+ CAUSE: TARGET=[REG(0x0006C718)] OP=[BIT,ON] BIT=[1] 
+ EFFECT: TARGET=[REG(0x0006C716)] OP=[BIT,ON] BIT=[0] 
+}
+
+CAUSE_EFFECT {
+ LABEL=[AVSBus Status register 0B]
+ WATCH_READ=[REG(0x0006C716)]
+ CAUSE: TARGET=[REG(0x0006C716)] OP=[BIT,ON] BIT=[0] 
+ EFFECT: TARGET=[REG(0x0006C716)] OP=[BIT,OFF] BIT=[0] 
+}
+
+CAUSE_EFFECT {
+ LABEL=[AVSBus Write data register 1B]
+ WATCH=[REG(0x0006C738)]
+ CAUSE: TARGET=[REG(0x0006C738)] OP=[BIT,ON] BIT=[1] 
+ EFFECT: TARGET=[REG(0x0006C736)] OP=[BIT,ON] BIT=[0] 
+}
+
+CAUSE_EFFECT {
+ LABEL=[AVSBus Status register 1B]
+ WATCH_READ=[REG(0x0006C736)]
+ CAUSE: TARGET=[REG(0x0006C736)] OP=[BIT,ON] BIT=[0] 
+ EFFECT: TARGET=[REG(0x0006C736)] OP=[BIT,OFF] BIT=[0] 
 }
 
 ## Core 0 Start