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| author | Greg Still <stillgs@us.ibm.com> | 2015-11-20 09:53:42 -0600 |
|---|---|---|
| committer | Jennifer A. Stofer <stofer@us.ibm.com> | 2016-02-24 11:58:29 -0600 |
| commit | 92a0f491bcab9f3df4cc92ff73a98590da75a3bc (patch) | |
| tree | da4d4b26a31800650983b88516f49232f0a05ce1 | |
| parent | e29483d4c454423ddcdf2ab3b44742b289e0cc55 (diff) | |
| download | talos-sbe-92a0f491bcab9f3df4cc92ff73a98590da75a3bc.tar.gz talos-sbe-92a0f491bcab9f3df4cc92ff73a98590da75a3bc.zip | |
Update OCC Control to add a singular START control
- Added PPC405_START control ENUM to procedure (and header)
- Removed default boot location FAPI_INF message as this no little value
- Updated wrapper to add -start, -halt and -safe_reet options
- Added better wrapper help
- Fixed the OCC FIR bit position in code and action file
- Added check that RISCWatch was not preventing the PPC405 to start
- Fix SRAM starting address for P9 location
- Fix powerman.act for the correct OCC FIR bit action for halting
- Rebsaed
Change-Id: Iac79898bac7eb8fa2237f2b48a930c4659b74f0e
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22240
Tested-by: Jenkins Server
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/24704
| -rw-r--r-- | import/chips/p9/sw_simulation/powermgmt.act | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/import/chips/p9/sw_simulation/powermgmt.act b/import/chips/p9/sw_simulation/powermgmt.act index 6b5820e5..65892854 100644 --- a/import/chips/p9/sw_simulation/powermgmt.act +++ b/import/chips/p9/sw_simulation/powermgmt.act @@ -47,11 +47,10 @@ CAUSE_EFFECT { LABEL=[PPC405 HALT] WATCH=[REG(0x0006D006)] CAUSE: TARGET=[REG(0x0006D006)] OP=[EQUALTO,BUF] DATA=[LITERAL(64, 02000000 00000000)] - #suet PPC405_UNHALT:tc1- EFFECT: TARGET=[REG(0x01010800)] OP=[BIT,OFF] BIT=[25] - EFFECT: TARGET=[REG(0x01010800)] OP=[BIT,ON] BIT=[25] + #suet PPC405_UNHALT:tc1- EFFECT: TARGET=[REG(0x01010800)] OP=[BIT,OFF] BIT=[31] + EFFECT: TARGET=[REG(0x01010800)] OP=[BIT,ON] BIT=[31] } - ## ## Actions for Procedure - p9_pm_occ_gpe_init ## @@ -75,3 +74,13 @@ CAUSE_EFFECT { #suet OCCGPE1_HALT_FAIL:tc1- EFFECT: TARGET=[REG(0x00062021)] OP=[BIT,OFF] BIT=[0] EFFECT: TARGET=[REG(0x00062021)] OP=[BIT,ON] BIT=[0] } + + +# Upon writing the PU_OCB_PIB_OCR[DBG_HALT} bit, set the OCCLFIR_PPC405_DBGSTOPACK_BIT. +CAUSE_EFFECT { + LABEL=[PPC405 SAFE_HALT] + WATCH=[REG(00x0006D002)] + CAUSE: TARGET=[REG(0x0006D002) OP=[EQUALTO,BUF] DATA=[LITERAL(64, 00200000 00000000)] + EFFECT: TARGET=[REG(0x01010800)] OP=[BIT,ON] BIT=[31] +} + |
