PutScomUnderMask and ModifyScom ChipOp Support

RTC:128974

RTC:128975

Change-Id: I07b38a6f2f98be839b867b0b085c78714944f845
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22388
Tested-by: Jenkins Server
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: Amit J. Tendolkar <amit.tendolkar@in.ibm.com>

12 files changed, 706 insertions, 37 deletions

diff --git a/sbe/sbefw/attr.C b/sbe/sbefw/attr.C
new file mode 100644
index 00000000..f893e625
--- /dev/null
+++ b/sbe/sbefw/attr.C
@@ -0,0 +1,100 @@
+#include <fapi2.H>
+extern fapi2attr::SystemAttributes_t G_system_attributes;
+extern fapi2attr::ProcChipAttributes_t G_proc_chip_attributes;
+extern fapi2attr::PervAttributes_t G_perv_attributes;
+extern fapi2attr::CoreAttributes_t G_core_attributes;
+extern fapi2attr::EQAttributes_t G_eq_attributes;
+extern fapi2attr::EXAttributes_t G_ex_attributes;
+void initAttrWA() 
+{ 
+////// workaround start 
+#ifndef SBE_SEEPROM_FIXED_SECTION
+G_system_attributes.fapi2attr::SystemAttributes_t::ATTR_SYSTEM_IPL_PHASE=0x1;
+G_system_attributes.fapi2attr::SystemAttributes_t::ATTR_IS_MPIPL=0x01;
+G_system_attributes.fapi2attr::SystemAttributes_t::ATTR_PROC_FABRIC_ADDR_BAR_MODE=0x01;
+G_system_attributes.fapi2attr::SystemAttributes_t::ATTR_MEM_MIRROR_PLACEMENT_POLICY=0x01;
+G_system_attributes.fapi2attr::SystemAttributes_t::ATTR_SBE_BOOTLOADER_OFFSET=0x01;
+G_system_attributes.fapi2attr::SystemAttributes_t::ATTR_HOSTBOOT_HRMOR_OFFSET=0x01;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_FSI=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_PRV=0xF07D;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_N0=0xF03F;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_N1=0xF03F;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_N2=0xF03F;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_N3=0xF01F;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_XB=0xF01D;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_MC01=0xF0FD;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_MC23=0xF0FD;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_OB0=0xF1FD;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_OB1=0;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_OB2=0;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_OB3=0xF1FD;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_PCI0=0xF1FD;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_PCI1=0xF0FD;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_PCI2=0xF07D;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EQ0=0xF019;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EQ1=0xF019;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EQ2=0xF019;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EQ3=0xF019;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EQ4=0xF019;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EQ5=0xF019;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EC00=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EC01=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EC02=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EC03=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EC04=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EC05=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EC06=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EC07=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EC08=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EC09=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EC10=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EC11=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EC12=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EC13=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EC14=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EC15=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EC16=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EC17=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EC18=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EC19=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EC20=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EC21=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EC22=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PG_EC23=0xF1FF;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_FABRIC_SYSTEM_ID=0x1;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_MC_SYNC_MODE=0x01;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_EQ_GARD=0x01;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_EC_GARD=0x01;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_I2C_BUS_DIV_REF=0x01;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_BOOT_FLAGS=0x01;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_NODE_POS=0x01;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_CHIP_POS=0x01;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_BOOT_FREQ=0x01;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_NEST_PLL_BUCKET=0x01;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_VCS_BOOT_VOLTAGE=0x01;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_VDD_BOOT_VOLTAGE=0x01;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_FABRIC_CHIP_ID=0x01;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_FABRIC_GROUP_ID=0x01;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_ADU_XSCOM_BAR_BASE_ADDR=0x01;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PROC_SBE_MASTER_CHIP=0x01;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PROC_FABRIC_SYSTEM_ID=0x01;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PROC_FABRIC_GROUP_ID=0x01;
+G_proc_chip_attributes.fapi2attr::ProcChipAttributes_t::ATTR_PROC_FABRIC_CHIP_ID=0x01;
+G_perv_attributes.fapi2attr::PervAttributes_t::ATTR_CHIP_UNIT_POS[0]=0x00;
+G_perv_attributes.fapi2attr::PervAttributes_t::ATTR_CHIP_UNIT_POS[1]=0x01;
+G_perv_attributes.fapi2attr::PervAttributes_t::ATTR_CHIP_UNIT_POS[2]=0x02;
+G_perv_attributes.fapi2attr::PervAttributes_t::ATTR_CHIP_UNIT_POS[3]=0x03;
+G_perv_attributes.fapi2attr::PervAttributes_t::ATTR_CHIP_UNIT_POS[4]=0x04;
+G_perv_attributes.fapi2attr::PervAttributes_t::ATTR_CHIP_UNIT_POS[5]=0x05;
+G_perv_attributes.fapi2attr::PervAttributes_t::ATTR_CHIP_UNIT_POS[6]=0x06;
+G_perv_attributes.fapi2attr::PervAttributes_t::ATTR_CHIP_UNIT_POS[7]=0x07;
+G_perv_attributes.fapi2attr::PervAttributes_t::ATTR_CHIP_UNIT_POS[8]=0x08;
+G_perv_attributes.fapi2attr::PervAttributes_t::ATTR_CHIP_UNIT_POS[9]=0x09;
+G_perv_attributes.fapi2attr::PervAttributes_t::ATTR_CHIP_UNIT_POS[10]=0x0A;
+G_perv_attributes.fapi2attr::PervAttributes_t::ATTR_CHIP_UNIT_POS[11]=0x0B;
+G_perv_attributes.fapi2attr::PervAttributes_t::ATTR_CHIP_UNIT_POS[12]=0x0C;
+G_perv_attributes.fapi2attr::PervAttributes_t::ATTR_CHIP_UNIT_POS[13]=0x0D;
+G_perv_attributes.fapi2attr::PervAttributes_t::ATTR_CHIP_UNIT_POS[14]=0x0E;
+G_perv_attributes.fapi2attr::PervAttributes_t::ATTR_CHIP_UNIT_POS[15]=0x0F;
+#endif //SBE_SEEPROM_FIXED_SECTION 
+} 
diff --git a/sbe/sbefw/sbeSpMsg.H b/sbe/sbefw/sbeSpMsg.H
index e34922e7..07d8bbb8 100644
--- a/sbe/sbefw/sbeSpMsg.H
+++ b/sbe/sbefw/sbeSpMsg.H
@@ -145,6 +145,115 @@ typedef struct
     uint32_t minor:8;
 }sbeIstepReqMsg_t;
 
+
+/**
+  * @brief structure for GetScom Chipop (0xA201) contents.
+  *
+  */
+typedef struct
+{
+    uint32_t hiAddr;
+    uint32_t lowAddr;
+}sbeGetScomReqMsg_t;
+
+/**
+  * @brief structure for PutScom Chipop (0xA202) contents.
+  *
+  */
+typedef struct
+{
+    uint32_t hiAddr;
+    uint32_t lowAddr;
+    uint32_t hiInputData;
+    uint32_t lowInputData;
+
+    /**
+      * @brief return 64-bit Scom data
+      *
+      * @return 64-bit Scom data
+      */
+    uint64_t getScomData()
+    {
+        uint64_t data = ((uint64_t)hiInputData << 32) | lowInputData;
+        return data;
+    }
+}sbePutScomReqMsg_t;
+
+/**
+  * @brief structure for Modify_Scom Chipop (0xA203) contents.
+  *
+  */
+typedef struct
+{
+    uint32_t reserved:24;
+    uint32_t opMode:8;
+    uint32_t hiAddr;
+    uint32_t lowAddr;
+    uint32_t hiInputData;
+    uint32_t lowInputData;
+
+    /**
+      * @brief return 64-bit modifying data
+      *
+      * @return 64-bit modifying data
+      */
+    uint64_t getModifyingData()
+    {
+        uint64_t data = ((uint64_t)hiInputData << 32) | lowInputData;
+        return data;
+    }
+}sbeModifyScomReqMsg_t;
+
+/**
+  * @brief structure for PutScom_UnderMask Chipop (0xA204) contents.
+  *
+  */
+typedef struct
+{
+    uint32_t hiAddr;
+    uint32_t lowAddr;
+    uint32_t hiInputData;
+    uint32_t lowInputData;
+    uint32_t hiMaskData;
+    uint32_t lowMaskData;
+
+    /**
+      * @brief return 64-bit input data
+      *
+      * @return 64-bit input data
+      */
+    uint64_t getInputData()
+    {
+        uint64_t data = ((uint64_t)hiInputData << 32) | lowInputData;
+        return data;
+    }
+
+    /**
+      * @brief return 64-bit input mask
+      *
+      * @return 64-bit input mask
+      */
+    uint64_t getInputMask()
+    {
+        uint64_t data = ((uint64_t)hiMaskData << 32) | lowMaskData;
+        return data;
+    }
+    
+    /**
+      * @brief Determines 64-bit Scom data
+      *
+      * @param[in/out] io_scomData 64-bit scom data
+      */
+    void getScomData(uint64_t &io_scomData)
+    {
+        uint64_t l_inputMask = getInputMask();
+        uint64_t l_inputData = getInputData();
+        io_scomData = (io_scomData & (~l_inputMask))
+                    | (l_inputData & l_inputMask);
+    }    
+}sbePutScomUnderMaskReqMsg_t;
+
+
 // Maximum number of capabilities
 static const uint32_t SBE_MAX_CAPABILITIES = 18;
 
diff --git a/sbe/sbefw/sbe_sp_intf.H b/sbe/sbefw/sbe_sp_intf.H
index c992a075..66cccfbc 100644
--- a/sbe/sbefw/sbe_sp_intf.H
+++ b/sbe/sbefw/sbe_sp_intf.H
@@ -63,6 +63,17 @@ enum sbeScomAccessCommands
 };
 
 /**
+ *  @brief enum for modify mode
+ *
+*/
+enum sbeChipOpModifyMode
+{
+    SBE_MODIFY_MODE_OR      = 0x01,
+    SBE_MODIFY_MODE_AND     = 0x02,
+    SBE_MODIFY_MODE_XOR     = 0x03,
+};
+
+/**
  * @brief enums for Ring Access Messages
  *
 */
diff --git a/sbe/sbefw/sbecmdgeneric.C b/sbe/sbefw/sbecmdgeneric.C
index e8dd646d..7a288e20 100644
--- a/sbe/sbefw/sbecmdgeneric.C
+++ b/sbe/sbefw/sbecmdgeneric.C
@@ -29,7 +29,9 @@ sbeCapabilityRespMsg::sbeCapabilityRespMsg()
 
     capability[SCOM_CAPABILITY_START_IDX] =
                                 GET_SCOM_SUPPPORTED |
-                                PUT_SCOM_SUPPPORTED;
+                                PUT_SCOM_SUPPPORTED |
+                                MODIFY_SCOM_SUPPPORTED |
+                                PUT_SCOM_UNDER_MASK_SUPPPORTED ;
 
     capability[GENERIC_CHIPOP_CAPABILITY_START_IDX] =
                                 GET_SBE_CAPABILITIES_SUPPPORTED;
diff --git a/sbe/sbefw/sbecmdparser.C b/sbe/sbefw/sbecmdparser.C
index c880499e..1cfa21a7 100644
--- a/sbe/sbefw/sbecmdparser.C
+++ b/sbe/sbefw/sbecmdparser.C
@@ -27,6 +27,18 @@ static sbeCmdStruct_t g_sbeScomCmdArray [] =
      SBE_CMD_PUTSCOM,
      SBE_FENCE_AT_CONTINUOUS_IPL,
      },
+
+
+    {sbeModifyScom,
+     SBE_CMD_MODIFYSCOM,
+     SBE_FENCE_AT_CONTINUOUS_IPL,
+     },
+
+    {sbePutScomUnderMask,
+     SBE_CMD_PUTSCOM_MASK,
+     SBE_FENCE_AT_CONTINUOUS_IPL,
+     },
+
 };
 
 ////////////////////////////////////////////////////////////////
diff --git a/sbe/sbefw/sbecmdscomaccess.C b/sbe/sbefw/sbecmdscomaccess.C
index 76147190..bf0c208b 100644
--- a/sbe/sbefw/sbecmdscomaccess.C
+++ b/sbe/sbefw/sbecmdscomaccess.C
@@ -20,6 +20,7 @@ uint32_t sbeGetScom (uint8_t *i_pArg)
     SBE_ENTER(SBE_FUNC);
 
     uint32_t l_rc = SBE_SEC_OPERATION_SUCCESSFUL;
+    sbeGetScomReqMsg_t l_getScomReqMsg;
 
     do
     {
@@ -30,9 +31,8 @@ uint32_t sbeGetScom (uint8_t *i_pArg)
         // the scom addresses plus the expected
         // EOT entry at the end
 
-        uint32_t  l_len2dequeue  = 2;
-        uint32_t l_scomAddr[2] = {0};
-        l_rc = sbeUpFifoDeq_mult (l_len2dequeue, &l_scomAddr[0]);
+        uint32_t l_len2dequeue  = sizeof(l_getScomReqMsg)/sizeof(uint32_t);
+        l_rc = sbeUpFifoDeq_mult (l_len2dequeue, (uint32_t *)&l_getScomReqMsg);
 
         // If FIFO access failure
         if (l_rc != SBE_SEC_OPERATION_SUCCESSFUL)
@@ -48,24 +48,22 @@ uint32_t sbeGetScom (uint8_t *i_pArg)
 
         // @TODO via RTC : 126140
         //       Support Indirect SCOM
-        // Data entry 1 : Scom Register Address (0..31)
-        // Data entry 2 : Register Address (32..63)
-        // For Direct SCOM, will ignore entry 1
+        // For Direct SCOM, will ignore Bit 0-31
 
         uint64_t l_scomData = 0;
-        SBE_DEBUG(SBE_FUNC"scomAddr1[0x%08X]", l_scomAddr[1]);
-        l_rc = getscom (0, l_scomAddr[1], &l_scomData);
+        SBE_DEBUG(SBE_FUNC"scomAddrLow[0x%08X]", l_getScomReqMsg.lowAddr);
+        l_pcbpibStatus = getscom_abs (l_getScomReqMsg.lowAddr, &l_scomData);
 
-        if (l_rc) // scom failed
+        if (l_pcbpibStatus != SBE_PCB_PIB_ERROR_NONE) // scom failed
         {
-            SBE_ERROR(SBE_FUNC"getscom failed, l_rc[0x%08X]", l_rc);
+            SBE_ERROR(SBE_FUNC"getscom failed, l_pcbpibStatus[0x%08X], "
+                "scomAddr[0x%08X]", l_pcbpibStatus, l_getScomReqMsg.lowAddr);
             l_primStatus = SBE_PRI_GENERIC_EXECUTION_FAILURE;
             l_secStatus  = SBE_SEC_GENERIC_FAILURE_IN_EXECUTION;
-            l_pcbpibStatus = l_rc;
         }
         else // successful scom
         {
-            SBE_DEBUG(SBE_FUNC"getscom succeeds, l_scomData[0x%X]",
+            SBE_DEBUG(SBE_FUNC"getscom succeeds, l_scomData[0x%016X]",
                                    l_scomData);
 
             l_sbeDownFifoRespBuf[0] = (uint32_t)(l_scomData>>32);
@@ -119,6 +117,7 @@ uint32_t sbePutScom (uint8_t *i_pArg)
     SBE_ENTER(SBE_FUNC);
 
     uint32_t l_rc = SBE_SEC_OPERATION_SUCCESSFUL;
+    sbePutScomReqMsg_t l_putScomReqMsg;
 
     do
     {
@@ -130,9 +129,8 @@ uint32_t sbePutScom (uint8_t *i_pArg)
         // corresponding data (two entries) plus
         // the expected EOT entry at the end
 
-        uint32_t  l_len2dequeue  = 4;
-        uint32_t l_scomAddr_Data[4] = {0};
-        l_rc = sbeUpFifoDeq_mult (l_len2dequeue, &l_scomAddr_Data[0]);
+        uint32_t  l_len2dequeue  = sizeof(l_putScomReqMsg)/sizeof(uint32_t);
+        l_rc = sbeUpFifoDeq_mult (l_len2dequeue, (uint32_t *)&l_putScomReqMsg);
 
         // If FIFO access failure
         if (l_rc != SBE_SEC_OPERATION_SUCCESSFUL)
@@ -155,26 +153,23 @@ uint32_t sbePutScom (uint8_t *i_pArg)
         // Data entry 2 : Scom Register Data (0..31)
         // Data entry 3 : Scom Register Data (32..63)
         // For Direct SCOM, will ignore entry 0
-        l_scomData = ((uint64_t)(l_scomAddr_Data[2])<<32)
-                           | (l_scomAddr_Data[3]);
 
-        l_rc = putscom (0, l_scomAddr_Data[1], l_scomData);
+        l_scomData = l_putScomReqMsg.getScomData();
+
+        l_pcbpibStatus = putscom_abs (l_putScomReqMsg.lowAddr, l_scomData);
 
-        if (l_rc) // scom failed
+        if (l_pcbpibStatus != SBE_PCB_PIB_ERROR_NONE) // scom failed
         {
-            SBE_ERROR(SBE_FUNC"putscom failed, l_rc[0x%08X]", l_rc);
+            SBE_ERROR(SBE_FUNC"putscom failed, l_pcbpibStatus[0x%08X]",
+                            l_pcbpibStatus);
             SBE_ERROR(SBE_FUNC"putscom failure data, "
-                          "scomAddr0[0x%08X], "
-                          "scomAddr1[0x%08X], "
-                          "scomData0[0x%08X], "
-                          "scomData1[0x%08X]",
-                          l_scomAddr_Data[0],
-                          l_scomAddr_Data[1],
-                          l_scomAddr_Data[2],
-                          l_scomAddr_Data[3]);
+                          "scomAddr[0x%08X%08X], "
+                          "scomData[0x%016X]",
+                          l_putScomReqMsg.hiAddr,
+                          l_putScomReqMsg.lowAddr,
+                          l_scomData);
             l_primStatus = SBE_PRI_GENERIC_EXECUTION_FAILURE;
             l_secStatus  = SBE_SEC_GENERIC_FAILURE_IN_EXECUTION;
-            l_pcbpibStatus = l_rc;
         }
 
         // Build the response header packet
@@ -201,3 +196,258 @@ uint32_t sbePutScom (uint8_t *i_pArg)
     return l_rc;
     #undef SBE_FUNC
 }
+
+
+//////////////////////////////////////////////////////
+//////////////////////////////////////////////////////
+uint32_t sbeModifyScom (uint8_t *i_pArg)
+{
+    #define SBE_FUNC " sbeModifyScom "
+    SBE_ENTER(SBE_FUNC);
+
+    uint32_t l_rc = SBE_SEC_OPERATION_SUCCESSFUL;
+
+    sbeModifyScomReqMsg_t l_modifyScomMsg;
+
+    do
+    {
+        uint16_t l_primStatus = g_sbeCmdRespHdr.prim_status;
+        uint16_t l_secStatus  = g_sbeCmdRespHdr.sec_status ;
+
+        // @TODO via RTC : 128916
+        //       Use structures for payload entries
+
+        // Will attempt to dequeue the following entries:
+        // Entry 1 : Operation Mode
+        // Entry 2 : Scom Register Address (0..31)
+        // Entry 3 : Scom Register Address (32..63)
+        // Entry 4 : Modifying Data (0..31)
+        // Entry 5 : Modifying Data (32..63)
+        // Entry 6 : EOT entry at the end
+
+        uint32_t  l_len2dequeue  = sizeof(l_modifyScomMsg)/sizeof(uint32_t);
+        l_rc = sbeUpFifoDeq_mult (l_len2dequeue, (uint32_t *)&l_modifyScomMsg);
+
+        // If FIFO access failure
+        if (l_rc != SBE_SEC_OPERATION_SUCCESSFUL)
+        {
+            // Let command processor routine to handle the RC.
+            break;
+        }
+
+        uint32_t l_sbeDownFifoRespBuf[4] = {0};
+        uint32_t l_pcbpibStatus = SBE_PCB_PIB_ERROR_NONE;
+        uint32_t  l_len2enqueue  = 0;
+
+        // @TODO via RTC : 126140
+        //       Support Indirect SCOM
+
+        // Modifying Data
+        uint64_t l_modifyingData = l_modifyScomMsg.getModifyingData();
+
+        SBE_DEBUG(SBE_FUNC"OpMode[0x%02X], modifyingData[0x%016X]",
+                    l_modifyScomMsg.opMode, l_modifyingData);
+
+        // The following steps need to be done as part of this command :
+        //    1. Read Register Data (getscom)
+        //    2. 'AND' the Mask with the data read from register
+        //    3. 'OR' the modifying data with the result of step 2
+        //    4. Write the result of step 3 into the register (putscom)
+        do
+        {
+                // Check for a valid OpMode
+                if ( (l_modifyScomMsg.opMode != SBE_MODIFY_MODE_OR)   &&
+                     (l_modifyScomMsg.opMode != SBE_MODIFY_MODE_AND)  &&
+                     (l_modifyScomMsg.opMode != SBE_MODIFY_MODE_XOR) )
+                {
+                    // Invalid Data passed
+                    SBE_ERROR(SBE_FUNC"Invalid OpMode");
+                    l_primStatus = SBE_PRI_INVALID_DATA;
+                    l_secStatus  = SBE_SEC_GENERIC_FAILURE_IN_EXECUTION;
+                    break;
+                }
+
+                uint64_t l_scomData = 0;
+                l_pcbpibStatus = getscom_abs (l_modifyScomMsg.lowAddr,
+                                              &l_scomData);
+
+                if (l_pcbpibStatus != SBE_PCB_PIB_ERROR_NONE) // scom failed
+                {
+                    SBE_ERROR(SBE_FUNC"getscom failed, l_pcbpibStatus[0x%08X],"
+                        " ScomAddress[0x%08X%08X]", l_pcbpibStatus,
+                        l_modifyScomMsg.hiAddr, l_modifyScomMsg.lowAddr);
+                    l_primStatus = SBE_PRI_GENERIC_EXECUTION_FAILURE;
+                    l_secStatus  = SBE_SEC_GENERIC_FAILURE_IN_EXECUTION;
+                    break;
+                }
+
+                if (l_modifyScomMsg.opMode == SBE_MODIFY_MODE_OR)
+                {
+                    l_modifyingData |= l_scomData;
+                }
+                else if (l_modifyScomMsg.opMode == SBE_MODIFY_MODE_AND)
+                {
+                    l_modifyingData &= l_scomData;
+                }
+                else
+                {
+                    l_modifyingData ^= l_scomData;
+                }
+
+                // Write the modified data
+                l_pcbpibStatus = putscom_abs (l_modifyScomMsg.lowAddr,
+                                              l_modifyingData);
+
+                if (l_pcbpibStatus != SBE_PCB_PIB_ERROR_NONE) // scom failed
+                {
+                    SBE_ERROR(SBE_FUNC"putscom failed, l_pcbpibStatus[0x%08X],"
+                        " ScomAddress[0x%08X%08X]", l_pcbpibStatus,
+                        l_modifyScomMsg.hiAddr, l_modifyScomMsg.lowAddr);
+                    SBE_ERROR(SBE_FUNC"modifyingData[0x%016X]",l_modifyingData);
+                    l_primStatus = SBE_PRI_GENERIC_EXECUTION_FAILURE;
+                    l_secStatus  = SBE_SEC_GENERIC_FAILURE_IN_EXECUTION;
+                    break;
+                }
+        } while (false);
+
+        // Build the response header packet
+
+        uint32_t  l_curIndex = 0;
+        sbeBuildMinRespHdr(&l_sbeDownFifoRespBuf[0],
+                            l_curIndex,
+                            l_primStatus,
+                            l_secStatus,
+                            l_pcbpibStatus);
+
+        // Now enqueue into the downstream FIFO
+        l_len2enqueue = ++l_curIndex;
+        l_rc = sbeDownFifoEnq_mult (l_len2enqueue,
+                                   (uint32_t *)&l_sbeDownFifoRespBuf);
+        if (l_rc)
+        {
+           // will let command processor routine
+           // handle the failure
+           break;
+        }
+
+    } while(false);
+
+    return l_rc;
+    #undef SBE_FUNC
+}
+
+/////////////////////////////////////////////////////
+//////////////////////////////////////////////////////
+uint32_t sbePutScomUnderMask (uint8_t *i_pArg)
+{
+    #define SBE_FUNC " sbePutScomUnderMask "
+    SBE_ENTER(SBE_FUNC);
+
+    uint32_t l_rc = SBE_SEC_OPERATION_SUCCESSFUL;
+    sbePutScomUnderMaskReqMsg_t l_putScomUmaskMsg;
+
+    do
+    {
+        uint16_t l_primStatus = g_sbeCmdRespHdr.prim_status;
+        uint16_t l_secStatus  = g_sbeCmdRespHdr.sec_status ;
+
+        // @TODO via RTC : 128916
+        //       Use structures for payload entries
+
+        // Will attempt to dequeue the following entries:
+        // Entry 1 : Scom Register Address (0..31)
+        // Entry 2 : Scom Register Address (32..63)
+        // Entry 3 : Modifying Data (0..31)
+        // Entry 4 : Modifying Data (32..63)
+        // Entry 5 : Mask Data (0..31)
+        // Entry 6 : Mask Data (32..63)
+        // Entry 7 : EOT entry at the end
+
+        uint32_t  l_len2dequeue  = sizeof(l_putScomUmaskMsg)/sizeof(uint32_t);
+        l_rc = sbeUpFifoDeq_mult (l_len2dequeue,
+                                  (uint32_t *)&l_putScomUmaskMsg);
+
+        // If FIFO access failure
+        if (l_rc != SBE_SEC_OPERATION_SUCCESSFUL)
+        {
+            // Let command processor routine to handle the RC.
+            break;
+        }
+
+        uint32_t l_sbeDownFifoRespBuf[4] = {0};
+        uint32_t l_pcbpibStatus = SBE_PCB_PIB_ERROR_NONE;
+        uint32_t  l_len2enqueue  = 0;
+
+        // @TODO via RTC : 126140
+        //       Support Indirect SCOM
+        // For Direct SCOM, will ignore entry 1
+
+        SBE_DEBUG(SBE_FUNC"scomAddr[0x%08X%08X],"
+                     "modifyingData[0x%08X%08X]",
+                      l_putScomUmaskMsg.hiAddr,
+                      l_putScomUmaskMsg.lowAddr,
+                      l_putScomUmaskMsg.hiInputData,
+                      l_putScomUmaskMsg.lowInputData);
+        SBE_DEBUG(SBE_FUNC"maskData[0x%08X%08X]",
+                      l_putScomUmaskMsg.hiMaskData,
+                      l_putScomUmaskMsg.lowMaskData);
+
+        // PutScomUnderMask formula:
+        // dest_reg = (dest_reg & ~input_mask) | (input_data & input_mask)
+
+        do
+        {
+            uint64_t l_scomData = 0;
+
+            l_pcbpibStatus = getscom_abs (l_putScomUmaskMsg.lowAddr,
+                                          &l_scomData);
+            if (l_pcbpibStatus == SBE_PCB_PIB_ERROR_NONE) // getscom succeeded
+            {
+                l_putScomUmaskMsg.getScomData(l_scomData);
+
+                // Write the modified data
+                l_pcbpibStatus = putscom_abs (l_putScomUmaskMsg.lowAddr,
+                                              l_scomData);
+            }
+
+            if (l_pcbpibStatus != SBE_PCB_PIB_ERROR_NONE) // scom failed
+            {
+                SBE_ERROR(SBE_FUNC"scom failed, l_pcbpibStatus[0x%08X], "
+                    "ScomAddress[0x%08X%08X]", l_pcbpibStatus,
+                    l_putScomUmaskMsg.hiAddr,
+                    l_putScomUmaskMsg.lowAddr);
+                SBE_ERROR(SBE_FUNC"modifyingData[0x%08X%08X]"
+                    "maskData[0x%08X%08X]",
+                    l_putScomUmaskMsg.hiInputData,
+                    l_putScomUmaskMsg.lowInputData,
+                    l_putScomUmaskMsg.hiMaskData,
+                    l_putScomUmaskMsg.lowMaskData);
+
+                l_primStatus = SBE_PRI_GENERIC_EXECUTION_FAILURE;
+                l_secStatus  = SBE_SEC_GENERIC_FAILURE_IN_EXECUTION;
+                break;
+            }
+        } while (false);
+
+        // Build the response header packet
+        uint32_t  l_curIndex = 0;
+        sbeBuildMinRespHdr(&l_sbeDownFifoRespBuf[0],
+                            l_curIndex,
+                            l_primStatus,
+                            l_secStatus,
+                            l_pcbpibStatus);
+
+        // Now enqueue into the downstream FIFO
+        l_len2enqueue = ++l_curIndex;
+        l_rc = sbeDownFifoEnq_mult (l_len2enqueue, &l_sbeDownFifoRespBuf[0]);
+        if (l_rc)
+        {
+           // will let command processor routine
+           // handle the failure
+           break;
+        }
+    } while(false);
+
+    return l_rc;
+    #undef SBE_FUNC
+}
diff --git a/sbe/sbefw/sbecmdscomaccess.H b/sbe/sbefw/sbecmdscomaccess.H
index aba4c2ab..13c9549a 100644
--- a/sbe/sbefw/sbecmdscomaccess.H
+++ b/sbe/sbefw/sbecmdscomaccess.H
@@ -30,6 +30,33 @@ uint32_t sbeGetScom (uint8_t *i_pArg);
 uint32_t sbePutScom (uint8_t *i_pArg);
 
 
+/**
+  * @brief sbeModifyScom : Modify the Scom data
+  *     This chipOp needs to do the following
+  *        1. Read Register Data (getscom)
+  *        2. modify the scomData using the given op mode
+  *        3. Write the modified Data into the Register (putscom)
+  *
+  * @param[in] i_pArg Buffer to be passed to the function (not used as of now)
+  *
+  * @return    Rc from the FIFO access utility
+  */
+uint32_t sbeModifyScom (uint8_t *i_pArg);
+
+
+/**
+  * @brief sbePutScomUnderMask : Write data into Downstream FIFO
+  *    The following steps need to be done as part of this command :
+  *        1. Read Register Data (getscom)
+  *        2. 'AND' the Mask with the data read from register
+  *        3. 'OR' the modifying data with the result of step 2
+  *        4. Write the result of step 3 into the register (putscom)
+  *
+  * @param[in] i_pArg Buffer to be passed to the function (not used as of now)
+  *
+  * @return    Rc from the FIFO access utility
+  */
+uint32_t sbePutScomUnderMask (uint8_t *i_pArg);
 
 
 #endif /* __SBEFW_SBECMDSCOMACCESS_H */
diff --git a/sbe/sbefw/sbefifo.H b/sbe/sbefw/sbefifo.H
index 04fd74d8..b9be8cd9 100644
--- a/sbe/sbefw/sbefifo.H
+++ b/sbe/sbefw/sbefifo.H
@@ -138,7 +138,7 @@ typedef struct
 extern inline uint32_t sbeUpFifoDeq (uint64_t *o_data)
 {
     /* For SBE FIFO (PIB) access, chiplet ID should be passed as 0 */
-    return getscom(0, SBE_UPSTREAM_FIFO_DEQ_ADD, o_data);
+    return getscom_abs(SBE_UPSTREAM_FIFO_DEQ_ADD, o_data);
 }
 
 
@@ -151,7 +151,7 @@ extern inline uint32_t sbeUpFifoDeq (uint64_t *o_data)
 extern inline uint32_t sbeUpFifoPerformReset (void)
 {
     SBE_TRACE(">sbeUpFifoPerformReset");
-    return putscom(0, SBE_UPSTREAM_FIFO_PERFORM_RESET, ((uint64_t)0x1)<<32);
+    return putscom_abs(SBE_UPSTREAM_FIFO_PERFORM_RESET, ((uint64_t)0x1)<<32);
 }
 
 
@@ -164,7 +164,7 @@ extern inline uint32_t sbeUpFifoPerformReset (void)
 extern inline uint32_t sbeUpFifoAckEot (void)
 {
     SBE_DEBUG("sbeUpFifoAckEot");
-    return putscom(0, SBE_UPSTREAM_FIFO_ACK_EOT, ((uint64_t)0x1)<<32);
+    return putscom_abs(SBE_UPSTREAM_FIFO_ACK_EOT, ((uint64_t)0x1)<<32);
 }
 
 
@@ -184,7 +184,7 @@ extern inline uint32_t sbeUpFifoAckEot (void)
 extern inline uint32_t sbeDownFifoEnq (const uint64_t i_data)
 {
     SBE_DEBUG(">sbeDownFifoEnq");
-    return putscom(0, SBE_DOWNSTREAM_FIFO_ENQ_ADD, i_data);
+    return putscom_abs(SBE_DOWNSTREAM_FIFO_ENQ_ADD, i_data);
 }
 
 
@@ -200,7 +200,7 @@ extern inline uint32_t sbeDownFifoEnq (const uint64_t i_data)
 extern inline uint32_t sbeDownFifoGetStatus (uint64_t *o_data)
 {
     SBE_DEBUG(">sbeDownFifoStatus");
-    return getscom(0, SBE_DOWNSTREAM_FIFO_STATUS, o_data);
+    return getscom_abs(SBE_DOWNSTREAM_FIFO_STATUS, o_data);
 }
 
 /**
@@ -212,7 +212,7 @@ extern inline uint32_t sbeDownFifoGetStatus (uint64_t *o_data)
 extern inline uint32_t sbeDownFifoSignalEot (void)
 {
     SBE_DEBUG(">sbeDownFifoSignalEot");
-    return putscom(0, SBE_DOWNSTREAM_FIFO_SIGNAL_EOT, ((uint64_t)0x1)<<32);
+    return putscom_abs(SBE_DOWNSTREAM_FIFO_SIGNAL_EOT, ((uint64_t)0x1)<<32);
 }
 
 
diff --git a/sbe/test/testGetCapabilities.py b/sbe/test/testGetCapabilities.py
index 270a1326..4b631270 100755
--- a/sbe/test/testGetCapabilities.py
+++ b/sbe/test/testGetCapabilities.py
@@ -10,7 +10,7 @@ EXPDATA1 = [0x0,0x0,0x0,0x0,
            0x0,0x0,0x0,0x0,
            0xa1,0x0,0x0,0x01, # istep
            0x0,0x0,0x0,0x0,
-           0xa2,0x0,0x0,0x03, #getscom/putscom
+           0xa2,0x0,0x0,0x0f, #getscom/putscom/modifyscom/putscomundermask
            0x0,0x0,0x0,0x0,
            0x0,0x0,0x0,0x0,
            0x00,0x0,0x0,0x0];
diff --git a/sbe/test/testModifyScom.py b/sbe/test/testModifyScom.py
new file mode 100755
index 00000000..cb1c3a1c
--- /dev/null
+++ b/sbe/test/testModifyScom.py
@@ -0,0 +1,74 @@
+import sys
+sys.path.append("targets/p9_nimbus/sbeTest" )
+import testUtil
+err = False
+#from testWrite import *
+
+
+PUTSCOM_TESTDATA = [0,0,0,6,
+                    0,0,0xA2,0x02,
+                    0,0,0x0,0x00,
+                    0,0x02,0x00,0x14,
+                    0x00,0xff,0x00,0xff,
+                    0x00,0xff,0x00,0xff ]
+
+PUTSCOM_EXPDATA = [0xc0,0xde,0xa2,0x02,
+                   0x0,0x0,0x0,0x0,
+                   0x00,0x0,0x0,0x03];
+
+
+MODIFYSCOM_TESTDATA = [0,0,0,7,
+            0,0,0xA2,0x03,
+            0,0,0x0,0x01,
+            0,0,0x0,0x00,
+            0,0x02,0x00,0x14,
+            0xde,0x00,0xff,0x00,
+            0xca,0x00,0xee,0x00]
+
+MODIFYSCOM_EXPDATA = [0xc0,0xde,0xa2,0x03,
+                   0x0,0x0,0x0,0x0,
+                   0x00,0x0,0x0,0x03];
+
+GETSCOM4MODIFYSCOM_TESTDATA = [0,0,0,4,
+                   0,0,0xA2,0x01,
+                   0,0,0x0,0x00,
+                   0,0x02,0x0,0x14]
+
+GETSCOM4MODIFYSCOM_EXPDATA = [0xde,0xff,0xff,0xff,
+                   0xca,0xff,0xee,0xff,
+                   0xc0,0xde,0xa2,0x01,
+                   0x0,0x0,0x0,0x0,
+                   0x00,0x0,0x0,0x03];
+
+# MAIN Test Run Starts Here...
+#-------------------------------------------------
+def main( ):
+    testUtil.runCycles( 10000000 )
+
+    testUtil.writeUsFifo( PUTSCOM_TESTDATA )
+    testUtil.writeEot( )
+    testUtil.readDsFifo( PUTSCOM_EXPDATA )
+    testUtil.readEot( )
+
+    testUtil.writeUsFifo( MODIFYSCOM_TESTDATA )
+    testUtil.writeEot( )
+    testUtil.readDsFifo( MODIFYSCOM_EXPDATA )
+    testUtil.readEot( )
+
+    testUtil.writeUsFifo( GETSCOM4MODIFYSCOM_TESTDATA )
+    testUtil.writeEot( )
+    testUtil.readDsFifo( GETSCOM4MODIFYSCOM_EXPDATA )
+    testUtil.readEot( )
+
+#-------------------------------------------------
+# Calling all test code
+#-------------------------------------------------
+main()
+
+if err:
+    print ("\nTest Suite completed with error(s)")
+    #sys.exit(1)
+else:
+    print ("\nTest Suite completed with no errors")
+    #sys.exit(0);
+
diff --git a/sbe/test/testPutScomUnderMask.py b/sbe/test/testPutScomUnderMask.py
new file mode 100755
index 00000000..7b88ef4e
--- /dev/null
+++ b/sbe/test/testPutScomUnderMask.py
@@ -0,0 +1,75 @@
+import sys
+sys.path.append("targets/p9_nimbus/sbeTest" )
+import testUtil
+err = False
+#from testWrite import *
+
+PUTSCOM_TESTDATA = [0,0,0,6,
+                    0,0,0xA2,0x02,
+                    0,0,0x0,0x00,
+                    0,0x02,0x00,0x14,
+                    0xff,0xff,0xff,0xff,
+                    0xff,0xff,0xff,0xff ]
+
+PUTSCOM_EXPDATA = [0xc0,0xde,0xa2,0x02,
+                   0x0,0x0,0x0,0x0,
+                   0x00,0x0,0x0,0x03];
+
+
+PUTSCOMUMASK_TESTDATA = [0,0,0,8,
+            0,0,0xA2,0x04,
+            0,0,0x0,0x00,
+            0,0x02,0x00,0x14,
+            0xde,0xca,0xff,0xee,
+            0xaa,0xca,0xff,0xee,
+            0xff,0x00,0xff,0x00,
+            0x00,0xff,0x00,0xff]
+
+
+PUTSCOMUMASK_EXPDATA = [0xc0,0xde,0xa2,0x04,
+                   0x0,0x0,0x0,0x0,
+                   0x00,0x0,0x0,0x03];
+
+GETSCOMUMASK_TESTDATA = [0,0,0,4,
+                   0,0,0xA2,0x01,
+                   0,0,0x0,0x00,
+                   0,0x02,0x0,0x14]
+
+GETSCOMUMASK_EXPDATA = [0xde, 0xff, 0xff, 0xff,
+                   0xff, 0xca, 0xff, 0xee,
+                   0xc0,0xde,0xa2,0x01,
+                   0x0,0x0,0x0,0x0,
+                   0x00,0x0,0x0,0x03];
+
+# MAIN Test Run Starts Here...
+#-------------------------------------------------
+def main( ):
+    testUtil.runCycles( 10000000 )
+
+    testUtil.writeUsFifo( PUTSCOM_TESTDATA )
+    testUtil.writeEot( )
+    testUtil.readDsFifo( PUTSCOM_EXPDATA )
+    testUtil.readEot( )
+
+    testUtil.writeUsFifo( PUTSCOMUMASK_TESTDATA )
+    testUtil.writeEot( )
+    testUtil.readDsFifo( PUTSCOMUMASK_EXPDATA )
+    testUtil.readEot( )
+
+    testUtil.writeUsFifo( GETSCOMUMASK_TESTDATA )
+    testUtil.writeEot( )
+    testUtil.readDsFifo( GETSCOMUMASK_EXPDATA )
+    testUtil.readEot( )
+
+#-------------------------------------------------
+# Calling all test code
+#-------------------------------------------------
+main()
+
+if err:
+    print ("\nTest Suite completed with error(s)")
+    #sys.exit(1)
+else:
+    print ("\nTest Suite completed with no errors")
+    #sys.exit(0);
+
diff --git a/sbe/test/testScom.xml b/sbe/test/testScom.xml
index 2e4bf051..133a2a14 100755
--- a/sbe/test/testScom.xml
+++ b/sbe/test/testScom.xml
@@ -4,3 +4,12 @@
           <simcmd>run-python-file targets/p9_nimbus/sbeTest/testPutGetScom.py</simcmd>
           <exitonerror>yes</exitonerror>
       </testcase>
+      <testcase>
+          <simcmd>run-python-file targets/p9_nimbus/sbeTest/testPutScomUnderMask.py</simcmd>
+          <exitonerror>yes</exitonerror>
+      </testcase>
+      <testcase>
+          <simcmd>run-python-file targets/p9_nimbus/sbeTest/testModifyScom.py</simcmd>
+          <exitonerror>yes</exitonerror>
+      </testcase>
+