Level 2 HWP for p9_sbe_nest_startclocks,p9_sbe_startclock_chiplets

Included PG updates

Change-Id: I585327520c96c19c5fe856abc8b307d0fa2a4757
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22100
Tested-by: Jenkins Server
Tested-by: PPE CI
Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com>
Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com>
Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22101
Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>

5 files changed, 713 insertions, 385 deletions

diff --git a/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.C b/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.C
index 6fd5f0ec..f2917668 100644
--- a/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.C
+++ b/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.C
@@ -21,7 +21,7 @@
 ///
 /// @brief Modules for scan 0 and array init
 //------------------------------------------------------------------------------
-// *HWP HW Owner        : Anusha Reddy Rangareddygari <anusrang@in.ibm.com>
+// *HWP HW Owner        : Abhishek Agarwal <abagarw8@in.ibm.com>
 // *HWP HW Backup Owner : Srinivas V Naga <srinivan@in.ibm.com>
 // *HWP FW Owner        : sunil kumar <skumar8j@in.ibm.com>
 // *HWP Team            : Perv
@@ -33,9 +33,9 @@
 //## auto_generated
 #include "p9_perv_sbe_cmn.H"
 
-#include "p9_perv_scom_addresses.H"
-#include "p9_perv_scom_addresses_fld.H"
-#include "p9_const_common.H"
+#include <p9_perv_scom_addresses.H>
+#include <p9_perv_scom_addresses_fld.H>
+#include <p9_const_common.H>
 
 
 enum P9_PERV_SBE_CMN_Private_Constants
@@ -43,8 +43,8 @@ enum P9_PERV_SBE_CMN_Private_Constants
     P9_OPCG_DONE_SCAN0_POLL_COUNT = 1500, // No. of times OPCG read to check OPCG_DONE
     P9_OPCG_DONE_SCAN0_HW_NS_DELAY = 100000, // unit is nano seconds
     P9_OPCG_DONE_SCAN0_SIM_CYCLE_DELAY = 100000, // unit is cycles
-    P9_OPCG_DONE_ARRAYINIT_POLL_COUNT = 1500, // No. of times OPCG read to check OPCG_DONE
     P9_OPCG_DONE_ARRAYINIT_HW_NS_DELAY = 100000, // unit is nano seconds
+    P9_OPCG_DONE_ARRAYINIT_POLL_COUNT = 1500, // No. of times OPCG read to check OPCG_DONE
     P9_OPCG_DONE_ARRAYINIT_SIM_CYCLE_DELAY = 280000 // unit is cycles
 };
 
@@ -91,16 +91,16 @@ fapi2::ReturnCode p9_perv_sbe_cmn_array_init_module(const
     fapi2::buffer<uint64_t> l_data64;
     int l_timeout = 0;
     fapi2::buffer<uint64_t> l_data64_clk_region;
-    FAPI_DBG("Entering ...");
+    FAPI_INF("Entering ...");
 
-    FAPI_INF("Drop vital fence (moved to arrayinit from scan0 module)");
+    FAPI_DBG("Drop vital fence (moved to arrayinit from sacn0 module)");
     //Setting CPLT_CTRL1 register value
     l_data64.flush<0>();
     //CPLT_CTRL1.TC_VITL_REGION_FENCE = 0
     l_data64.setBit<PERV_1_CPLT_CTRL1_TC_VITL_REGION_FENCE>();
     FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_CPLT_CTRL1_CLEAR, l_data64));
 
-    FAPI_INF("Start pervasive region Clocks");
+    FAPI_DBG("Start pervasive regions Clocks");
     l_data64_clk_region.flush<0>();
     //Setting CLK_REGION register value
     l_data64_clk_region.insertFromRight<PERV_1_CLK_REGION_CLOCK_CMD, PERV_1_CLK_REGION_CLOCK_CMD_LEN>
@@ -115,17 +115,17 @@ fapi2::ReturnCode p9_perv_sbe_cmn_array_init_module(const
     FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_CLK_REGION,
                             l_data64_clk_region));
 
-    FAPI_INF("Mask all LFIR's in Chiplet Global FIR");
+    FAPI_DBG("Mask all LFIR's in Chiplet Global FIR");
     //Setting FIR_MASK register value
     //FIR_MASK = 0xFFFFFFFFFFFFFFFF
     FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_FIR_MASK, 0xFFFFFFFFFFFFFFFF));
 
-    FAPI_INF("Mask Special Attention");
+    FAPI_DBG("Mask Special Attention");
     //Setting SPA_MASK register value
     //SPA_MASK = 0xFFFFFFFFFFFFFFFF
     FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_SPA_MASK, 0xFFFFFFFFFFFFFFFF));
 
-    FAPI_INF("Stop Pervasive region clocks");
+    FAPI_DBG("Stop Pervasive regions clocks");
     l_data64_clk_region.flush<0>();
     //Setting CLK_REGION register value
     l_data64_clk_region.insertFromRight<PERV_1_CLK_REGION_CLOCK_CMD, PERV_1_CLK_REGION_CLOCK_CMD_LEN>
@@ -140,14 +140,14 @@ fapi2::ReturnCode p9_perv_sbe_cmn_array_init_module(const
     FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_CLK_REGION,
                             l_data64_clk_region));
 
-    FAPI_INF("Setup ABISTMUX_SEL");
+    FAPI_DBG("Setup ABISTMUX_SEL");
     //Setting CPLT_CTRL0 register value
     l_data64.flush<0>();
     //CPLT_CTRL0.CTRL_CC_ABSTCLK_MUXSEL_DC = 1
     l_data64.setBit<PERV_1_CPLT_CTRL0_CTRL_CC_ABSTCLK_MUXSEL_DC>();
     FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_CPLT_CTRL0_OR, l_data64));
 
-    FAPI_INF("setup ABIST modes , BIST REGIONS:%#018lX", i_regions);
+    FAPI_DBG("setup ABIST modes , BIST REGIONS:%#018lX", i_regions);
     //Setting BIST register value
     FAPI_TRY(fapi2::getScom(i_target_chiplets, PERV_BIST, l_data64));
     l_data64.clearBit<0>();  //BIST.TC_BIST_START_TEST_DC = 0
@@ -178,9 +178,9 @@ fapi2::ReturnCode p9_perv_sbe_cmn_array_init_module(const
     //BIST.BIST_UNIT10 = i_regions.getBit<15>()
     l_data64.writeBit<14>(i_regions.getBit<15>());
     FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_BIST, l_data64));
-    FAPI_INF("l_data64 value:%#018lX", l_data64);
+    FAPI_DBG("l_data64 value:%#018lX", l_data64);
 
-    FAPI_INF("Setup all Clock Domains and Clock Types");
+    FAPI_DBG("Setup all Clock Domains and Clock Types");
     //Setting CLK_REGION register value
     FAPI_TRY(fapi2::getScom(i_target_chiplets, PERV_CLK_REGION,
                             l_data64_clk_region));
@@ -215,7 +215,7 @@ fapi2::ReturnCode p9_perv_sbe_cmn_array_init_module(const
     FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_CLK_REGION,
                             l_data64_clk_region));
 
-    FAPI_INF("Drop Region fences");
+    FAPI_DBG("Drop Region fences");
     //Setting CPLT_CTRL1 register value
     l_data64.flush<0>();
     l_data64.writeBit<PERV_1_CPLT_CTRL1_TC_PERV_REGION_FENCE>
@@ -242,7 +242,7 @@ fapi2::ReturnCode p9_perv_sbe_cmn_array_init_module(const
     l_data64.writeBit<PERV_1_CPLT_CTRL1_UNUSED_14B>(i_regions.getBit<15>());
     FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_CPLT_CTRL1_CLEAR, l_data64));
 
-    FAPI_INF("Setup: loopcount , OPCG engine start ABIST, run-N mode");
+    FAPI_DBG("Setup: loopcount , OPCG engine start ABIST, run-N mode");
     //Setting OPCG_REG0 register value
     FAPI_TRY(fapi2::getScom(i_target_chiplets, PERV_OPCG_REG0, l_data64));
     l_data64.setBit<PERV_1_OPCG_REG0_RUNN_MODE>();  //OPCG_REG0.RUNN_MODE = 1
@@ -255,7 +255,7 @@ fapi2::ReturnCode p9_perv_sbe_cmn_array_init_module(const
     i_start_abist_match_value.extractToRight<12, 12>(l_misr_a_value);
     i_start_abist_match_value.extractToRight<24, 12>(l_misr_b_value);
 
-    FAPI_INF("Setup IDLE count");
+    FAPI_DBG("Setup IDLE count");
     //Setting OPCG_REG1 register value
     FAPI_TRY(fapi2::getScom(i_target_chiplets, PERV_OPCG_REG1, l_data64));
     l_data64.insertFromRight<PERV_1_OPCG_REG1_SCAN_COUNT, PERV_1_OPCG_REG1_SCAN_COUNT_LEN>
@@ -266,13 +266,13 @@ fapi2::ReturnCode p9_perv_sbe_cmn_array_init_module(const
     (l_misr_b_value);  //OPCG_REG1.MISR_B_VAL = l_misr_b_value
     FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_OPCG_REG1, l_data64));
 
-    FAPI_INF("opcg go");
+    FAPI_DBG("opcg go");
     //Setting OPCG_REG0 register value
     FAPI_TRY(fapi2::getScom(i_target_chiplets, PERV_OPCG_REG0, l_data64));
     l_data64.setBit<1>();  //OPCG_REG0.OPCG_GO = 1
     FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_OPCG_REG0, l_data64));
 
-    FAPI_INF("Poll OPCG done bit to check for run-N completeness");
+    FAPI_DBG("Poll OPCG done bit to check for run-N completeness");
     l_timeout = P9_OPCG_DONE_ARRAYINIT_POLL_COUNT;
 
     //UNTIL CPLT_STAT0.CC_CTRL_OPCG_DONE_DC == 1
@@ -288,11 +288,12 @@ fapi2::ReturnCode p9_perv_sbe_cmn_array_init_module(const
             break;
         }
 
-        fapi2::delay(P9_OPCG_DONE_ARRAYINIT_HW_NS_DELAY, P9_OPCG_DONE_ARRAYINIT_SIM_CYCLE_DELAY);
+        fapi2::delay(P9_OPCG_DONE_ARRAYINIT_HW_NS_DELAY,
+                     P9_OPCG_DONE_ARRAYINIT_SIM_CYCLE_DELAY);
         --l_timeout;
     }
 
-    FAPI_INF("Loop Count :%d", l_timeout);
+    FAPI_DBG("Loop Count :%d", l_timeout);
 
     FAPI_ASSERT(l_timeout > 0,
                 fapi2::SBE_ARRAYINIT_POLL_THRESHOLD_ERR(),
@@ -300,7 +301,7 @@ fapi2::ReturnCode p9_perv_sbe_cmn_array_init_module(const
 
     //oaim_poll_done
     {
-        FAPI_INF("OPCG done, clear Run-N mode");
+        FAPI_DBG("OPCG done, clear Run-N mode");
         //Setting OPCG_REG0 register value
         FAPI_TRY(fapi2::getScom(i_target_chiplets, PERV_OPCG_REG0, l_data64));
         l_data64.clearBit<PERV_1_OPCG_REG0_RUNN_MODE>();  //OPCG_REG0.RUNN_MODE = 0
@@ -308,27 +309,118 @@ fapi2::ReturnCode p9_perv_sbe_cmn_array_init_module(const
         l_data64.clearBit<PERV_1_OPCG_REG0_LOOP_COUNT, PERV_1_OPCG_REG0_LOOP_COUNT_LEN>();  //OPCG_REG0.LOOP_COUNT = 0
         FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_OPCG_REG0, l_data64));
 
-        FAPI_INF("clear all clock REGIONS and type");
+        FAPI_DBG("clear all clock REGIONS and type");
         //Setting CLK_REGION register value
         //CLK_REGION = 0
         l_data64_clk_region = 0;  //using variable to keep register data
         FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_CLK_REGION,
                                 l_data64_clk_region));
 
-        FAPI_INF("clear ABISTCLK_MUXSEL");
+        FAPI_DBG("clear ABISTCLK_MUXSEL");
         //Setting CPLT_CTRL0 register value
         l_data64.flush<0>();
         //CPLT_CTRL0.CTRL_CC_ABSTCLK_MUXSEL_DC = 0
         l_data64.setBit<PERV_1_CPLT_CTRL0_CTRL_CC_ABSTCLK_MUXSEL_DC>();
         FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_CPLT_CTRL0_CLEAR, l_data64));
 
-        FAPI_INF("clear BIST REGISTER");
+        FAPI_DBG("clear BIST REGISTER");
         //Setting BIST register value
         //BIST = 0
         FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_BIST, 0));
     }
 
-    FAPI_DBG("Exiting ...");
+    FAPI_INF("Exiting ...");
+
+fapi_try_exit:
+    return fapi2::current_err;
+
+}
+
+/// @brief Region value settings
+///
+/// @param[in]     i_target_chiplet   Reference to TARGET_TYPE_PERV target
+/// @param[in]     i_regions_value    regions except vital and pll
+/// @param[out]    o_regions_value    regions value
+/// @return  FAPI2_RC_SUCCESS if success, else error code.
+fapi2::ReturnCode p9_perv_sbe_cmn_regions_setup_16(const
+        fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet,
+        const fapi2::buffer<uint16_t> i_regions_value,
+        fapi2::buffer<uint16_t>& o_regions_value)
+{
+    fapi2::buffer<uint32_t> l_read_attr = 0;
+    fapi2::buffer<uint32_t> l_read_attr_invert = 0;
+    fapi2::buffer<uint32_t> l_read_attr_shift1_right = 0;
+    FAPI_INF("Entering ...");
+
+    FAPI_DBG("Reading ATTR_PG");
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_chiplet, l_read_attr));
+    FAPI_DBG("ATTR_PG Value : %#018lX", l_read_attr);
+
+    FAPI_DBG("i_regions_value input from calling function: %#018lX",
+             i_regions_value);
+
+    if ( l_read_attr == 0x0 )
+    {
+        o_regions_value = i_regions_value;
+    }
+    else
+    {
+        l_read_attr_invert = l_read_attr.invert();
+        FAPI_DBG("ATTR_PG inverted: %#018lX", l_read_attr_invert);
+        l_read_attr_shift1_right = (l_read_attr_invert >> 1);
+        FAPI_DBG("ATTR_PG inverted and shifted right by 1 %#018lX",
+                 l_read_attr_shift1_right);
+
+        o_regions_value = (i_regions_value & l_read_attr_shift1_right);
+    }
+
+    FAPI_INF("Exiting ...");
+
+fapi_try_exit:
+    return fapi2::current_err;
+
+}
+
+/// @brief Region value settings
+///
+/// @param[in]     i_target_chiplet   Reference to TARGET_TYPE_PERV target
+/// @param[in]     i_regions_value    regions except vital and pll
+/// @param[out]    o_regions_value    Regions value
+/// @return  FAPI2_RC_SUCCESS if success, else error code.
+fapi2::ReturnCode p9_perv_sbe_cmn_regions_setup_64(const
+        fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet,
+        const fapi2::buffer<uint16_t> i_regions_value,
+        fapi2::buffer<uint64_t>& o_regions_value)
+{
+    fapi2::buffer<uint32_t> l_read_attr = 0;
+    fapi2::buffer<uint32_t> l_read_attr_invert = 0;
+    fapi2::buffer<uint32_t> l_read_attr_shift1_right = 0;
+    fapi2::buffer<uint64_t> l_temp = 0;
+    FAPI_INF("Entering ...");
+
+    FAPI_DBG("Reading ATTR_PG");
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_chiplet, l_read_attr));
+    FAPI_DBG("ATTR_PG Value : %#018lX", l_read_attr);
+
+    FAPI_DBG("i_regions_value input from calling function: %#018lX",
+             i_regions_value);
+
+    if ( l_read_attr == 0x0 )
+    {
+        o_regions_value = (i_regions_value | l_temp);
+    }
+    else
+    {
+        l_read_attr_invert = l_read_attr.invert();
+        FAPI_DBG("ATTR_PG inverted: %#018lX", l_read_attr_invert);
+        l_read_attr_shift1_right = (l_read_attr_invert >> 1);
+        FAPI_DBG("ATTR_PG inverted and shifted right by 1 %#018lX",
+                 l_read_attr_shift1_right);
+
+        o_regions_value = (i_regions_value & l_read_attr_shift1_right);
+    }
+
+    FAPI_INF("Exiting ...");
 
 fapi_try_exit:
     return fapi2::current_err;
@@ -358,16 +450,16 @@ fapi2::ReturnCode p9_perv_sbe_cmn_scan0_module(const
 {
     fapi2::buffer<uint64_t> l_data64;
     int l_timeout = 0;
-    FAPI_DBG("Entering ...");
+    FAPI_INF("Entering ...");
 
-    FAPI_INF("raise Vital clock region fence");
+    FAPI_DBG("raise Vital clock region fence");
     //Setting CPLT_CTRL1 register value
     l_data64.flush<0>();
     //CPLT_CTRL1.TC_VITL_REGION_FENCE = 1
     l_data64.setBit<PERV_1_CPLT_CTRL1_TC_VITL_REGION_FENCE>();
     FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_CPLT_CTRL1_OR, l_data64));
 
-    FAPI_INF("Raise region fences for scanned regions");
+    FAPI_DBG("Raise region fences for scanned regions");
     //Setting CPLT_CTRL1 register value
     l_data64.flush<0>();
     //CPLT_CTRL1.TC_PERV_REGION_FENCE = 1
@@ -385,7 +477,7 @@ fapi2::ReturnCode p9_perv_sbe_cmn_scan0_module(const
     l_data64.setBit<PERV_1_CPLT_CTRL1_UNUSED_14B>();  //CPLT_CTRL1.UNUSED_14B = 1
     FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_CPLT_CTRL1_OR, l_data64));
 
-    FAPI_INF("Setup all Clock Domains and Clock Types");
+    FAPI_DBG("Setup all Clock Domains and Clock Types");
     //Setting CLK_REGION register value
     FAPI_TRY(fapi2::getScom(i_target_chiplets, PERV_CLK_REGION, l_data64));
     //CLK_REGION.CLOCK_REGION_PERV = i_regions.getBit<5>()
@@ -418,7 +510,7 @@ fapi2::ReturnCode p9_perv_sbe_cmn_scan0_module(const
     l_data64.setBit<PERV_1_CLK_REGION_SEL_THOLD_ARY>();
     FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_CLK_REGION, l_data64));
 
-    FAPI_INF("Write scan select register");
+    FAPI_DBG("Write scan select register");
     //Setting SCAN_REGION_TYPE register value
     l_data64.flush<0>();  //SCAN_REGION_TYPE = 0
     //SCAN_REGION_TYPE.SCAN_REGION_PERV = i_regions.getBit<5>()
@@ -469,19 +561,19 @@ fapi2::ReturnCode p9_perv_sbe_cmn_scan0_module(const
     l_data64.writeBit<59>(i_scan_types.getBit<15>());
     FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_SCAN_REGION_TYPE, l_data64));
 
-    FAPI_INF("set OPCG_REG0 register bit 0='0'");
+    FAPI_DBG("set OPCG_REG0 register bit 0='0'");
     //Setting OPCG_REG0 register value
     FAPI_TRY(fapi2::getScom(i_target_chiplets, PERV_OPCG_REG0, l_data64));
     l_data64.clearBit<PERV_1_OPCG_REG0_RUNN_MODE>();  //OPCG_REG0.RUNN_MODE = 0
     FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_OPCG_REG0, l_data64));
 
-    FAPI_INF("trigger Scan0");
+    FAPI_DBG("trigger Scan0");
     //Setting OPCG_REG0 register value
     FAPI_TRY(fapi2::getScom(i_target_chiplets, PERV_OPCG_REG0, l_data64));
     l_data64.setBit<PERV_1_OPCG_REG0_RUN_SCAN0>();  //OPCG_REG0.RUN_SCAN0 = 1
     FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_OPCG_REG0, l_data64));
 
-    FAPI_INF("Poll OPCG done bit to check for run-N completeness");
+    FAPI_DBG("Poll OPCG done bit to check for run-N completeness");
     l_timeout = P9_OPCG_DONE_SCAN0_POLL_COUNT;
 
     //UNTIL CPLT_STAT0.CC_CTRL_OPCG_DONE_DC == 1
@@ -497,11 +589,12 @@ fapi2::ReturnCode p9_perv_sbe_cmn_scan0_module(const
             break;
         }
 
-        fapi2::delay(P9_OPCG_DONE_SCAN0_HW_NS_DELAY, P9_OPCG_DONE_SCAN0_SIM_CYCLE_DELAY);
+        fapi2::delay(P9_OPCG_DONE_SCAN0_HW_NS_DELAY,
+                     P9_OPCG_DONE_SCAN0_SIM_CYCLE_DELAY);
         --l_timeout;
     }
 
-    FAPI_INF("Loop Count :%d", l_timeout);
+    FAPI_DBG("Loop Count :%d", l_timeout);
 
     FAPI_ASSERT(l_timeout > 0,
                 fapi2::SBE_SCAN0_DONE_POLL_THRESHOLD_ERR(),
@@ -509,18 +602,18 @@ fapi2::ReturnCode p9_perv_sbe_cmn_scan0_module(const
 
     //os0m_poll_done
     {
-        FAPI_INF("clear all clock REGIONS and type");
+        FAPI_DBG("clear all clock REGIONS and type");
         //Setting CLK_REGION register value
         //CLK_REGION = 0
         FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_CLK_REGION, 0));
 
-        FAPI_INF("Clear Scan Select Register");
+        FAPI_DBG("Clear Scan Select Register");
         //Setting SCAN_REGION_TYPE register value
         //SCAN_REGION_TYPE = 0
         FAPI_TRY(fapi2::putScom(i_target_chiplets, PERV_SCAN_REGION_TYPE, 0));
     }
 
-    FAPI_DBG("Exiting ...");
+    FAPI_INF("Exiting ...");
 
 fapi_try_exit:
     return fapi2::current_err;
diff --git a/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.H b/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.H
index c4d79030..32027b4a 100644
--- a/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.H
+++ b/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.H
@@ -7,7 +7,7 @@
 /*                                                                        */
 /* EKB Project                                                            */
 /*                                                                        */
-/* COPYRIGHT 2015                                                         */
+/* COPYRIGHT 2015,2016                                                    */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -45,6 +45,16 @@ fapi2::ReturnCode p9_perv_sbe_cmn_array_init_module(const
         const bool i_select_edram,
         const fapi2::buffer<uint64_t> i_start_abist_match_value);
 
+fapi2::ReturnCode p9_perv_sbe_cmn_regions_setup_16(const
+        fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet,
+        const fapi2::buffer<uint16_t> i_regions_value,
+        fapi2::buffer<uint16_t>& o_regions_value);
+
+fapi2::ReturnCode p9_perv_sbe_cmn_regions_setup_64(const
+        fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet,
+        const fapi2::buffer<uint16_t> i_regions_value,
+        fapi2::buffer<uint64_t>& o_regions_value);
+
 fapi2::ReturnCode p9_perv_sbe_cmn_scan0_module(const
         fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplets,
         const fapi2::buffer<uint16_t> i_regions,
diff --git a/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C b/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C
index 57c2358d..69701d66 100644
--- a/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C
+++ b/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C
@@ -7,7 +7,7 @@
 /*                                                                        */
 /* EKB Project                                                            */
 /*                                                                        */
-/* COPYRIGHT 2015                                                         */
+/* COPYRIGHT 2015,2016                                                    */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -32,12 +32,11 @@
 
 //## auto_generated
 #include "p9_sbe_nest_startclocks.H"
-#include "p9_const_common.H"
-#include "p9_misc_scom_addresses_fld.H"
-#include "p9_perv_scom_addresses.H"
-#include "p9_perv_scom_addresses_fld.H"
-#include "p9_quad_scom_addresses_fld.H"
-#include "p9_sbe_common.H"
+
+#include <p9_perv_scom_addresses.H>
+#include <p9_perv_scom_addresses_fld.H>
+#include <p9_perv_sbe_cmn.H>
+#include <p9_sbe_common.H>
 
 
 enum P9_SBE_NEST_STARTCLOCKS_Private_Constants
@@ -51,6 +50,10 @@ enum P9_SBE_NEST_STARTCLOCKS_Private_Constants
     DONT_STARTSLAVE = 0x0
 };
 
+static fapi2::ReturnCode p9_sbe_nest_startclocks_N3_fence_drop(
+    const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chip,
+    const fapi2::buffer<uint64_t> i_pg_vector);
+
 static fapi2::ReturnCode p9_sbe_nest_startclocks_check_cc_status_function(
     const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target,
     const fapi2::buffer<uint8_t> i_clock_cmd,
@@ -66,324 +69,265 @@ static fapi2::ReturnCode p9_sbe_nest_startclocks_cplt_ctrl_action_function(
 static fapi2::ReturnCode p9_sbe_nest_startclocks_flushmode(
     const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet);
 
+static fapi2::ReturnCode p9_sbe_nest_startclocks_get_pg_vector(
+    const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chip,
+    fapi2::buffer<uint64_t>& o_pg_vector);
+
+static fapi2::ReturnCode p9_sbe_nest_startclocks_mc_fence_drop(
+    const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chip,
+    const fapi2::buffer<uint64_t> i_pg_vector);
+
+static fapi2::ReturnCode p9_sbe_nest_startclocks_nest_fence_drop(
+    const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chip,
+    const fapi2::buffer<uint64_t> i_pg_vector);
+
 fapi2::ReturnCode p9_sbe_nest_startclocks(const
         fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip)
 {
     uint8_t l_read_attr = 0;
-    auto l_perv_functional_vector =
+    fapi2::buffer<uint64_t> l_pg_vector;
+    fapi2::buffer<uint64_t> l_clock_regions;
+    fapi2::buffer<uint64_t> l_n3_clock_regions;
+    fapi2::buffer<uint16_t> l_ccstatus_regions;
+    fapi2::buffer<uint16_t> l_n3_ccstatus_regions;
+    fapi2::Target<fapi2::TARGET_TYPE_PERV> l_n3chiplet =
         i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
-        (fapi2::TARGET_STATE_FUNCTIONAL);
-    FAPI_DBG("Entering ...");
+        (fapi2::TARGET_FILTER_NEST_WEST, fapi2::TARGET_STATE_FUNCTIONAL)[0];
+    FAPI_INF("Entering ...");
 
-    FAPI_INF("Switch MC meshs to Nest mesh");
+    for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
+         (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_NEST |
+                                           fapi2::TARGET_FILTER_TP), fapi2::TARGET_STATE_FUNCTIONAL))
+    {
+        FAPI_TRY(p9_sbe_nest_startclocks_get_pg_vector(l_target_cplt, l_pg_vector));
+        FAPI_DBG("pg targets vector: %#018lX", l_pg_vector);
+    }
+
+    FAPI_DBG("Regions setup : N3 start clock");
+    FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(l_n3chiplet,
+             REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_n3_clock_regions));
+    FAPI_DBG("Regions value: %#018lX", l_n3_clock_regions);
+
+    FAPI_DBG("Region setup : N3 check cc status");
+    FAPI_TRY(p9_perv_sbe_cmn_regions_setup_16(l_n3chiplet,
+             REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_n3_ccstatus_regions));
+    FAPI_DBG("Regions value: %#018lX", l_n3_ccstatus_regions);
+
+    FAPI_DBG("Switch MC meshs to Nest mesh");
     FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MC_SYNC_MODE, i_target_chip, l_read_attr));
 
     if ( l_read_attr )
     {
-        for (auto l_trgt_chplt : l_perv_functional_vector)
+        for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
+             (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC |
+                                               fapi2::TARGET_FILTER_ALL_NEST), fapi2::TARGET_STATE_FUNCTIONAL))
         {
-            uint8_t l_attr_chip_unit_pos = 0; //actual value is read in FAPI_ATTR_GET below
-            FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_trgt_chplt,
-                                   l_attr_chip_unit_pos));
-
-            if (!((l_attr_chip_unit_pos == 0x07
-                   || l_attr_chip_unit_pos == 0x08/* McChiplet */) ||
-                  (l_attr_chip_unit_pos == 0x02 || l_attr_chip_unit_pos == 0x03
-                   || l_attr_chip_unit_pos == 0x04
-                   || l_attr_chip_unit_pos == 0x05/* NestChiplet */)))
-            {
-                continue;
-            }
-
-            FAPI_INF("Call p9_sbe_nest_startclocks_cplt_ctrl_action_function for Nest and Mc chiplets");
+            FAPI_DBG("Call p9_sbe_nest_startclocks_cplt_ctrl_action_function for Nest and Mc chiplets");
             FAPI_TRY(p9_sbe_nest_startclocks_cplt_ctrl_action_function(l_trgt_chplt));
         }
 
-        for (auto l_trgt_chplt : l_perv_functional_vector)
+        for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
+             (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC |
+                                               fapi2::TARGET_FILTER_ALL_NEST | fapi2::TARGET_FILTER_TP),
+              fapi2::TARGET_STATE_FUNCTIONAL))
         {
-            uint8_t l_attr_chip_unit_pos = 0; //actual value is read in FAPI_ATTR_GET below
-            FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_trgt_chplt,
-                                   l_attr_chip_unit_pos));
-
-            if (!((l_attr_chip_unit_pos == 0x07
-                   || l_attr_chip_unit_pos == 0x08/* McChiplet */) ||
-                  (l_attr_chip_unit_pos == 0x02 || l_attr_chip_unit_pos == 0x03
-                   || l_attr_chip_unit_pos == 0x04
-                   || l_attr_chip_unit_pos == 0x05/* NestChiplet */) ||
-                  (l_attr_chip_unit_pos == 0x01/* TPChiplet */)))
-            {
-                continue;
-            }
-
-            FAPI_INF("Call module align chiplets for Nest and Mc chiplets");
+            FAPI_DBG("Call module align chiplets for Nest and Mc chiplets");
             FAPI_TRY(p9_sbe_common_align_chiplets(l_trgt_chplt));
         }
 
-        for (auto l_trgt_chplt : l_perv_functional_vector)
+        for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
+             (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_NEST_NORTH |
+                                               fapi2::TARGET_FILTER_NEST_SOUTH | fapi2::TARGET_FILTER_NEST_EAST),
+              fapi2::TARGET_STATE_FUNCTIONAL))
         {
-            uint8_t l_attr_chip_unit_pos = 0; //actual value is read in FAPI_ATTR_GET below
-            FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_trgt_chplt,
-                                   l_attr_chip_unit_pos));
-
-            if (!((l_attr_chip_unit_pos == 0x02/* N0Chiplet */) ||
-                  (l_attr_chip_unit_pos == 0x03/* N1Chiplet */) ||
-                  (l_attr_chip_unit_pos == 0x04/* N2Chiplet */)))
-            {
-                continue;
-            }
-
-            FAPI_INF("Call module clock start stop for N0, N1, N2");
+            FAPI_DBG("Regions value: %#018lX", l_clock_regions);
+            FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(l_trgt_chplt,
+                     REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_clock_regions));
+
+            FAPI_DBG("Call module clock start stop for N0, N1, N2");
             FAPI_TRY(p9_sbe_common_clock_start_stop(l_trgt_chplt, CLOCK_CMD, STARTSLAVE,
-                                                    DONT_STARTMASTER, REGIONS_ALL_EXCEPT_VITAL_NESTPLL, CLOCK_TYPES));
+                                                    DONT_STARTMASTER, l_clock_regions, CLOCK_TYPES));
         }
 
-        FAPI_INF("Call module clock start stop for N3");
+        FAPI_DBG("Call module clock start stop for N3");
+        FAPI_TRY(p9_sbe_common_clock_start_stop(l_n3chiplet, CLOCK_CMD, DONT_STARTSLAVE,
+                                                STARTMASTER, l_n3_clock_regions, CLOCK_TYPES));
 
-        // Get the N3Chiplet target
-        for (auto it : l_perv_functional_vector)
+        for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
+             (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_NEST_NORTH |
+                                               fapi2::TARGET_FILTER_NEST_SOUTH | fapi2::TARGET_FILTER_NEST_EAST),
+              fapi2::TARGET_STATE_FUNCTIONAL))
         {
-            uint8_t l_attr_chip_unit_pos = 0; //actual value is read in FAPI_ATTR_GET below
-            FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, it, l_attr_chip_unit_pos));
-
-            if ((l_attr_chip_unit_pos == 0x05))/* N3Chiplet */
-            {
-                FAPI_TRY(p9_sbe_common_clock_start_stop(it, CLOCK_CMD, DONT_STARTSLAVE,
-                                                        STARTMASTER, REGIONS_ALL_EXCEPT_VITAL_NESTPLL, CLOCK_TYPES));
-                break;
-            }
-        }
+            FAPI_TRY(p9_perv_sbe_cmn_regions_setup_16(l_trgt_chplt,
+                     REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_ccstatus_regions));
+            FAPI_DBG("Regions value: %#018lX", l_ccstatus_regions);
 
-        for (auto l_trgt_chplt : l_perv_functional_vector)
-        {
-            uint8_t l_attr_chip_unit_pos = 0; //actual value is read in FAPI_ATTR_GET below
-            FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_trgt_chplt,
-                                   l_attr_chip_unit_pos));
-
-            if (!((l_attr_chip_unit_pos == 0x02/* N0Chiplet */) ||
-                  (l_attr_chip_unit_pos == 0x03/* N1Chiplet */) ||
-                  (l_attr_chip_unit_pos == 0x04/* N2Chiplet */)))
-            {
-                continue;
-            }
-
-            FAPI_INF("Call clockstatus check function for N0,N1,N2");
+            FAPI_DBG("Call clockstatus check function for N0,N1,N2");
             FAPI_TRY(p9_sbe_nest_startclocks_check_cc_status_function(l_trgt_chplt,
-                     CLOCK_CMD, REGIONS_ALL_EXCEPT_VITAL_NESTPLL, CLOCK_TYPES));
+                     CLOCK_CMD, l_ccstatus_regions, CLOCK_TYPES));
         }
 
-        FAPI_INF("Call clockstatus check function for N3");
+        FAPI_DBG("Call clockstatus check function for N3");
+        FAPI_TRY(p9_sbe_nest_startclocks_check_cc_status_function(l_n3chiplet,
+                 CLOCK_CMD, l_n3_ccstatus_regions, CLOCK_TYPES));
 
-        // Get the N3Chiplet target
-        for (auto it : l_perv_functional_vector)
+        for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
+             (fapi2::TARGET_FILTER_ALL_MC, fapi2::TARGET_STATE_FUNCTIONAL))
         {
-            uint8_t l_attr_chip_unit_pos = 0; //actual value is read in FAPI_ATTR_GET below
-            FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, it, l_attr_chip_unit_pos));
-
-            if ((l_attr_chip_unit_pos == 0x05))/* N3Chiplet */
-            {
-                FAPI_TRY(p9_sbe_nest_startclocks_check_cc_status_function(it, CLOCK_CMD,
-                         REGIONS_ALL_EXCEPT_VITAL_NESTPLL, CLOCK_TYPES));
-                break;
-            }
+            FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(l_trgt_chplt,
+                     REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_clock_regions));
+            FAPI_DBG("Regions value: %#018lX", l_clock_regions);
+
+            FAPI_DBG("Call module clock start stop for MC01, MC23.");
+            FAPI_TRY(p9_sbe_common_clock_start_stop(l_trgt_chplt, CLOCK_CMD,
+                                                    DONT_STARTSLAVE, DONT_STARTMASTER, l_clock_regions, CLOCK_TYPES));
         }
 
-        for (auto l_trgt_chplt : l_perv_functional_vector)
-        {
-            uint8_t l_attr_chip_unit_pos = 0; //actual value is read in FAPI_ATTR_GET below
-            FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_trgt_chplt,
-                                   l_attr_chip_unit_pos));
+        FAPI_DBG("Drop chiplet fence for N3");
+        FAPI_TRY(p9_sbe_nest_startclocks_N3_fence_drop(l_n3chiplet, l_pg_vector));
 
-            if (!(l_attr_chip_unit_pos == 0x07
-                  || l_attr_chip_unit_pos == 0x08))/* McChiplet */
-            {
-                continue;
-            }
+        for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
+             (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_NEST_NORTH |
+                                               fapi2::TARGET_FILTER_NEST_SOUTH | fapi2::TARGET_FILTER_NEST_EAST),
+              fapi2::TARGET_STATE_FUNCTIONAL))
+        {
+            FAPI_DBG("Drop chiplet fence for N0,N1,N2");
+            FAPI_TRY(p9_sbe_nest_startclocks_nest_fence_drop(l_trgt_chplt, l_pg_vector));
+        }
 
-            FAPI_INF("Call module clock start stop for MC01, MC23.");
-            FAPI_TRY(p9_sbe_common_clock_start_stop(l_trgt_chplt, CLOCK_CMD,
-                                                    DONT_STARTSLAVE, DONT_STARTMASTER, REGIONS_ALL_EXCEPT_VITAL_NESTPLL,
-                                                    CLOCK_TYPES));
+        for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
+             (fapi2::TARGET_FILTER_ALL_MC, fapi2::TARGET_STATE_FUNCTIONAL))
+        {
+            FAPI_DBG("Drop chiplet fence for MC");
+            FAPI_TRY(p9_sbe_nest_startclocks_mc_fence_drop(l_trgt_chplt, l_pg_vector));
         }
 
-        for (auto l_trgt_chplt : l_perv_functional_vector)
+        for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
+             (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC |
+                                               fapi2::TARGET_FILTER_ALL_NEST), fapi2::TARGET_STATE_FUNCTIONAL))
         {
-            uint8_t l_attr_chip_unit_pos = 0; //actual value is read in FAPI_ATTR_GET below
-            FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_trgt_chplt,
-                                   l_attr_chip_unit_pos));
-
-            if (!((l_attr_chip_unit_pos == 0x07
-                   || l_attr_chip_unit_pos == 0x08/* McChiplet */) ||
-                  (l_attr_chip_unit_pos == 0x02 || l_attr_chip_unit_pos == 0x03
-                   || l_attr_chip_unit_pos == 0x04
-                   || l_attr_chip_unit_pos == 0x05/* NestChiplet */)))
-            {
-                continue;
-            }
-
-            FAPI_INF("Call sbe_nest_startclocks_check_checkstop_function for Nest and Mc chiplets ");
+            FAPI_DBG("Call sbe_nest_startclocks_check_checkstop_function for Nest and Mc chiplets ");
             FAPI_TRY(p9_sbe_nest_startclocks_check_checkstop_function(l_trgt_chplt));
         }
 
-        for (auto l_trgt_chplt : l_perv_functional_vector)
+        for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
+             (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC |
+                                               fapi2::TARGET_FILTER_ALL_NEST | fapi2::TARGET_FILTER_TP),
+              fapi2::TARGET_STATE_FUNCTIONAL))
         {
-            uint8_t l_attr_chip_unit_pos = 0; //actual value is read in FAPI_ATTR_GET below
-            FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_trgt_chplt,
-                                   l_attr_chip_unit_pos));
-
-            if (!((l_attr_chip_unit_pos == 0x07
-                   || l_attr_chip_unit_pos == 0x08/* McChiplet */) ||
-                  (l_attr_chip_unit_pos == 0x02 || l_attr_chip_unit_pos == 0x03
-                   || l_attr_chip_unit_pos == 0x04
-                   || l_attr_chip_unit_pos == 0x05/* NestChiplet */) ||
-                  (l_attr_chip_unit_pos == 0x01/* TPChiplet */)))
-            {
-                continue;
-            }
-
             FAPI_TRY(p9_sbe_nest_startclocks_flushmode(l_trgt_chplt));
         }
     }
     else
     {
-        for (auto l_trgt_chplt : l_perv_functional_vector)
+        for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
+             (fapi2::TARGET_FILTER_ALL_NEST, fapi2::TARGET_STATE_FUNCTIONAL))
         {
-            uint8_t l_attr_chip_unit_pos = 0; //actual value is read in FAPI_ATTR_GET below
-            FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_trgt_chplt,
-                                   l_attr_chip_unit_pos));
-
-            if (!(l_attr_chip_unit_pos == 0x02 || l_attr_chip_unit_pos == 0x03
-                  || l_attr_chip_unit_pos == 0x04
-                  || l_attr_chip_unit_pos == 0x05))/* NestChiplet */
-            {
-                continue;
-            }
-
-            FAPI_INF("Call p9_sbe_nest_startclocks_cplt_ctrl_action_function for nest chiplets");
+            FAPI_DBG("Call p9_sbe_nest_startclocks_cplt_ctrl_action_function for nest chiplets");
             FAPI_TRY(p9_sbe_nest_startclocks_cplt_ctrl_action_function(l_trgt_chplt));
         }
 
-        for (auto l_trgt_chplt : l_perv_functional_vector)
+        for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
+             (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_NEST |
+                                               fapi2::TARGET_FILTER_TP), fapi2::TARGET_STATE_FUNCTIONAL))
         {
-            uint8_t l_attr_chip_unit_pos = 0; //actual value is read in FAPI_ATTR_GET below
-            FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_trgt_chplt,
-                                   l_attr_chip_unit_pos));
-
-            if (!((l_attr_chip_unit_pos == 0x02 || l_attr_chip_unit_pos == 0x03
-                   || l_attr_chip_unit_pos == 0x04
-                   || l_attr_chip_unit_pos == 0x05/* NestChiplet */) ||
-                  (l_attr_chip_unit_pos == 0x01/* TPChiplet */)))
-            {
-                continue;
-            }
-
-            FAPI_INF("call module align chiplets for nest chiplets");
+            FAPI_DBG("call module align chiplets for nest chiplets");
             FAPI_TRY(p9_sbe_common_align_chiplets(l_trgt_chplt));
         }
 
-        for (auto l_trgt_chplt : l_perv_functional_vector)
+        for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
+             (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_NEST_NORTH |
+                                               fapi2::TARGET_FILTER_NEST_SOUTH | fapi2::TARGET_FILTER_NEST_EAST),
+              fapi2::TARGET_STATE_FUNCTIONAL))
         {
-            uint8_t l_attr_chip_unit_pos = 0; //actual value is read in FAPI_ATTR_GET below
-            FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_trgt_chplt,
-                                   l_attr_chip_unit_pos));
-
-            if (!((l_attr_chip_unit_pos == 0x02/* N0Chiplet */) ||
-                  (l_attr_chip_unit_pos == 0x03/* N1Chiplet */) ||
-                  (l_attr_chip_unit_pos == 0x04/* N2Chiplet */)))
-            {
-                continue;
-            }
-
-            FAPI_INF("Call module clock start stop for N0, N1, N2");
+            FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(l_trgt_chplt,
+                     REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_clock_regions));
+            FAPI_DBG("Regions value: %#018lX", l_clock_regions);
+
+            FAPI_DBG("Call module clock start stop for N0, N1, N2");
             FAPI_TRY(p9_sbe_common_clock_start_stop(l_trgt_chplt, CLOCK_CMD, STARTSLAVE,
-                                                    DONT_STARTMASTER, REGIONS_ALL_EXCEPT_VITAL_NESTPLL, CLOCK_TYPES));
+                                                    DONT_STARTMASTER, l_clock_regions, CLOCK_TYPES));
         }
 
-        FAPI_INF("Call module clock start stop for N3");
+        FAPI_DBG("Call module clock start stop for N3");
+        FAPI_TRY(p9_sbe_common_clock_start_stop(l_n3chiplet, CLOCK_CMD, DONT_STARTSLAVE,
+                                                STARTMASTER, l_n3_clock_regions, CLOCK_TYPES));
 
-        // Get the N3Chiplet target
-        for (auto it : l_perv_functional_vector)
+        for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
+             (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_NEST_NORTH |
+                                               fapi2::TARGET_FILTER_NEST_SOUTH | fapi2::TARGET_FILTER_NEST_EAST),
+              fapi2::TARGET_STATE_FUNCTIONAL))
         {
-            uint8_t l_attr_chip_unit_pos = 0; //actual value is read in FAPI_ATTR_GET below
-            FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, it, l_attr_chip_unit_pos));
-
-            if ((l_attr_chip_unit_pos == 0x05))/* N3Chiplet */
-            {
-                FAPI_TRY(p9_sbe_common_clock_start_stop(it, CLOCK_CMD, DONT_STARTSLAVE,
-                                                        STARTMASTER, REGIONS_ALL_EXCEPT_VITAL_NESTPLL, CLOCK_TYPES));
-                break;
-            }
-        }
+            FAPI_DBG("region setup : n0,n1,n2");
+            FAPI_TRY(p9_perv_sbe_cmn_regions_setup_16(l_trgt_chplt,
+                     REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_ccstatus_regions));
+            FAPI_DBG("Regions value: %#018lX", l_ccstatus_regions);
 
-        for (auto l_trgt_chplt : l_perv_functional_vector)
-        {
-            uint8_t l_attr_chip_unit_pos = 0; //actual value is read in FAPI_ATTR_GET below
-            FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_trgt_chplt,
-                                   l_attr_chip_unit_pos));
-
-            if (!((l_attr_chip_unit_pos == 0x02/* N0Chiplet */) ||
-                  (l_attr_chip_unit_pos == 0x03/* N1Chiplet */) ||
-                  (l_attr_chip_unit_pos == 0x04/* N2Chiplet */)))
-            {
-                continue;
-            }
-
-            FAPI_INF("Call clockstatus check function for N0,N1,N2");
+            FAPI_DBG("Call clockstatus check function for N0,N1,N2");
             FAPI_TRY(p9_sbe_nest_startclocks_check_cc_status_function(l_trgt_chplt,
-                     CLOCK_CMD, REGIONS_ALL_EXCEPT_VITAL_NESTPLL, CLOCK_TYPES));
+                     CLOCK_CMD, l_ccstatus_regions, CLOCK_TYPES));
         }
 
-        FAPI_INF("Call clockstatus check function for N3");
+        FAPI_DBG("Call clockstatus check function for N3");
+        FAPI_TRY(p9_sbe_nest_startclocks_check_cc_status_function(l_n3chiplet,
+                 CLOCK_CMD, l_n3_ccstatus_regions, CLOCK_TYPES));
+
+        FAPI_DBG("Drop chiplet fence for N3");
+        FAPI_TRY(p9_sbe_nest_startclocks_N3_fence_drop(l_n3chiplet, l_pg_vector));
 
-        // Get the N3Chiplet target
-        for (auto it : l_perv_functional_vector)
+        for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
+             (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_NEST_NORTH |
+                                               fapi2::TARGET_FILTER_NEST_SOUTH | fapi2::TARGET_FILTER_NEST_EAST),
+              fapi2::TARGET_STATE_FUNCTIONAL))
         {
-            uint8_t l_attr_chip_unit_pos = 0; //actual value is read in FAPI_ATTR_GET below
-            FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, it, l_attr_chip_unit_pos));
-
-            if ((l_attr_chip_unit_pos == 0x05))/* N3Chiplet */
-            {
-                FAPI_TRY(p9_sbe_nest_startclocks_check_cc_status_function(it, CLOCK_CMD,
-                         REGIONS_ALL_EXCEPT_VITAL_NESTPLL, CLOCK_TYPES));
-                break;
-            }
+            FAPI_DBG("Drop chiplet fence for N0,N1,N2");
+            FAPI_TRY(p9_sbe_nest_startclocks_nest_fence_drop(l_trgt_chplt, l_pg_vector));
         }
 
-        for (auto l_trgt_chplt : l_perv_functional_vector)
+        for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
+             (fapi2::TARGET_FILTER_ALL_NEST, fapi2::TARGET_STATE_FUNCTIONAL))
         {
-            uint8_t l_attr_chip_unit_pos = 0; //actual value is read in FAPI_ATTR_GET below
-            FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_trgt_chplt,
-                                   l_attr_chip_unit_pos));
-
-            if (!(l_attr_chip_unit_pos == 0x02 || l_attr_chip_unit_pos == 0x03
-                  || l_attr_chip_unit_pos == 0x04
-                  || l_attr_chip_unit_pos == 0x05))/* NestChiplet */
-            {
-                continue;
-            }
-
-            FAPI_INF("call sbe_nest_startclocks_check_checkstop_function for nest chiplets");
+            FAPI_DBG("call sbe_nest_startclocks_check_checkstop_function for nest chiplets");
             FAPI_TRY(p9_sbe_nest_startclocks_check_checkstop_function(l_trgt_chplt));
         }
 
-        for (auto l_trgt_chplt : l_perv_functional_vector)
+        for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
+             (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_NEST |
+                                               fapi2::TARGET_FILTER_TP), fapi2::TARGET_STATE_FUNCTIONAL))
         {
-            uint8_t l_attr_chip_unit_pos = 0; //actual value is read in FAPI_ATTR_GET below
-            FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_trgt_chplt,
-                                   l_attr_chip_unit_pos));
-
-            if (!((l_attr_chip_unit_pos == 0x02 || l_attr_chip_unit_pos == 0x03
-                   || l_attr_chip_unit_pos == 0x04
-                   || l_attr_chip_unit_pos == 0x05/* NestChiplet */) ||
-                  (l_attr_chip_unit_pos == 0x01/* TPChiplet */)))
-            {
-                continue;
-            }
-
             FAPI_TRY(p9_sbe_nest_startclocks_flushmode(l_trgt_chplt));
         }
     }
 
-    FAPI_DBG("Exiting ...");
+    FAPI_INF("Exiting ...");
+
+fapi_try_exit:
+    return fapi2::current_err;
+
+}
+
+/// @brief Drop chiplet fence for OB chiplet
+///
+/// @param[in]     i_target_chip   Reference to TARGET_TYPE_PERV target
+/// @param[in]     i_pg_vector     Pg vector of targets
+/// @return  FAPI2_RC_SUCCESS if success, else error code.
+static fapi2::ReturnCode p9_sbe_nest_startclocks_N3_fence_drop(
+    const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chip,
+    const fapi2::buffer<uint64_t> i_pg_vector)
+{
+    fapi2::buffer<uint64_t> l_data64;
+    FAPI_INF("Entering ...");
+
+    if ( i_pg_vector.getBit<0>() == 1 )
+    {
+        FAPI_DBG("Drop chiplet fence");
+        //Setting NET_CTRL0 register value
+        l_data64.flush<1>();
+        l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>();  //NET_CTRL0.FENCE_EN = 0
+        FAPI_TRY(fapi2::putScom(i_target_chip, PERV_NET_CTRL0_WAND, l_data64));
+    }
+
+    FAPI_INF("Exiting ...");
 
 fapi_try_exit:
     return fapi2::current_err;
@@ -413,7 +357,7 @@ static fapi2::ReturnCode p9_sbe_nest_startclocks_check_cc_status_function(
     fapi2::buffer<uint16_t> l_nsl_clkregion_status;
     fapi2::buffer<uint16_t> l_ary_clkregion_status;
     fapi2::buffer<uint16_t> l_regions;
-    FAPI_DBG("Entering ...");
+    FAPI_INF("Entering ...");
 
     l_reg_sl = i_clock_types.getBit<5>();
     l_reg_nsl = i_clock_types.getBit<6>();
@@ -422,15 +366,15 @@ static fapi2::ReturnCode p9_sbe_nest_startclocks_check_cc_status_function(
 
     if ( l_reg_sl )
     {
-        FAPI_INF("Check for Clocks running SL");
+        FAPI_DBG("Check for Clocks running SL");
         //Getting CLOCK_STAT_SL register value
         FAPI_TRY(fapi2::getScom(i_target, PERV_CLOCK_STAT_SL,
                                 l_sl_clock_status)); //l_sl_clock_status = CLOCK_STAT_SL
-        FAPI_INF("SL Clock status register is %#018lX", l_sl_clock_status);
+        FAPI_DBG("SL Clock status register is %#018lX", l_sl_clock_status);
 
         if ( i_clock_cmd == 0b01 )
         {
-            FAPI_INF("Checking for clock start command");
+            FAPI_DBG("Checking for clock start command");
             l_sl_clkregion_status.flush<1>();
             l_sl_clock_status.extractToRight<4, 11>(l_sl_clkregion_status);
             l_sl_clkregion_status.invert();
@@ -444,7 +388,7 @@ static fapi2::ReturnCode p9_sbe_nest_startclocks_check_cc_status_function(
 
         if ( i_clock_cmd == 0b10 )
         {
-            FAPI_INF("Checking for clock stop command");
+            FAPI_DBG("Checking for clock stop command");
             l_sl_clkregion_status.flush<0>();
             l_sl_clock_status.extractToRight<4, 11>(l_sl_clkregion_status);
             l_sl_clkregion_status &= l_regions;
@@ -458,15 +402,15 @@ static fapi2::ReturnCode p9_sbe_nest_startclocks_check_cc_status_function(
 
     if ( l_reg_nsl )
     {
-        FAPI_INF("Check for clocks running NSL");
+        FAPI_DBG("Check for clocks running NSL");
         //Getting CLOCK_STAT_NSL register value
         FAPI_TRY(fapi2::getScom(i_target, PERV_CLOCK_STAT_NSL,
                                 l_nsl_clock_status)); //l_nsl_clock_status = CLOCK_STAT_NSL
-        FAPI_INF("NSL Clock status register is %#018lX", l_nsl_clock_status);
+        FAPI_DBG("NSL Clock status register is %#018lX", l_nsl_clock_status);
 
         if ( i_clock_cmd == 0b01 )
         {
-            FAPI_INF("Checking for clock start command");
+            FAPI_DBG("Checking for clock start command");
             l_nsl_clkregion_status.flush<1>();
             l_nsl_clock_status.extractToRight<4, 11>(l_nsl_clkregion_status);
             l_nsl_clkregion_status.invert();
@@ -480,7 +424,7 @@ static fapi2::ReturnCode p9_sbe_nest_startclocks_check_cc_status_function(
 
         if ( i_clock_cmd == 0b10 )
         {
-            FAPI_INF("Checking for clock stop command");
+            FAPI_DBG("Checking for clock stop command");
             l_nsl_clkregion_status.flush<0>();
             l_nsl_clock_status.extractToRight<4, 11>(l_nsl_clkregion_status);
             l_nsl_clkregion_status &= l_regions;
@@ -494,15 +438,15 @@ static fapi2::ReturnCode p9_sbe_nest_startclocks_check_cc_status_function(
 
     if ( l_reg_ary )
     {
-        FAPI_INF("Check for clocks running ARY");
+        FAPI_DBG("Check for clocks running ARY");
         //Getting CLOCK_STAT_ARY register value
         FAPI_TRY(fapi2::getScom(i_target, PERV_CLOCK_STAT_ARY,
                                 l_ary_clock_status)); //l_ary_clock_status = CLOCK_STAT_ARY
-        FAPI_INF("ARY Clock status register is %#018lX", l_ary_clock_status);
+        FAPI_DBG("ARY Clock status register is %#018lX", l_ary_clock_status);
 
         if ( i_clock_cmd == 0b01 )
         {
-            FAPI_INF("Checking for clock start command");
+            FAPI_DBG("Checking for clock start command");
             l_ary_clkregion_status.flush<1>();
             l_ary_clock_status.extractToRight<4, 11>(l_ary_clkregion_status);
             l_ary_clkregion_status.invert();
@@ -516,7 +460,7 @@ static fapi2::ReturnCode p9_sbe_nest_startclocks_check_cc_status_function(
 
         if ( i_clock_cmd == 0b10 )
         {
-            FAPI_INF("Checking for clock stop command");
+            FAPI_DBG("Checking for clock stop command");
             l_ary_clkregion_status.flush<0>();
             l_ary_clock_status.extractToRight<4, 11>(l_ary_clkregion_status);
             l_ary_clkregion_status &= l_regions;
@@ -528,7 +472,7 @@ static fapi2::ReturnCode p9_sbe_nest_startclocks_check_cc_status_function(
         }
     }
 
-    FAPI_DBG("Exiting ...");
+    FAPI_INF("Exiting ...");
 
 fapi_try_exit:
     return fapi2::current_err;
@@ -545,16 +489,9 @@ static fapi2::ReturnCode p9_sbe_nest_startclocks_check_checkstop_function(
     const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet)
 {
     fapi2::buffer<uint64_t> l_read_reg;
-    fapi2::buffer<uint64_t> l_data64;
-    FAPI_DBG("Entering ...");
+    FAPI_INF("Entering ...");
 
-    FAPI_INF("Drop chiplet fence");
-    //Setting NET_CTRL0 register value
-    l_data64.flush<1>();
-    l_data64.clearBit<PEC_STACK0_NET_CTRL0_FENCE_EN>();  //NET_CTRL0.FENCE_EN = 0
-    FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_NET_CTRL0_WAND, l_data64));
-
-    FAPI_INF("Check checkstop register");
+    FAPI_DBG("Check checkstop register");
     //Getting XFIR register value
     FAPI_TRY(fapi2::getScom(i_target_chiplet, PERV_XFIR,
                             l_read_reg)); //l_read_reg = XFIR
@@ -564,7 +501,7 @@ static fapi2::ReturnCode p9_sbe_nest_startclocks_check_checkstop_function(
                 .set_READ_ALL_CHECKSTOP(l_read_reg),
                 "ERROR: COMBINE ALL CHECKSTOP ERROR");
 
-    FAPI_DBG("Exiting ...");
+    FAPI_INF("Exiting ...");
 
 fapi_try_exit:
     return fapi2::current_err;
@@ -580,7 +517,7 @@ static fapi2::ReturnCode p9_sbe_nest_startclocks_cplt_ctrl_action_function(
     const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet)
 {
     fapi2::buffer<uint64_t> l_data64;
-    FAPI_DBG("Entering ...");
+    FAPI_INF("Entering ...");
 
     // Local variable and constant definition
     fapi2::buffer <uint32_t> l_attr_pg;
@@ -589,45 +526,43 @@ static fapi2::ReturnCode p9_sbe_nest_startclocks_cplt_ctrl_action_function(
 
     l_attr_pg.invert();
 
-    FAPI_INF("Drop partial good fences");
+    FAPI_DBG("Drop partial good fences");
     //Setting CPLT_CTRL1 register value
     l_data64.flush<0>();
-    //CPLT_CTRL1.TC_VITL_REGION_FENCE = l_attr_pg.getBit<19>()
-    l_data64.writeBit<PEC_CPLT_CTRL1_TC_VITL_REGION_FENCE>(l_attr_pg.getBit<19>());
-    //CPLT_CTRL1.TC_PERV_REGION_FENCE = l_attr_pg.getBit<20>()
-    l_data64.writeBit<PEC_CPLT_CTRL1_TC_PERV_REGION_FENCE>(l_attr_pg.getBit<20>());
+    l_data64.writeBit<PERV_1_CPLT_CTRL1_TC_VITL_REGION_FENCE>
+    (l_attr_pg.getBit<19>());  //CPLT_CTRL1.TC_VITL_REGION_FENCE = l_attr_pg.getBit<19>()
+    l_data64.writeBit<PERV_1_CPLT_CTRL1_TC_PERV_REGION_FENCE>
+    (l_attr_pg.getBit<20>());  //CPLT_CTRL1.TC_PERV_REGION_FENCE = l_attr_pg.getBit<20>()
     //CPLT_CTRL1.TC_REGION1_FENCE = l_attr_pg.getBit<21>()
-    l_data64.writeBit<PEC_CPLT_CTRL1_TC_REGION1_FENCE>(l_attr_pg.getBit<21>());
+    l_data64.writeBit<5>(l_attr_pg.getBit<21>());
     //CPLT_CTRL1.TC_REGION2_FENCE = l_attr_pg.getBit<22>()
-    l_data64.writeBit<PEC_CPLT_CTRL1_TC_REGION2_FENCE>(l_attr_pg.getBit<22>());
+    l_data64.writeBit<6>(l_attr_pg.getBit<22>());
     //CPLT_CTRL1.TC_REGION3_FENCE = l_attr_pg.getBit<23>()
     l_data64.writeBit<PERV_1_CPLT_CTRL1_TC_REGION3_FENCE>(l_attr_pg.getBit<23>());
     //CPLT_CTRL1.TC_REGION4_FENCE = l_attr_pg.getBit<24>()
-    l_data64.writeBit<EQ_CPLT_CTRL1_TC_REGION4_FENCE>(l_attr_pg.getBit<24>());
+    l_data64.writeBit<8>(l_attr_pg.getBit<24>());
     //CPLT_CTRL1.TC_REGION5_FENCE = l_attr_pg.getBit<25>()
-    l_data64.writeBit<EQ_CPLT_CTRL1_TC_REGION5_FENCE>(l_attr_pg.getBit<25>());
+    l_data64.writeBit<9>(l_attr_pg.getBit<25>());
     //CPLT_CTRL1.TC_REGION6_FENCE = l_attr_pg.getBit<26>()
-    l_data64.writeBit<EQ_CPLT_CTRL1_TC_REGION6_FENCE>(l_attr_pg.getBit<26>());
+    l_data64.writeBit<10>(l_attr_pg.getBit<26>());
     //CPLT_CTRL1.TC_REGION7_FENCE = l_attr_pg.getBit<27>()
-    l_data64.writeBit<EQ_CPLT_CTRL1_TC_REGION7_FENCE>(l_attr_pg.getBit<27>());
+    l_data64.writeBit<11>(l_attr_pg.getBit<27>());
     //CPLT_CTRL1.UNUSED_12B = l_attr_pg.getBit<28>()
-    l_data64.writeBit<PEC_CPLT_CTRL1_UNUSED_12B>(l_attr_pg.getBit<28>());
+    l_data64.writeBit<PERV_1_CPLT_CTRL1_UNUSED_12B>(l_attr_pg.getBit<28>());
     //CPLT_CTRL1.UNUSED_13B = l_attr_pg.getBit<29>()
-    l_data64.writeBit<PEC_CPLT_CTRL1_UNUSED_13B>(l_attr_pg.getBit<29>());
+    l_data64.writeBit<PERV_1_CPLT_CTRL1_UNUSED_13B>(l_attr_pg.getBit<29>());
     //CPLT_CTRL1.UNUSED_14B = l_attr_pg.getBit<30>()
-    l_data64.writeBit<PEC_CPLT_CTRL1_UNUSED_14B>(l_attr_pg.getBit<30>());
+    l_data64.writeBit<PERV_1_CPLT_CTRL1_UNUSED_14B>(l_attr_pg.getBit<30>());
     FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_CPLT_CTRL1_CLEAR, l_data64));
 
-    FAPI_INF("reset abistclk_muxsel and syncclk_muxsel");
+    FAPI_DBG("reset abistclk_muxsel and syncclk_muxsel");
     //Setting CPLT_CTRL0 register value
     l_data64.flush<0>();
-    //CPLT_CTRL0.CTRL_CC_ABSTCLK_MUXSEL_DC = 1
-    l_data64.writeBit<PEC_CPLT_CTRL0_CTRL_CC_ABSTCLK_MUXSEL_DC>(1);
-    //CPLT_CTRL0.TC_UNIT_SYNCCLK_MUXSEL_DC = 1
-    l_data64.writeBit<PEC_CPLT_CTRL0_TC_UNIT_SYNCCLK_MUXSEL_DC>(1);
+    //implicit CPLT_CTRL0.CTRL_CC_ABSTCLK_MUXSEL_DC = 0
+    //implicit CPLT_CTRL0.TC_UNIT_SYNCCLK_MUXSEL_DC = 0
     FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_CPLT_CTRL0_CLEAR, l_data64));
 
-    FAPI_DBG("Exiting ...");
+    FAPI_INF("Exiting ...");
 
 fapi_try_exit:
     return fapi2::current_err;
@@ -642,16 +577,138 @@ static fapi2::ReturnCode p9_sbe_nest_startclocks_flushmode(
     const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet)
 {
     fapi2::buffer<uint64_t> l_data64;
-    FAPI_DBG("Entering ...");
+    FAPI_INF("Entering ...");
 
-    FAPI_INF("Clear flush_inhibit to go in to flush mode");
+    FAPI_DBG("Clear flush_inhibit to go in to flush mode");
     //Setting CPLT_CTRL0 register value
     l_data64.flush<0>();
     //CPLT_CTRL0.CTRL_CC_FLUSHMODE_INH_DC = 0
-    l_data64.setBit<PEC_CPLT_CTRL0_CTRL_CC_FLUSHMODE_INH_DC>();
+    l_data64.setBit<PERV_1_CPLT_CTRL0_CTRL_CC_FLUSHMODE_INH_DC>();
     FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_CPLT_CTRL0_CLEAR, l_data64));
 
-    FAPI_DBG("Exiting ...");
+    FAPI_INF("Exiting ...");
+
+fapi_try_exit:
+    return fapi2::current_err;
+
+}
+
+/// @brief get children for all chiplets : Perv, Nest, XB, MC, OB, PCIe
+///
+/// @param[in]     i_target_chip   Reference to TARGET_TYPE_PERV target
+/// @param[out]    o_pg_vector     vector of targets
+/// @return  FAPI2_RC_SUCCESS if success, else error code.
+static fapi2::ReturnCode p9_sbe_nest_startclocks_get_pg_vector(
+    const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chip,
+    fapi2::buffer<uint64_t>& o_pg_vector)
+{
+    fapi2::buffer<uint8_t> l_read_attrunitpos;
+    FAPI_INF("Entering ...");
+
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, i_target_chip,
+                           l_read_attrunitpos));
+
+    if (    l_read_attrunitpos == 0x01 )
+    {
+        o_pg_vector.setBit<0>();
+    }
+
+    if ( l_read_attrunitpos == 0x02 )
+    {
+        o_pg_vector.setBit<1>();
+    }
+
+    if (    l_read_attrunitpos == 0x03 )
+    {
+        o_pg_vector.setBit<2>();
+    }
+
+    if (    l_read_attrunitpos == 0x04 )
+    {
+        o_pg_vector.setBit<3>();
+    }
+
+    if (    l_read_attrunitpos == 0x05 )
+    {
+        o_pg_vector.setBit<4>();
+    }
+
+    FAPI_INF("Exiting ...");
+
+fapi_try_exit:
+    return fapi2::current_err;
+
+}
+
+/// @brief Drop chiplet fence for MC
+///
+/// @param[in]     i_target_chip   Reference to TARGET_TYPE_PERV target
+/// @param[in]     i_pg_vector     Pg vector of targets
+/// @return  FAPI2_RC_SUCCESS if success, else error code.
+static fapi2::ReturnCode p9_sbe_nest_startclocks_mc_fence_drop(
+    const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chip,
+    const fapi2::buffer<uint64_t> i_pg_vector)
+{
+    uint8_t l_read_attrunitpos = 0;
+    fapi2::buffer<uint64_t> l_data64;
+    FAPI_INF("Entering ...");
+
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, i_target_chip,
+                           l_read_attrunitpos));
+
+    if ( l_read_attrunitpos == 0x07 )
+    {
+        if ( i_pg_vector.getBit<4>() == 1 )
+        {
+            FAPI_DBG("Drop chiplet fence");
+            //Setting NET_CTRL0 register value
+            l_data64.flush<1>();
+            l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>();  //NET_CTRL0.FENCE_EN = 0
+            FAPI_TRY(fapi2::putScom(i_target_chip, PERV_NET_CTRL0_WAND, l_data64));
+        }
+    }
+
+    if ( l_read_attrunitpos == 0x08 )
+    {
+        if ( i_pg_vector.getBit<2>() == 1 )
+        {
+            FAPI_DBG("Drop chiplet fence");
+            //Setting NET_CTRL0 register value
+            l_data64.flush<1>();
+            l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>();  //NET_CTRL0.FENCE_EN = 0
+            FAPI_TRY(fapi2::putScom(i_target_chip, PERV_NET_CTRL0_WAND, l_data64));
+        }
+    }
+
+    FAPI_INF("Exiting ...");
+
+fapi_try_exit:
+    return fapi2::current_err;
+
+}
+
+/// @brief Drop chiplet fence for pcie chiplet
+///
+/// @param[in]     i_target_chip   Reference to TARGET_TYPE_PERV target
+/// @param[in]     i_pg_vector     Pg vector of targets
+/// @return  FAPI2_RC_SUCCESS if success, else error code.
+static fapi2::ReturnCode p9_sbe_nest_startclocks_nest_fence_drop(
+    const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chip,
+    const fapi2::buffer<uint64_t> i_pg_vector)
+{
+    fapi2::buffer<uint64_t> l_data64;
+    FAPI_INF("Entering ...");
+
+    if ( i_pg_vector.getBit<4>() == 1 )
+    {
+        FAPI_DBG("Drop chiplet fence");
+        //Setting NET_CTRL0 register value
+        l_data64.flush<1>();
+        l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>();  //NET_CTRL0.FENCE_EN = 0
+        FAPI_TRY(fapi2::putScom(i_target_chip, PERV_NET_CTRL0_WAND, l_data64));
+    }
+
+    FAPI_INF("Exiting ...");
 
 fapi_try_exit:
     return fapi2::current_err;
diff --git a/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.H b/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.H
index 2f3c0f1c..cfc8b533 100644
--- a/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.H
+++ b/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.H
@@ -7,7 +7,7 @@
 /*                                                                        */
 /* EKB Project                                                            */
 /*                                                                        */
-/* COPYRIGHT 2015                                                         */
+/* COPYRIGHT 2015,2016                                                    */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
diff --git a/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C b/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C
index d708ecb4..0abf50c1 100644
--- a/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C
+++ b/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C
@@ -33,9 +33,10 @@
 //## auto_generated
 #include "p9_sbe_startclock_chiplets.H"
 
-#include "p9_perv_scom_addresses.H"
-#include "p9_perv_scom_addresses_fld.H"
-#include "p9_sbe_common.H"
+#include <p9_perv_scom_addresses.H>
+#include <p9_perv_scom_addresses_fld.H>
+#include <p9_perv_sbe_cmn.H>
+#include <p9_sbe_common.H>
 
 
 enum P9_SBE_STARTCLOCK_CHIPLETS_Private_Constants
@@ -53,52 +54,94 @@ static fapi2::ReturnCode p9_sbe_startclock_chiplets_check_checkstop_function(
 static fapi2::ReturnCode p9_sbe_startclock_chiplets_cplt_ctrl_action_function(
     const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet);
 
+static fapi2::ReturnCode p9_sbe_startclock_chiplets_get_pg_vector(
+    const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chip,
+    fapi2::buffer<uint64_t>& o_pg_vector);
+
+static fapi2::ReturnCode p9_sbe_startclock_chiplets_ob_fence_drop(
+    const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chip,
+    const fapi2::buffer<uint64_t> i_pg_vector);
+
+static fapi2::ReturnCode p9_sbe_startclock_chiplets_pci_fence_drop(
+    const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chip,
+    const fapi2::buffer<uint64_t> i_pg_vector);
+
 static fapi2::ReturnCode p9_sbe_startclock_chiplets_sync_config(
     const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet);
 
+static fapi2::ReturnCode p9_sbe_startclock_chiplets_xb_fence_drop(
+    const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chip,
+    const fapi2::buffer<uint64_t> i_pg_vector);
+
 fapi2::ReturnCode p9_sbe_startclock_chiplets(const
         fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chiplets)
 {
-    auto l_perv_functional_vector =
-        i_target_chiplets.getChildren<fapi2::TARGET_TYPE_PERV>
-        (fapi2::TARGET_STATE_FUNCTIONAL);
-    FAPI_DBG("Entering ...");
+    fapi2::buffer<uint64_t> l_pg_vector;
+    fapi2::buffer<uint64_t> l_regions;
+    FAPI_INF("Entering ...");
+
+    for (auto l_target_cplt :
+         i_target_chiplets.getChildren<fapi2::TARGET_TYPE_PERV>
+         (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_NEST |
+                                           fapi2::TARGET_FILTER_TP), fapi2::TARGET_STATE_FUNCTIONAL))
+    {
+        FAPI_TRY(p9_sbe_startclock_chiplets_get_pg_vector(l_target_cplt, l_pg_vector));
+        FAPI_DBG("partial good targets vector: %#018lX", l_pg_vector);
+    }
 
-    for (auto l_trgt_chplt : l_perv_functional_vector)
+    for (auto l_trgt_chplt : i_target_chiplets.getChildren<fapi2::TARGET_TYPE_PERV>
+         (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_OBUS |
+                                           fapi2::TARGET_FILTER_ALL_PCI | fapi2::TARGET_FILTER_XBUS),
+          fapi2::TARGET_STATE_FUNCTIONAL))
     {
-        uint8_t l_attr_chip_unit_pos = 0; //actual value is read in FAPI_ATTR_GET below
-        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_trgt_chplt,
-                               l_attr_chip_unit_pos));
-
-        if (!((l_attr_chip_unit_pos == 0x09 || l_attr_chip_unit_pos == 0x0A
-               || l_attr_chip_unit_pos == 0x0B
-               || l_attr_chip_unit_pos == 0x0C/* ObusChiplet */) ||
-              (l_attr_chip_unit_pos == 0x0D || l_attr_chip_unit_pos == 0x0E
-               || l_attr_chip_unit_pos == 0x0F/* PcieChiplet */) ||
-              (l_attr_chip_unit_pos == 0x06/* XbusChiplet */)))
-        {
-            continue;
-        }
-
-        FAPI_INF("Call p9_sbe_startclock_chiplets_cplt_ctrl_action_function for xbus, obus, pcie chiplets");
+        FAPI_DBG("Call p9_sbe_startclock_chiplets_cplt_ctrl_action_function for xbus, obus, pcie chiplets");
         FAPI_TRY(p9_sbe_startclock_chiplets_cplt_ctrl_action_function(l_trgt_chplt));
 
-        FAPI_INF("Disable listen to sync for all non-master/slave chiplets");
+        FAPI_DBG("Disable listen to sync for all non-master/slave chiplets");
         FAPI_TRY(p9_sbe_startclock_chiplets_sync_config(l_trgt_chplt));
 
-        FAPI_INF("call module align chiplets for xbus, obus, pcie chiplets");
+        FAPI_DBG("call module align chiplets for xbus, obus, pcie chiplets");
         FAPI_TRY(p9_sbe_common_align_chiplets(l_trgt_chplt));
 
-        FAPI_INF("Call module clock start stop for xbus, obus, pcie chiplets");
+        FAPI_DBG("Region setup ");
+        FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(l_trgt_chplt,
+                 REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_regions));
+        FAPI_DBG("Regions value: %#018lX", l_regions);
+
+        FAPI_DBG("Call module clock start stop for xbus, obus, pcie chiplets");
         FAPI_TRY(p9_sbe_common_clock_start_stop(l_trgt_chplt, CLOCK_CMD,
-                                                DONT_STARTSLAVE, DONT_STARTMASTER, REGIONS_ALL_EXCEPT_VITAL_NESTPLL,
-                                                CLOCK_TYPES));
+                                                DONT_STARTSLAVE, DONT_STARTMASTER, l_regions, CLOCK_TYPES));
+    }
+
+    FAPI_DBG("Drop chiplet fence for Xbus");
+    FAPI_TRY(p9_sbe_startclock_chiplets_xb_fence_drop(
+                 i_target_chiplets.getChildren<fapi2::TARGET_TYPE_PERV>
+                 (fapi2::TARGET_FILTER_XBUS, fapi2::TARGET_STATE_FUNCTIONAL)[0], l_pg_vector));
+
+    for (auto l_trgt_chplt : i_target_chiplets.getChildren<fapi2::TARGET_TYPE_PERV>
+         (fapi2::TARGET_FILTER_ALL_OBUS, fapi2::TARGET_STATE_FUNCTIONAL))
+    {
+        FAPI_DBG("Drop Chiplet fence for Obus");
+        FAPI_TRY(p9_sbe_startclock_chiplets_ob_fence_drop(l_trgt_chplt, l_pg_vector));
+    }
+
+    for (auto l_trgt_chplt : i_target_chiplets.getChildren<fapi2::TARGET_TYPE_PERV>
+         (fapi2::TARGET_FILTER_ALL_PCI, fapi2::TARGET_STATE_FUNCTIONAL))
+    {
+        FAPI_DBG("Drop chiplet fence for PCIe");
+        FAPI_TRY(p9_sbe_startclock_chiplets_pci_fence_drop(l_trgt_chplt, l_pg_vector));
+    }
 
-        FAPI_INF("call sbe_startclock_chiplets_check_checkstop_function for xbus, obus, pcie chiplets");
+    for (auto l_trgt_chplt : i_target_chiplets.getChildren<fapi2::TARGET_TYPE_PERV>
+         (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_OBUS |
+                                           fapi2::TARGET_FILTER_ALL_PCI | fapi2::TARGET_FILTER_XBUS),
+          fapi2::TARGET_STATE_FUNCTIONAL))
+    {
+        FAPI_DBG("call sbe_startclock_chiplets_check_checkstop_function for xbus, obus, pcie chiplets");
         FAPI_TRY(p9_sbe_startclock_chiplets_check_checkstop_function(l_trgt_chplt));
     }
 
-    FAPI_DBG("Exiting ...");
+    FAPI_INF("Exiting ...");
 
 fapi_try_exit:
     return fapi2::current_err;
@@ -116,15 +159,9 @@ static fapi2::ReturnCode p9_sbe_startclock_chiplets_check_checkstop_function(
 {
     fapi2::buffer<uint64_t> l_read_reg;
     fapi2::buffer<uint64_t> l_data64;
-    FAPI_DBG("Entering ...");
-
-    FAPI_INF("Drop chiplet fence");
-    //Setting NET_CTRL0 register value
-    l_data64.flush<1>();
-    l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>();  //NET_CTRL0.FENCE_EN = 0
-    FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_NET_CTRL0_WAND, l_data64));
+    FAPI_INF("Entering ...");
 
-    FAPI_INF("Check checkstop register");
+    FAPI_DBG("Check checkstop register");
     //Getting XFIR register value
     FAPI_TRY(fapi2::getScom(i_target_chiplet, PERV_XFIR,
                             l_read_reg)); //l_read_reg = XFIR
@@ -134,14 +171,14 @@ static fapi2::ReturnCode p9_sbe_startclock_chiplets_check_checkstop_function(
                 .set_READ_CHECKSTOP(l_read_reg),
                 "ERROR: COMBINE ALL CHECKSTOP ERROR");
 
-    FAPI_INF("Clear flush_inhibit to go in to flush mode");
+    FAPI_DBG("Clear flush_inhibit to go in to flush mode");
     //Setting CPLT_CTRL0 register value
     l_data64.flush<0>();
     //CPLT_CTRL0.CTRL_CC_FLUSHMODE_INH_DC = 0
     l_data64.setBit<PERV_1_CPLT_CTRL0_CTRL_CC_FLUSHMODE_INH_DC>();
     FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_CPLT_CTRL0_CLEAR, l_data64));
 
-    FAPI_DBG("Exiting ...");
+    FAPI_INF("Exiting ...");
 
 fapi_try_exit:
     return fapi2::current_err;
@@ -157,7 +194,7 @@ static fapi2::ReturnCode p9_sbe_startclock_chiplets_cplt_ctrl_action_function(
     const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet)
 {
     fapi2::buffer<uint64_t> l_data64;
-    FAPI_DBG("Entering ...");
+    FAPI_INF("Entering ...");
 
     // Local variable and constant definition
     fapi2::buffer <uint32_t> l_attr_pg;
@@ -168,7 +205,7 @@ static fapi2::ReturnCode p9_sbe_startclock_chiplets_cplt_ctrl_action_function(
 
     // Not needed as have only nest chiplet (no dual clock controller) Bit 62 ->0
     //
-    FAPI_INF("Drop partial good fences");
+    FAPI_DBG("Drop partial good fences");
     //Setting CPLT_CTRL1 register value
     l_data64.flush<0>();
     l_data64.writeBit<PERV_1_CPLT_CTRL1_TC_VITL_REGION_FENCE>
@@ -197,14 +234,117 @@ static fapi2::ReturnCode p9_sbe_startclock_chiplets_cplt_ctrl_action_function(
     l_data64.writeBit<PERV_1_CPLT_CTRL1_UNUSED_14B>(l_attr_pg.getBit<30>());
     FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_CPLT_CTRL1_CLEAR, l_data64));
 
-    FAPI_INF("reset abistclk_muxsel");
+    FAPI_DBG("reset abistclk_muxsel");
     //Setting CPLT_CTRL0 register value
     l_data64.flush<0>();
     //CPLT_CTRL0.CTRL_CC_ABSTCLK_MUXSEL_DC = 0
     l_data64.setBit<PERV_1_CPLT_CTRL0_CTRL_CC_ABSTCLK_MUXSEL_DC>();
     FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_CPLT_CTRL0_CLEAR, l_data64));
 
-    FAPI_DBG("Exiting ...");
+    FAPI_INF("Exiting ...");
+
+fapi_try_exit:
+    return fapi2::current_err;
+
+}
+
+/// @brief get children for all chiplets : Perv, Nest, XB, MC, OB, PCIe
+///
+/// @param[in]     i_target_chip   Reference to TARGET_TYPE_PERV target
+/// @param[out]    o_pg_vector     vector of targets
+/// @return  FAPI2_RC_SUCCESS if success, else error code.
+static fapi2::ReturnCode p9_sbe_startclock_chiplets_get_pg_vector(
+    const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chip,
+    fapi2::buffer<uint64_t>& o_pg_vector)
+{
+    fapi2::buffer<uint8_t> l_read_attrunitpos;
+    FAPI_INF("Entering ...");
+
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, i_target_chip,
+                           l_read_attrunitpos));
+
+    if (    l_read_attrunitpos == 0x01 )
+    {
+        o_pg_vector.setBit<0>();
+    }
+
+    if ( l_read_attrunitpos == 0x02 )
+    {
+        o_pg_vector.setBit<1>();
+    }
+
+    if (    l_read_attrunitpos == 0x03 )
+    {
+        o_pg_vector.setBit<2>();
+    }
+
+    if (    l_read_attrunitpos == 0x04 )
+    {
+        o_pg_vector.setBit<3>();
+    }
+
+    if (    l_read_attrunitpos == 0x05 )
+    {
+        o_pg_vector.setBit<4>();
+    }
+
+    FAPI_INF("Exiting ...");
+
+fapi_try_exit:
+    return fapi2::current_err;
+
+}
+
+/// @brief Drop chiplet fence for OB chiplet
+///
+/// @param[in]     i_target_chip   Reference to TARGET_TYPE_PERV target
+/// @param[in]     i_pg_vector     Pg vector of targets
+/// @return  FAPI2_RC_SUCCESS if success, else error code.
+static fapi2::ReturnCode p9_sbe_startclock_chiplets_ob_fence_drop(
+    const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chip,
+    const fapi2::buffer<uint64_t> i_pg_vector)
+{
+    fapi2::buffer<uint64_t> l_data64;
+    FAPI_INF("Entering ...");
+
+    if ( i_pg_vector.getBit<2>() == 1 )
+    {
+        FAPI_DBG("Drop chiplet fence");
+        //Setting NET_CTRL0 register value
+        l_data64.flush<1>();
+        l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>();  //NET_CTRL0.FENCE_EN = 0
+        FAPI_TRY(fapi2::putScom(i_target_chip, PERV_NET_CTRL0_WAND, l_data64));
+    }
+
+    FAPI_INF("Exiting ...");
+
+fapi_try_exit:
+    return fapi2::current_err;
+
+}
+
+/// @brief Drop chiplet fence for pcie chiplet
+///
+/// @param[in]     i_target_chip   Reference to TARGET_TYPE_PERV target
+/// @param[in]     i_pg_vector     Pg vector of targets
+/// @return  FAPI2_RC_SUCCESS if success, else error code.
+static fapi2::ReturnCode p9_sbe_startclock_chiplets_pci_fence_drop(
+    const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chip,
+    const fapi2::buffer<uint64_t> i_pg_vector)
+{
+    fapi2::buffer<uint64_t> l_data64;
+    FAPI_INF("Entering ...");
+
+    if ( i_pg_vector.getBit<3>() == 1 )
+    {
+        FAPI_DBG("Drop chiplet fence");
+        //Setting NET_CTRL0 register value
+        l_data64.flush<1>();
+        l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>();  //NET_CTRL0.FENCE_EN = 0
+        FAPI_TRY(fapi2::putScom(i_target_chip, PERV_NET_CTRL0_WAND, l_data64));
+    }
+
+    FAPI_INF("Exiting ...");
 
 fapi_try_exit:
     return fapi2::current_err;
@@ -219,14 +359,42 @@ static fapi2::ReturnCode p9_sbe_startclock_chiplets_sync_config(
     const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet)
 {
     fapi2::buffer<uint64_t> l_data64;
-    FAPI_DBG("Entering ...");
+    FAPI_INF("Entering ...");
 
     //Setting SYNC_CONFIG register value
     FAPI_TRY(fapi2::getScom(i_target_chiplet, PERV_SYNC_CONFIG, l_data64));
     l_data64.setBit<4>();  //SYNC_CONFIG.LISTEN_TO_SYNC_PULSE_DIS = 0b1
     FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_SYNC_CONFIG, l_data64));
 
-    FAPI_DBG("Exiting ...");
+    FAPI_INF("Exiting ...");
+
+fapi_try_exit:
+    return fapi2::current_err;
+
+}
+
+/// @brief Drop chiplet fence for XB chiplet
+///
+/// @param[in]     i_target_chip   Reference to TARGET_TYPE_PERV target
+/// @param[in]     i_pg_vector     vector of targets
+/// @return  FAPI2_RC_SUCCESS if success, else error code.
+static fapi2::ReturnCode p9_sbe_startclock_chiplets_xb_fence_drop(
+    const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chip,
+    const fapi2::buffer<uint64_t> i_pg_vector)
+{
+    fapi2::buffer<uint64_t> l_data64;
+    FAPI_INF("Entering ...");
+
+    if ( i_pg_vector.getBit<1>() == 1 )
+    {
+        FAPI_DBG("Drop chiplet fence");
+        //Setting NET_CTRL0 register value
+        l_data64.flush<1>();
+        l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>();  //NET_CTRL0.FENCE_EN = 0
+        FAPI_TRY(fapi2::putScom(i_target_chip, PERV_NET_CTRL0_WAND, l_data64));
+    }
+
+    FAPI_INF("Exiting ...");
 
 fapi_try_exit:
     return fapi2::current_err;