IPL Only: Drop chiplet fence in scomcust instead of startclocks

Change-Id: I4f60bdfa33dc7752851411155d97c0a2d913ef99
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36031
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36143
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>

6 files changed, 86 insertions, 114 deletions

diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C
index b2c3c296..d7047ce4 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C
@@ -24,70 +24,49 @@
 /* IBM_PROLOG_END_TAG                                                     */
 ///
 /// @file  p9_hcd_cache_scomcust.C
-/// @brief Core Chiplet PCB Arbitration
-///
-/// *HWP HWP Owner   : David Du       <daviddu@us.ibm.com>
-/// *HWP FW Owner    : Sangeetha T S  <sangeet2@in.ibm.com>
-/// *HWP Team        : PM
-/// *HWP Consumed by : SBE:SGPE
-/// *HWP Level       : 1
-///
-/// Procedure Summary:
-///   If CME, request PCB Mux.
-///     Poll for PCB Mux grant
-///   Else (SBE)
-///     Nop (as the CME is not running in bringing up the first Core)
+/// @brief Cache Customization SCOMs
 ///
 
+// *HWP HWP Owner          : David Du       <daviddu@us.ibm.com>
+// *HWP Backup HWP Owner   : Greg Still     <stillgs@us.ibm.com>
+// *HWP FW Owner           : Sangeetha T S  <sangeet2@in.ibm.com>
+// *HWP Team               : PM
+// *HWP Consumed by        : SBE:SGPE
+// *HWP Level              : 2
+
 //------------------------------------------------------------------------------
 // Includes
 //------------------------------------------------------------------------------
-#include <fapi2.H>
-//#include <common_scom_addresses.H>
-//will be replaced with real scom address header file
+
+#include <p9_quad_scom_addresses.H>
+#include <p9_hcd_common.H>
 #include "p9_hcd_cache_scomcust.H"
 
 //------------------------------------------------------------------------------
 // Constant Definitions: Core Chiplet PCB Arbitration
 //------------------------------------------------------------------------------
 
-extern "C"
+fapi2::ReturnCode
+p9_hcd_cache_scomcust(
+    const fapi2::Target<fapi2::TARGET_TYPE_EQ>& i_target)
 {
+    FAPI_INF(">>p9_hcd_cache_scomcust");
+    fapi2::buffer<uint64_t>                     l_data64;
+    uint8_t                                     l_attr_system_ipl_phase;
+    fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>    l_sys;
 
-    fapi2::ReturnCode
-    p9_hcd_cache_scomcust(
-        const fapi2::Target<fapi2::TARGET_TYPE_EQ>& i_target)
-    {
-
-#if 0
-
-        fapi2::buffer<uint64_t> data;
-
-        //Dynamically built (and installed) routine that is inserted by the .XIP
-        //Customization. process. (New for P9)
-        //(TODO:  this part of the process is a placeholder at this point)
-        //Dynamically built pointer where a NULL is checked before execution
-        //If NULL (a potential early value); return
-        //Else call the function at the pointer;
-        //pointer is filled in by XIP Customization
-        //Customization items:
-        //Epsilon settings scan flush to super safe
-        //Customize Epsilon settings for system config
-        //LCO setup (chiplet specific)
-        //FW setups up based victim caches
-
-        return fapi2::FAPI2_RC_SUCCESS;
-
-        FAPI_CLEANUP();
-        return fapi2::FAPI2_RC_PLAT_ERR_SEE_DATA;
-
-#endif
-
-        return fapi2::FAPI2_RC_SUCCESS;
-
-    } // Procedure
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SYSTEM_IPL_PHASE, l_sys,
+                           l_attr_system_ipl_phase));
 
+    if (l_attr_system_ipl_phase != fapi2::ENUM_ATTR_SYSTEM_IPL_PHASE_CACHE_CONTAINED)
+    {
+        FAPI_DBG("Drop chiplet fence via NET_CTRL0[18]");
+        FAPI_TRY(putScom(i_target, EQ_NET_CTRL0_WAND, MASK_UNSET(18)));
+    }
 
-} // extern C
+fapi_try_exit:
 
+    FAPI_INF("<<p9_hcd_cache_scomcust");
+    return fapi2::current_err;
+}
 
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H
index 4da4fc24..30e14793 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H
@@ -24,25 +24,28 @@
 /* IBM_PROLOG_END_TAG                                                     */
 ///
 /// @file  p9_hcd_cache_scomcust.H
-/// @brief Core Chiplet PCB Arbitration
-///
-/// *HWP HWP Owner   : David Du       <daviddu@us.ibm.com>
-/// *HWP FW Owner    : Sangeetha T S  <sangeet2@in.ibm.com>
-/// *HWP Team        : PM
-/// *HWP Consumed by : SBE:SGPE
-/// *HWP Level       : 1
+/// @brief Cache Customization SCOMs
 ///
 
+// *HWP HWP Owner          : David Du       <daviddu@us.ibm.com>
+// *HWP Backup HWP Owner   : Greg Still     <stillgs@us.ibm.com>
+// *HWP FW Owner           : Sangeetha T S  <sangeet2@in.ibm.com>
+// *HWP Team               : PM
+// *HWP Consumed by        : SBE:SGPE
+// *HWP Level              : 2
+
 #ifndef __P9_HCD_CACHE_SCOMCUST_H__
 #define __P9_HCD_CACHE_SCOMCUST_H__
-extern "C"
-{
+
+#include <fapi2.H>
 
 /// @typedef p9_hcd_cache_scomcust_FP_t
 /// function pointer typedef definition for HWP call support
-    typedef fapi2::ReturnCode (*p9_hcd_cache_scomcust_FP_t) (
-        const fapi2::Target<fapi2::TARGET_TYPE_EQ>&);
+typedef fapi2::ReturnCode (*p9_hcd_cache_scomcust_FP_t) (
+    const fapi2::Target<fapi2::TARGET_TYPE_EQ>&);
 
+extern "C"
+{
 
 /// @brief Core Chiplet PCB Arbitration
 ///
@@ -56,7 +59,9 @@ extern "C"
     p9_hcd_cache_scomcust(
         const fapi2::Target<fapi2::TARGET_TYPE_EQ>& i_target);
 
-
-} // extern C
+}
 
 #endif  // __P9_HCD_CACHE_SCOMCUST_H__
+
+
+
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C
index 414b4922..64820534 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C
@@ -328,12 +328,6 @@ p9_hcd_cache_startclocks(
     // Cleaning up
     // -------------------------------
 
-    if (l_attr_system_ipl_phase != fapi2::ENUM_ATTR_SYSTEM_IPL_PHASE_CACHE_CONTAINED)
-    {
-        FAPI_DBG("Drop chiplet fence via NET_CTRL0[18]");
-        FAPI_TRY(putScom(i_target, EQ_NET_CTRL0_WAND, MASK_UNSET(18)));
-    }
-
     /// @todo RTC158181 ignore xstop checkstop in sim, review for lab
     /*
     FAPI_DBG("Check the Global Checkstop FIR");
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C
index 842f605d..307010ca 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C
@@ -26,12 +26,6 @@
 /// @file  p9_hcd_core_scomcust.C
 /// @brief Core Customization SCOMs
 ///
-/// *HWP HWP Owner   : David Du      <daviddu@us.ibm.com>
-/// *HWP FW Owner    : Reshmi Nair   <resnair5@in.ibm.com>
-/// *HWP Team        : PM
-/// *HWP Consumed by : SBE:CME
-/// *HWP Level       : 1
-///
 /// Procedure Summary:
 ///   Dynamically built (and installed) routine that is inserted by the .XIP
 ///   Customization. process. (New for P9) (TODO: this part of the process is
@@ -40,44 +34,39 @@
 ///   If NULL (a potential early value); return
 ///   Else call the function at the pointer;
 ///   pointer is filled in by XIP Customization
-///
+
+// *HWP HWP Owner          : David Du       <daviddu@us.ibm.com>
+// *HWP Backup HWP Owner   : Greg Still     <stillgs@us.ibm.com>
+// *HWP FW Owner           : Sangeetha T S  <sangeet2@in.ibm.com>
+// *HWP Team               : PM
+// *HWP Consumed by        : SBE:CME
+// *HWP Level              : 2
 
 //-----------------------------------------------------------------------------
 // Includes
 //-----------------------------------------------------------------------------
-#include <fapi2.H>
-//#include <common_scom_addresses.H>
-//will be replaced with real scom address header file
+
+#include <p9_quad_scom_addresses.H>
+#include <p9_hcd_common.H>
 #include "p9_hcd_core_scomcust.H"
 
 //-----------------------------------------------------------------------------
 // Constant Definitions: Core Customization SCOMs
 //-----------------------------------------------------------------------------
 
-extern "C"
+fapi2::ReturnCode
+p9_hcd_core_scomcust(
+    const fapi2::Target<fapi2::TARGET_TYPE_CORE>& i_target)
 {
+    FAPI_INF(">>p9_hcd_core_scomcust");
+    fapi2::buffer<uint64_t> l_data64;
 
-    fapi2::ReturnCode
-    p9_hcd_core_scomcust(
-        const fapi2::Target<fapi2::TARGET_TYPE_CORE>& i_target)
-    {
-
-#if 0
-
-        fapi2::buffer<uint64_t> data;
-
-        return fapi2::FAPI2_RC_SUCCESS;
-
-        FAPI_CLEANUP();
-        return fapi2::FAPI2_RC_PLAT_ERR_SEE_DATA;
-
-#endif
-
-        return fapi2::FAPI2_RC_SUCCESS;
-
-    } // Procedure
-
+    FAPI_DBG("Drop chiplet fence via NET_CTRL0[18]");
+    FAPI_TRY(putScom(i_target, C_NET_CTRL0_WAND, MASK_UNSET(18)));
 
-} // extern C
+fapi_try_exit:
 
+    FAPI_INF("<<p9_hcd_core_scomcust");
+    return fapi2::current_err;
+}
 
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H
index f55230bf..68c4609a 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H
@@ -26,25 +26,26 @@
 /// @file  p9_hcd_core_scomcust.H
 /// @brief Core Customization SCOMs
 ///
-/// *HWP HWP Owner   : David Du      <daviddu@us.ibm.com>
-/// *HWP FW Owner    : Reshmi Nair   <resnair5@in.ibm.com>
-/// *HWP Team        : PM
-/// *HWP Consumed by : SBE:CME
-/// *HWP Level       : 1
-///
 
+// *HWP HWP Owner          : David Du       <daviddu@us.ibm.com>
+// *HWP Backup HWP Owner   : Greg Still     <stillgs@us.ibm.com>
+// *HWP FW Owner           : Sangeetha T S  <sangeet2@in.ibm.com>
+// *HWP Team               : PM
+// *HWP Consumed by        : SBE:CME
+// *HWP Level              : 2
 
 #ifndef __P9_HCD_CORE_SCOMCUST_H__
 #define __P9_HCD_CORE_SCOMCUST_H__
 
-extern "C"
-{
+#include <fapi2.H>
 
 /// @typedef p9_hcd_core_scomcust_FP_t
 /// function pointer typedef definition for HWP call support
-    typedef fapi2::ReturnCode (*p9_hcd_core_scomcust_FP_t) (
-        const fapi2::Target<fapi2::TARGET_TYPE_CORE>&);
+typedef fapi2::ReturnCode (*p9_hcd_core_scomcust_FP_t) (
+    const fapi2::Target<fapi2::TARGET_TYPE_CORE>&);
 
+extern "C"
+{
 
 /// @brief Core Customization SCOMs
 ///
@@ -58,6 +59,7 @@ extern "C"
     p9_hcd_core_scomcust(
         const fapi2::Target<fapi2::TARGET_TYPE_CORE>& i_target);
 
-} // extern C
+}
 
 #endif  // __P9_HCD_CORE_SCOMCUST_H__
+
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C
index 48017020..c3a71b23 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C
@@ -277,8 +277,11 @@ p9_hcd_core_startclocks(
     // Cleaning up
     // -------------------------------
 
-    FAPI_DBG("Drop chiplet fence via NET_CTRL0[18]");
-    FAPI_TRY(putScom(i_target, C_NET_CTRL0_WAND, MASK_UNSET(18)));
+    if (l_attr_system_ipl_phase == fapi2::ENUM_ATTR_SYSTEM_IPL_PHASE_CACHE_CONTAINED)
+    {
+        FAPI_DBG("Drop chiplet fence via NET_CTRL0[18]");
+        FAPI_TRY(putScom(i_target, C_NET_CTRL0_WAND, MASK_UNSET(18)));
+    }
 
     /// @todo RTC158181 ignore xstop checkstop in sim, review for lab
     /*