HW405243/IPL: Assert/drop pcb_mux_disable around quad power off

Change-Id: I551b7fd168bbc998ee8843f6f5de849b666338c0
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37755
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37763
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>

3 files changed, 61 insertions, 6 deletions

diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C
index 3912dae2..f1424fc5 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C
@@ -64,13 +64,32 @@ p9_hcd_cache_poweron(
 {
     FAPI_INF(">>p9_hcd_cache_poweron");
     fapi2::buffer<uint64_t> l_data64;
-    fapi2::buffer<uint8_t>  l_attr_dd1_vcs_workaround;
+    uint8_t                 l_attr_dd1_vcs_workaround   = 0;
+    uint8_t                 l_attr_chip_unit_pos        = 0;
+    uint32_t                l_scom_addr                 = 0;
     fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> l_chip =
         i_target.getParent<fapi2::TARGET_TYPE_PROC_CHIP>();
+    auto l_core_functional_vector =
+        i_target.getChildren<fapi2::TARGET_TYPE_CORE>
+        (fapi2::TARGET_STATE_FUNCTIONAL);
 
     FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW388878, l_chip,
                            l_attr_dd1_vcs_workaround));
 
+    // Gate the PCBMux request so scanning doesn't cause random requests
+    for(auto& it : l_core_functional_vector)
+    {
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS,
+                               it.getParent<fapi2::TARGET_TYPE_PERV>(),
+                               l_attr_chip_unit_pos));
+        FAPI_DBG("Assert core[%d] PCB Mux Disable via C_SLAVE_CONFIG[7]",
+                 (l_attr_chip_unit_pos - p9hcd::PERV_TO_CORE_POS_OFFSET));
+        l_scom_addr = (C_SLAVE_CONFIG_REG + (0x1000000 *
+                                             (l_attr_chip_unit_pos - p9hcd::PERV_TO_CORE_POS_OFFSET)));
+        FAPI_TRY(getScom(l_chip, l_scom_addr, l_data64));
+        FAPI_TRY(putScom(l_chip, l_scom_addr, DATA_SET(7)));
+    }
+
     //--------------------------
     // Prepare to power on cache
     //--------------------------
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C
index 64820534..4a8eaafe 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C
@@ -93,6 +93,7 @@ p9_hcd_cache_startclocks(
     uint64_t                                    l_l2sync_clock;
     uint64_t                                    l_l2pscom_mask;
     uint64_t                                    l_l3pscom_mask;
+    uint32_t                                    l_scom_addr;
     uint32_t                                    l_timeout;
     uint32_t                                    l_attr_system_id     = 0;
     uint8_t                                     l_attr_group_id      = 0;
@@ -106,6 +107,9 @@ p9_hcd_cache_startclocks(
     fapi2::Target<fapi2::TARGET_TYPE_PERV>      l_perv =
         i_target.getParent<fapi2::TARGET_TYPE_PERV>();
     fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>    l_sys;
+    auto l_core_functional_vector =
+        i_target.getChildren<fapi2::TARGET_TYPE_CORE>
+        (fapi2::TARGET_STATE_FUNCTIONAL);
 
     FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SYSTEM_IPL_PHASE,         l_sys,
                            l_attr_system_ipl_phase));
@@ -347,6 +351,20 @@ p9_hcd_cache_startclocks(
     l_data64 = (l_l2pscom_mask | l_l3pscom_mask);
     FAPI_TRY(putScom(i_target, EQ_RING_FENCE_MASK_LATCH_REG, l_data64));
 
+    // Allow the CME to access the PCB Slave NET_CTRL registers
+    for(auto& it : l_core_functional_vector)
+    {
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS,
+                               it.getParent<fapi2::TARGET_TYPE_PERV>(),
+                               l_attr_chip_unit_pos));
+        FAPI_DBG("Drop core[%d] PCB Mux Disable via C_SLAVE_CONFIG[7]",
+                 (l_attr_chip_unit_pos - p9hcd::PERV_TO_CORE_POS_OFFSET));
+        l_scom_addr = (C_SLAVE_CONFIG_REG + (0x1000000 *
+                                             (l_attr_chip_unit_pos - p9hcd::PERV_TO_CORE_POS_OFFSET)));
+        FAPI_TRY(getScom(l_chip, l_scom_addr, l_data64));
+        FAPI_TRY(putScom(l_chip, l_scom_addr, DATA_UNSET(7)));
+    }
+
     // -------------------------------
     // Update Status
     // -------------------------------
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_stopclocks.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_stopclocks.C
index 9d8a7b1c..0e0ce85c 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_stopclocks.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_stopclocks.C
@@ -74,14 +74,18 @@ p9_hcd_cache_stopclocks(
     fapi2::ReturnCode                              l_rc;
     fapi2::buffer<uint64_t>                        l_data64;
     fapi2::buffer<uint64_t>                        l_temp64;
-    uint64_t                                       l_l3mask_pscom = 0;
-    uint32_t                                       l_loops1ms;
-    uint8_t                                        l_attr_chip_unit_pos = 0;
-    uint8_t                                        l_attr_vdm_enable;
-    uint8_t                                        l_is_mpipl = 0x0;
+    uint64_t                                       l_l3mask_pscom              = 0;
+    uint32_t                                       l_loops1ms                  = 0;
+    uint32_t                                       l_scom_addr                 = 0;
+    uint8_t                                        l_attr_chip_unit_pos        = 0;
+    uint8_t                                        l_attr_vdm_enable           = 0;
+    uint8_t                                        l_is_mpipl                  = 0;
     const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> l_sys;
     auto l_perv = i_target.getParent<fapi2::TARGET_TYPE_PERV>();
     auto l_chip = i_target.getParent<fapi2::TARGET_TYPE_PROC_CHIP>();
+    auto l_core_functional_vector =
+        i_target.getChildren<fapi2::TARGET_TYPE_CORE>
+        (fapi2::TARGET_STATE_FUNCTIONAL);
 
     FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_IS_MPIPL, l_sys, l_is_mpipl));
 
@@ -241,6 +245,20 @@ p9_hcd_cache_stopclocks(
     FAPI_DBG("Assert regional fences via CPLT_CTRL1[4-14]");
     FAPI_TRY(putScom(i_target, EQ_CPLT_CTRL1_OR, i_select_regions));
 
+    // Gate the PCBMux request so scanning doesn't cause random requests
+    for(auto& it : l_core_functional_vector)
+    {
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS,
+                               it.getParent<fapi2::TARGET_TYPE_PERV>(),
+                               l_attr_chip_unit_pos));
+        FAPI_DBG("Assert core[%d] PCB Mux Disable via C_SLAVE_CONFIG[7]",
+                 (l_attr_chip_unit_pos - p9hcd::PERV_TO_CORE_POS_OFFSET));
+        l_scom_addr = (C_SLAVE_CONFIG_REG + (0x1000000 *
+                                             (l_attr_chip_unit_pos - p9hcd::PERV_TO_CORE_POS_OFFSET)));
+        FAPI_TRY(getScom(l_chip, l_scom_addr, l_data64));
+        FAPI_TRY(putScom(l_chip, l_scom_addr, DATA_SET(7)));
+    }
+
     // -------------------------------
     // Disable VDM
     // -------------------------------