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| author | Joe McGill <jmcgill@us.ibm.com> | 2017-07-01 10:59:05 -0500 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-07-11 06:47:10 -0400 |
| commit | 25de058404ac120cd384cfd7bf6ce00eb3aa5adf (patch) | |
| tree | 913bada71b5045f7eb7f25a0dc0ae6fe5af877a4 | |
| parent | bee7283419489e911b3e2f44ca96bf1ac12264e5 (diff) | |
| download | talos-sbe-25de058404ac120cd384cfd7bf6ce00eb3aa5adf.tar.gz talos-sbe-25de058404ac120cd384cfd7bf6ce00eb3aa5adf.zip | |
p9_sbe_select_ex -- add option to skip HB checks
Change-Id: I11b0cb086aade9a6fd3da39638ce01e5f75e4f85
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42688
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42689
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C | 11 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.H | 5 |
2 files changed, 12 insertions, 4 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C index 61c25c00..583a34fc 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C @@ -167,6 +167,7 @@ fapi2::ReturnCode p9_sbe_select_ex( fapi2::buffer<uint64_t> l_quad_config = 0; fapi2::buffer<uint64_t> l_data64 = 0; bool b_single = true; + bool b_skip_hb_checks = false; bool b_host_core_found = false; bool b_host_eq_found = false; bool b_fused = false; @@ -193,10 +194,16 @@ fapi2::ReturnCode p9_sbe_select_ex( if (l_attr_force_all || i_mode == p9selectex::ALL) { b_single = false; + b_skip_hb_checks = true; FAPI_DBG("All cores mode"); } else { + if (i_mode == p9selectex::SINGLE_NONE_OK) + { + b_skip_hb_checks = true; + } + FAPI_DBG("Single/Fused core mode: Number of candidate cores = %d, Number of candidate caches = %d", l_core_functional_vector.size(), l_eq_functional_vector.size()); @@ -382,7 +389,7 @@ fapi2::ReturnCode p9_sbe_select_ex( FAPI_TRY(fapi2::putScom(core, C_PPM_PFDLY, l_data64)); } // Core loop - FAPI_ASSERT(!b_single || b_host_core_found, + FAPI_ASSERT(b_skip_hb_checks || b_host_core_found, fapi2::SBE_SELECT_EX_NO_CORE_AVAIL_ERROR() .set_CHIP(i_target), "No good cores found to boot with"); @@ -442,7 +449,7 @@ fapi2::ReturnCode p9_sbe_select_ex( } // EQ loop - FAPI_ASSERT(!b_single || b_host_eq_found, + FAPI_ASSERT(b_skip_hb_checks || b_host_eq_found, fapi2::SBE_SELECT_EX_CORE_EQ_CONFIG_ERROR() .set_CHIP(i_target), "The cache chiplet associated with the first good core not functional"); diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.H index c3dfbd70..15efd37c 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.H +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.H @@ -52,8 +52,9 @@ namespace p9selectex // valid domain options enum MODE { - SINGLE, // Only the first core - ALL // All Core + SINGLE, // Only the first core + SINGLE_NONE_OK, // Only the first core, don't error if none are present + ALL // All Core }; } // namespace p9selectex |
