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author | Abhishek Agarwal <abagarw8@in.ibm.com> | 2016-09-30 06:39:08 +0200 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2016-10-07 07:51:53 -0400 |
commit | 21747f2431b60a6e4ada4717c96a792c753addc6 (patch) | |
tree | 381296cff40c1ee478914ddba31b3f0626cb298d | |
parent | edec9bde06d4a3e1c06fc15c9312318b9324d94c (diff) | |
download | talos-sbe-21747f2431b60a6e4ada4717c96a792c753addc6.tar.gz talos-sbe-21747f2431b60a6e4ada4717c96a792c753addc6.zip |
p9_sbe_nest_initf procedure update for EUH IO config
Change-Id: I1b161743d6edf42ff721e46dccbb586391f04789
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30514
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com>
Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com>
Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30515
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
-rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C | 44 |
1 files changed, 32 insertions, 12 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C index 480aa82d..731a0955 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C @@ -46,9 +46,12 @@ fapi2::ReturnCode p9_sbe_nest_initf(const { FAPI_INF("Entering ..."); uint8_t l_attr_chip_unit_pos = 0; + fapi2::buffer<uint16_t> l_read_attr; for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_STATE_FUNCTIONAL)) { + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, l_chplt_trgt, l_read_attr)); + FAPI_DBG("ATTR_PG Value : %#04lx", l_read_attr); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_chplt_trgt, l_attr_chip_unit_pos)); if (l_attr_chip_unit_pos == 0x2)/* N0 Chiplet */ @@ -69,15 +72,27 @@ fapi2::ReturnCode p9_sbe_nest_initf(const FAPI_DBG("Scan n1_fure ring"); FAPI_TRY(fapi2::putRing(i_target_chip, n1_fure), "Error from putRing (n1_fure)"); - FAPI_DBG("Scan n1_ioo0_fure ring"); - FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo0_fure), - "Error from putRing (n1_ioo0_fure)"); - FAPI_DBG("Scan n1_ioo1_fure ring"); - FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo1_fure), - "Error from putRing (n1_ioo1_fure)"); - FAPI_DBG("Scan n1_mcs23_fure ring"); - FAPI_TRY(fapi2::putRing(i_target_chip, n1_mcs23_fure), - "Error from putRing (n1_mcs23_fure)"); + + if (!l_read_attr.getBit<7>()) //Check pbioo0 is enable + { + FAPI_DBG("Scan n1_ioo0_fure ring"); + FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo0_fure), + "Error from putRing (n1_ioo0_fure)"); + } + + if (!l_read_attr.getBit<8>()) //Check pbioo1 is enable + { + FAPI_DBG("Scan n1_ioo1_fure ring"); + FAPI_TRY(fapi2::putRing(i_target_chip, n1_ioo1_fure), + "Error from putRing (n1_ioo1_fure)"); + } + + if (!l_read_attr.getBit<9>()) //Check mcs23 is enable + { + FAPI_DBG("Scan n1_mcs23_fure ring"); + FAPI_TRY(fapi2::putRing(i_target_chip, n1_mcs23_fure), + "Error from putRing (n1_mcs23_fure)"); + } } if (l_attr_chip_unit_pos == 0x4)/* N2 Chiplet */ @@ -98,9 +113,14 @@ fapi2::ReturnCode p9_sbe_nest_initf(const FAPI_DBG("Scan n3_fure ring"); FAPI_TRY(fapi2::putRing(i_target_chip, n3_fure), "Error from putRing (n3_fure)"); - FAPI_DBG("Scan n3_mcs01_fure ring"); - FAPI_TRY(fapi2::putRing(i_target_chip, n3_mcs01_fure), - "Error from putRing (n3_mcs01_fure)"); + + if (!l_read_attr.getBit<10>()) //Check mcs01 is enable + { + FAPI_DBG("Scan n3_mcs01_fure ring"); + FAPI_TRY(fapi2::putRing(i_target_chip, n3_mcs01_fure), + "Error from putRing (n3_mcs01_fure)"); + } + FAPI_DBG("Scan n3_np_fure ring"); FAPI_TRY(fapi2::putRing(i_target_chip, n3_np_fure), "Error from putRing (n3_np_fure)"); |