summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorNick Klazynski <jklazyns@us.ibm.com>2016-02-10 14:48:18 -0600
committerSachin Gupta <sgupta2m@in.ibm.com>2016-02-26 01:37:24 -0600
commit1f9ce0ede06e9ed582d00998f16d1976dd872bde (patch)
tree91a807d75c6179e80c61fc4c0d0efb7a86205999
parente3ee2cf7d19b9a20fc777628f00079933370faf9 (diff)
downloadtalos-sbe-1f9ce0ede06e9ed582d00998f16d1976dd872bde.tar.gz
talos-sbe-1f9ce0ede06e9ed582d00998f16d1976dd872bde.zip
Initial checkin of proc_thread_control wrapper.
Change-Id: Ia15e7fb6b5952320412d109e9b4c0ac012ff26b4 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/24172 Tested-by: Jenkins Server Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Brian Silver <bsilver@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/24831 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
-rw-r--r--import/chips/p9/procedures/hwp/core/p9_thread_control.C16
-rw-r--r--import/chips/p9/procedures/hwp/core/p9_thread_control.H99
2 files changed, 62 insertions, 53 deletions
diff --git a/import/chips/p9/procedures/hwp/core/p9_thread_control.C b/import/chips/p9/procedures/hwp/core/p9_thread_control.C
index 32a4b4ee..2a792e58 100644
--- a/import/chips/p9/procedures/hwp/core/p9_thread_control.C
+++ b/import/chips/p9/procedures/hwp/core/p9_thread_control.C
@@ -7,7 +7,7 @@
/* */
/* EKB Project */
/* */
-/* COPYRIGHT 2015 */
+/* COPYRIGHT 2015,2016 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -21,7 +21,7 @@
/// @brief Implementation of sreset, start, stop and step
///
-// *HWP HWP Owner: Michael Dye <dyem@us.ibm.com>
+// *HWP HWP Owner: Nick Klazynski <jklazyns@us.ibm.com>
// *HWP FW Owner: Brian Silver <bsilver@us.ibm.com>
// *HWP Team: Quad
// *HWP Level: 2
@@ -326,7 +326,7 @@ fapi2::ReturnCode p9_thread_control_sreset(
fapi2::P9_THREAD_CONTROL_SRESET_FAIL()
.set_CORE_TARGET(i_target)
.set_THREAD(i_threads),
- "p9_thread_control_sreset: ERROR: Thread SReset issued, but the threads aren't running. "
+ "p9_thread_control_sreset: ERROR: Thread SRESET issued, but the threads aren't running. "
"SReset might have failed for threads 0x%x", i_threads);
}
@@ -365,8 +365,8 @@ fapi2::ReturnCode p9_thread_control_start(
fapi2::P9_THREAD_CONTROL_START_PRE_NOMAINT()
.set_CORE_TARGET(i_target)
.set_THREAD(i_threads),
- "p9_thread_control_start: ERROR: Cannot issue Thread Start because the threads aren't in maint mode. "
- "Start not attempted for threads 0x%x", i_threads);
+ "p9_thread_control_start: ERROR: Cannot issue Thread Start because the threads aren't in maint mode (threads=%x).",
+ i_threads);
}
// Start the threads
@@ -433,8 +433,7 @@ fapi2::ReturnCode p9_thread_control_stop(
fapi2::P9_THREAD_CONTROL_STOP_PRE_NOTRUNNING()
.set_CORE_TARGET(i_target)
.set_THREAD(i_threads),
- "p9_thread_control_stop: ERROR: Threads cannot be stopped because they aren't running "
- "Stop not attempted for threads 0x%x", i_threads);
+ "p9_thread_control_stop: ERROR: Threads cannot be stopped because they aren't running (threads=%x).", i_threads);
}
// Stop the threads
@@ -498,8 +497,7 @@ fapi2::ReturnCode p9_thread_control_step(
fapi2::P9_THREAD_CONTROL_STEP_PRE_NOTSTOPPING()
.set_CORE_TARGET(i_target)
.set_THREAD(i_threads),
- "p9_thread_control_step: ERROR: Thread cannot be stepped because they are not ready to step "
- "Step not attempted for threads 0x%x", i_threads);
+ "p9_thread_control_step: ERROR: Thread cannot be stepped because they are not ready to step (threads=%x).", i_threads);
}
diff --git a/import/chips/p9/procedures/hwp/core/p9_thread_control.H b/import/chips/p9/procedures/hwp/core/p9_thread_control.H
index 2592b03f..cf7c6156 100644
--- a/import/chips/p9/procedures/hwp/core/p9_thread_control.H
+++ b/import/chips/p9/procedures/hwp/core/p9_thread_control.H
@@ -7,7 +7,7 @@
/* */
/* EKB Project */
/* */
-/* COPYRIGHT 2015 */
+/* COPYRIGHT 2015,2016 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -26,11 +26,9 @@
// *! Use to start (start or sreset) thread instruction execution,
// *! stop instruction execution, or single instruction step.
// *! Also used to query the state of a thread.
-// *! OWNER NAME : Nick Klazynski Email: jklazyns@us.ibm.com
-// *! BACKUP NAME : Sebastien Lafontant Email: slafont@us.ibm.com
//------------------------------------------------------------------------------
-// *HWP HWP Owner: Michael Dye <dyem@us.ibm.com>
+// *HWP HWP Owner: Nick Klazynski <dyem@us.ibm.com>
// *HWP FW Owner: Brian Silver <bsilver@us.ibm.com>
// *HWP Team: Quad
// *HWP Level: 2
@@ -45,6 +43,9 @@
#include "p9_quad_scom_addresses.H"
+extern "C"
+{
+
// A macro to wrap the warning check boiler plate
// If the action failed and i_warncheck is set add a trace and continue anyway
#define PTC_ASSERT_WARN( __conditional__, __warning__, __ffdc__, ... ) \
@@ -54,49 +55,57 @@
{ \
FAPI_INF(__VA_ARGS__); \
} \
- \
- (__ffdc__).execute(); \
- FAPI_ERR(__VA_ARGS__); \
- goto fapi_try_exit; \
- }
+ else \
+ { \
+ (__ffdc__).execute(); \
+ FAPI_ERR(__VA_ARGS__); \
+ goto fapi_try_exit; \
+ } \
+ } \
// ProcThreadControl input commands
// If you make this an enum, the compiler can
// check that a case statement has all the elements
// covered.
-enum ThreadCommands
-{
- PTC_CMD_SRESET = 0,
- PTC_CMD_STEP = 1,
- PTC_CMD_START = 2,
- PTC_CMD_STOP = 3,
-};
+ enum ThreadCommands
+ {
+ PTC_CMD_SRESET = 0,
+ PTC_CMD_STEP = 1,
+ PTC_CMD_START = 2,
+ PTC_CMD_STOP = 3,
+ };
-enum ThreadRasStatus
-{
- CORE_MAINT_MODE = 0,
- THREAD_QUIESCED = 1,
- ICT_EMPTY = 2,
- ISU_QUIESCED = 3,
- STEP_SUCCESS = 4,
-};
-
-enum PTC_Constants
-{
- RAS_MODE_STEP_SHIFT = 52,
- PTC_STEP_COMP_POLL_LIMIT = 10,
-};
+ enum ThreadRasStatus
+ {
+ CORE_MAINT_MODE = 0,
+ THREAD_QUIESCED = 1,
+ ICT_EMPTY = 2,
+ ISU_QUIESCED = 3,
+ STEP_SUCCESS = 4,
+ };
+
+ enum PTC_Constants
+ {
+ RAS_MODE_STEP_SHIFT = 52,
+ PTC_STEP_COMP_POLL_LIMIT = 10,
+ };
// Bit positions in the DIRECT_CONTROL register
-enum ThreadControl
-{
- CLEAR_MAINT = 3,
- SRESET_REQUEST = 4,
- CORE_STEP = 5,
- CORE_START = 6,
- CORE_STOP = 7,
-};
+ enum ThreadControl
+ {
+ CLEAR_MAINT = 3,
+ SRESET_REQUEST = 4,
+ CORE_STEP = 5,
+ CORE_START = 6,
+ CORE_STOP = 7,
+ };
+
+/// @typedef p9_thread_control_FP_t
+/// function pointer typedef definition for HWP call support
+ typedef fapi2::ReturnCode (*p9_thread_control_FP_t) (
+ const fapi2::Target<fapi2::TARGET_TYPE_CORE>&,
+ const uint8_t, const ThreadCommands, const bool);
//--------------------------------------------------------------------------
/// @brief p9_thread_control: utility subroutine to control thread state
@@ -113,9 +122,9 @@ enum ThreadControl
/// function-specific fail codes (see function definitions),
/// else error
//-------------------------------------------------------------------------
-extern fapi2::ReturnCode p9_thread_control(const fapi2::Target<fapi2::TARGET_TYPE_EX>& i_target,
- const uint8_t i_threads, const ThreadCommands i_command,
- const bool i_warncheck);
+//fapi2::ReturnCode p9_thread_control(const fapi2::Target<fapi2::TARGET_TYPE_EX>& i_target,
+// const uint8_t i_threads, const ThreadCommands i_command,
+// const bool i_warncheck);
//--------------------------------------------------------------------------
@@ -133,7 +142,9 @@ extern fapi2::ReturnCode p9_thread_control(const fapi2::Target<fapi2::TARGET_TYP
/// function-specific fail codes (see function definitions),
/// else error
//--------------------------------------------------------------------------
-extern fapi2::ReturnCode p9_thread_control(const fapi2::Target<fapi2::TARGET_TYPE_CORE>& i_target,
- const uint8_t i_threads, const ThreadCommands i_command,
- const bool i_warncheck);
+ fapi2::ReturnCode p9_thread_control(const fapi2::Target<fapi2::TARGET_TYPE_CORE>& i_target,
+ const uint8_t i_threads, const ThreadCommands i_command,
+ const bool i_warncheck);
#endif // _P9_THREAD_CONTROL_H_
+
+} // extern
OpenPOWER on IntegriCloud