p9_block_wakeup_intr Level 2

- Fixed problems with Cronus to ungate testing
- Ran on Awan and SUET
- Wrapper has ability to just to -set and -clear but also
  tests all supported options
- Added a "no special wakeup" option (parm) has there may
  be use cases with it as P8 did NOT perform Special Wake-up
  to set the bit while P9 Hcode is stating this requirement.
- Has a placeholder for special wakeup inclusion later.
- Address Gerrit comments (round 2)
- Rebased (4)

Change-Id: I0722065ce59a2c6ebfdc6c8cf77cb5746c3db7aa
RTC: 136783
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23347
Tested-by: Jenkins Server
Tested-by: Auto Mirror
Tested-by: Hostboot CI
Tested-by: PPE CI
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/24223

1 files changed, 35 insertions, 0 deletions

diff --git a/import/chips/p9/sw_simulation/powermgmt.act b/import/chips/p9/sw_simulation/powermgmt.act
index d557314b..3b1a84c1 100644
--- a/import/chips/p9/sw_simulation/powermgmt.act
+++ b/import/chips/p9/sw_simulation/powermgmt.act
@@ -84,6 +84,7 @@ CAUSE_EFFECT {
 }
 
 ##
+<<<<<<< HEAD
 ## Actions for Procedure - p9_pm_pba_init
 ##
 
@@ -417,3 +418,37 @@ CAUSE_EFFECT {
   EFFECT: TARGET=[REG(0x370F0114)] OP=[EQUALTO,BUF] DATA=[SSH(0x0)]
 }
 ## Core23 End
+
+##
+# Actions for Procedure - p9_block_wakeup_intr
+##
+
+# Core Power Management Mode Register
+CAUSE_EFFECT {
+  LABEL=[CPMMR Write OR of PPM Write Override]
+  WATCH=[REG(0x290F0108)]
+  CAUSE: TARGET=[REG(0x290F0108)] OP=[BIT,ON] BIT=[1]
+  EFFECT: TARGET=[REG(0x290F0106)] OP=[BIT,ON] BIT=[1]
+}
+
+CAUSE_EFFECT {
+  LABEL=[CPMMR Write CLEAR of PPM Write Override]
+  WATCH=[REG(0x290F0107)]
+  CAUSE: TARGET=[REG(0x290F0107)] OP=[BIT,ON] BIT=[1]
+  EFFECT: TARGET=[REG(0x290F0106)] OP=[BIT,OFF] BIT=[1]
+}
+
+# General Power Management Mode Register
+CAUSE_EFFECT {
+  LABEL=[GPMMR Write OR of Block Wakeup Events]
+  WATCH=[REG(0x290F0102)]
+  CAUSE: TARGET=[REG(0x290F0102)] OP=[BIT,ON] BIT=[6]
+  EFFECT: TARGET=[REG(0x290F0100)] OP=[BIT,ON] BIT=[6]
+}
+
+CAUSE_EFFECT {
+  LABEL=[GPMMR Write CLEAR of PPM Write Override]
+  WATCH=[REG(0x290F0101)]
+  CAUSE: TARGET=[REG(0x290F0101)] OP=[BIT,ON] BIT=[6]
+  EFFECT: TARGET=[REG(0x290F0100)] OP=[BIT,OFF] BIT=[6]
+}