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-rw-r--r--meta-openbmc-machines/meta-openpower/common/recipes-bsp/skiboot/skiboot.inc1
-rw-r--r--meta-openbmc-machines/meta-openpower/common/recipes-bsp/skiboot/skiboot/0002-external-common-Teach-ARM-code-to-erase-mtd-chips.patch50
2 files changed, 51 insertions, 0 deletions
diff --git a/meta-openbmc-machines/meta-openpower/common/recipes-bsp/skiboot/skiboot.inc b/meta-openbmc-machines/meta-openpower/common/recipes-bsp/skiboot/skiboot.inc
index 248e13f7f..fa30f091e 100644
--- a/meta-openbmc-machines/meta-openpower/common/recipes-bsp/skiboot/skiboot.inc
+++ b/meta-openbmc-machines/meta-openpower/common/recipes-bsp/skiboot/skiboot.inc
@@ -3,6 +3,7 @@ LICENSE = "Apache-2.0"
SRC_URI += "git://github.com/open-power/skiboot.git;nobranch=1"
SRC_URI += "file://0001-external-Use-more-standard-PREFIX-vs-prefix.patch"
+SRC_URI += "file://0002-external-common-Teach-ARM-code-to-erase-mtd-chips.patch"
FILESEXTRAPATHS_append := "${THISDIR}/skiboot:"
diff --git a/meta-openbmc-machines/meta-openpower/common/recipes-bsp/skiboot/skiboot/0002-external-common-Teach-ARM-code-to-erase-mtd-chips.patch b/meta-openbmc-machines/meta-openpower/common/recipes-bsp/skiboot/skiboot/0002-external-common-Teach-ARM-code-to-erase-mtd-chips.patch
new file mode 100644
index 000000000..3ed951993
--- /dev/null
+++ b/meta-openbmc-machines/meta-openpower/common/recipes-bsp/skiboot/skiboot/0002-external-common-Teach-ARM-code-to-erase-mtd-chips.patch
@@ -0,0 +1,50 @@
+From patchwork Mon Nov 7 06:28:49 2016
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+Subject: [1/3] external/common: Teach ARM code to erase 'mtd chips'
+From: Cyril Bur <cyril.bur@au1.ibm.com>
+X-Patchwork-Id: 691765
+Message-Id: <20161107062851.1016-1-cyril.bur@au1.ibm.com>
+To: skiboot@lists.ozlabs.org
+Date: Mon, 7 Nov 2016 17:28:49 +1100
+
+Currently the arch flash code for all architectures can only perform
+chip erases if there is a real flash driver attached.
+
+With increasing use of MTD on both host and BMC this code needs to know
+how to behave of the backend of blocklevel is MTD.
+
+This patch teaches the ARM specific code to pass an erase for the full
+size of the chip down the stack. This can be optimised into a chip erase
+within the kernel.
+
+Signed-off-by: Cyril Bur <cyril.bur@au1.ibm.com>
+---
+ external/common/arch_flash_arm.c | 13 +++++++++++--
+ 1 file changed, 11 insertions(+), 2 deletions(-)
+
+diff --git a/external/common/arch_flash_arm.c b/external/common/arch_flash_arm.c
+index 697609d..bb8800f 100644
+--- a/external/common/arch_flash_arm.c
++++ b/external/common/arch_flash_arm.c
+@@ -300,8 +300,17 @@ int arch_flash_erase_chip(struct blocklevel_device *bl)
+ if (!arch_data.init_bl || arch_data.init_bl != bl)
+ return -1;
+
+- if (!arch_data.flash_chip)
+- return -1;
++ if (!arch_data.flash_chip) {
++ /* Just assume its a regular erase */
++ int rc;
++ uint64_t total_size;
++
++ rc = blocklevel_get_info(bl, NULL, &total_size, NULL);
++ if (rc)
++ return rc;
++
++ return blocklevel_erase(bl, 0, total_size);
++ }
+
+ return flash_erase_chip(arch_data.flash_chip);
+ }
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