summaryrefslogtreecommitdiffstats
path: root/arch/mips/sibyte/bcm1480/setup.c
blob: 8236d0c48542cc7dbaedd672588e13f46e513283 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
/*
 * Copyright (C) 2000,2001,2002,2003,2004 Broadcom Corporation
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
 */
#include <linux/kernel.h>
#include <linux/reboot.h>
#include <linux/string.h>

#include <asm/bootinfo.h>
#include <asm/mipsregs.h>
#include <asm/io.h>
#include <asm/sibyte/sb1250.h>

#include <asm/sibyte/bcm1480_regs.h>
#include <asm/sibyte/bcm1480_scd.h>
#include <asm/sibyte/sb1250_scd.h>

unsigned int sb1_pass;
unsigned int soc_pass;
unsigned int soc_type;
unsigned int periph_rev;
unsigned int zbbus_mhz;

static unsigned int part_type;

static char *soc_str;
static char *pass_str;

static inline int setup_bcm1x80_bcm1x55(void);

/* Setup code likely to be common to all SiByte platforms */

static inline int sys_rev_decode(void)
{
	int ret = 0;

	switch (soc_type) {
	    case K_SYS_SOC_TYPE_BCM1x80:
		if (part_type == K_SYS_PART_BCM1480)
		    soc_str = "BCM1480";
		else if (part_type == K_SYS_PART_BCM1280)
		    soc_str = "BCM1280";
		else
		    soc_str = "BCM1x80";
		ret = setup_bcm1x80_bcm1x55();
		break;

	    case K_SYS_SOC_TYPE_BCM1x55:
		if (part_type == K_SYS_PART_BCM1455)
		    soc_str = "BCM1455";
		else if (part_type == K_SYS_PART_BCM1255)
		    soc_str = "BCM1255";
		else
		    soc_str = "BCM1x55";
		ret = setup_bcm1x80_bcm1x55();
		break;

	    default:
		prom_printf("Unknown part type %x\n", part_type);
		ret = 1;
		break;
	}
	return ret;
}

static inline int setup_bcm1x80_bcm1x55(void)
{
	int ret = 0;

	switch (soc_pass) {
	    case K_SYS_REVISION_BCM1480_S0:
		periph_rev = 1;
		pass_str = "S0 (pass1)";
		break;
	    case K_SYS_REVISION_BCM1480_A1:
		periph_rev = 1;
		pass_str = "A1 (pass1)";
		break;
	    case K_SYS_REVISION_BCM1480_A2:
		periph_rev = 1;
		pass_str = "A2 (pass1)";
		break;
	    case K_SYS_REVISION_BCM1480_A3:
		periph_rev = 1;
		pass_str = "A3 (pass1)";
		break;
	    case K_SYS_REVISION_BCM1480_B0:
		periph_rev = 1;
		pass_str = "B0 (pass2)";
		break;
	    default:
		prom_printf("Unknown %s rev %x\n", soc_str, soc_pass);
		periph_rev = 1;
		pass_str = "Unknown Revision";
		break;
	}
	return ret;
}

void bcm1480_setup(void)
{
	uint64_t sys_rev;
	int plldiv;

	sb1_pass = read_c0_prid() & 0xff;
	sys_rev = __raw_readq(IOADDR(A_SCD_SYSTEM_REVISION));
	soc_type = SYS_SOC_TYPE(sys_rev);
	part_type = G_SYS_PART(sys_rev);
	soc_pass = G_SYS_REVISION(sys_rev);

	if (sys_rev_decode()) {
		prom_printf("Restart after failure to identify SiByte chip\n");
		machine_restart(NULL);
	}

	plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG)));
	zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25);

	prom_printf("Broadcom SiByte %s %s @ %d MHz (SB-1A rev %d)\n",
		    soc_str, pass_str, zbbus_mhz * 2, sb1_pass);
	prom_printf("Board type: %s\n", get_system_type());
}
OpenPOWER on IntegriCloud