summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/dra62x-clocks.dtsi
blob: 11d1241b0e13a0c4d19bc83b73a1b5f5a9b4ecf7 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
// SPDX-License-Identifier: GPL-2.0-only

#include "dm814x-clocks.dtsi"

/* Compared to dm814x, dra62x does not have hdic, l3 or dss PLLs */
&adpll_hdvic_ck {
	status = "disabled";
};

&adpll_l3_ck {
	status = "disabled";
};

&adpll_dss_ck {
	status = "disabled";
};

/* Compared to dm814x, dra62x has interconnect clocks on isp PLL */
&sysclk4_ck {
	clocks = <&adpll_isp_ck 1>;
};

&sysclk5_ck {
	clocks = <&adpll_isp_ck 1>;
};

&sysclk6_ck {
	clocks = <&adpll_isp_ck 1>;
};

/*
 * Compared to dm814x, dra62x has different shifts and more mux options.
 * Please add the extra options for ysclk_14 and 16 if really needed.
 */
&timer1_fck {
	clocks = <&sysclk18_ck &aud_clkin0_ck &aud_clkin1_ck
		  &aud_clkin2_ck &devosc_ck &auxosc_ck &tclkin_ck>;
	ti,bit-shift = <4>;
};

&timer2_fck {
	clocks = <&sysclk18_ck &aud_clkin0_ck &aud_clkin1_ck
		  &aud_clkin2_ck &devosc_ck &auxosc_ck &tclkin_ck>;
	ti,bit-shift = <8>;
};
OpenPOWER on IntegriCloud