1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
|
/*
* at91-linea.dtsi - Device Tree Include file for the Axentia Linea Module.
*
* Copyright (C) 2017 Axentia Technologies AB
*
* Author: Peter Rosin <peda@axentia.se>
*
* Licensed under GPLv2 or later.
*/
#include "sama5d31.dtsi"
/ {
compatible = "axentia,linea",
"atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
memory {
reg = <0x20000000 0x4000000>;
};
};
&slow_xtal {
clock-frequency = <32768>;
};
&main_xtal {
clock-frequency = <12000000>;
};
&tcb0 {
timer@0 {
compatible = "atmel,tcb-timer";
reg = <0>;
};
timer@1 {
compatible = "atmel,tcb-timer";
reg = <1>;
};
};
&i2c0 {
status = "okay";
eeprom@51 {
compatible = "st,24c64", "atmel,24c64";
reg = <0x51>;
pagesize = <32>;
};
};
&ebi {
pinctrl-0 = <&pinctrl_ebi_nand_addr>;
pinctrl-names = "default";
status = "okay";
};
&nand_controller {
status = "okay";
nand: nand@3 {
reg = <0x3 0x0 0x2>;
atmel,rb = <0>;
nand-bus-width = <8>;
nand-ecc-mode = "hw";
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-on-flash-bbt;
label = "atmel_nand";
};
};
|
