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* Staging: rtl8188eu: Remove parentheses around right side an assignmentHaneen Mohammed2015-03-1611-42/+42
* staging: rtl8188eu: remove break after returnSupriya Karanth2015-03-161-1/+0
* staging: rtl8188eu: remove intialization of static intsSupriya Karanth2015-03-161-1/+1
* Staging: rtl8188eu: Eliminate use of _init_timerVaishali Thakkar2015-03-1612-49/+52
* Staging: rtl8188eu: Eliminate use of _set_timerVaishali Thakkar2015-03-1611-56/+82
* drivers: staging: rtl8188eu: core: rtw_security: Fix misspelled wordIoana Ciornei2015-03-161-6/+6
* staging: rtl8188eu: use %pM specifier instead of passing direct valuesMike Krinkin2015-03-161-4/+2
* Staging: rtl8188eu: Remove unneeded return statementSomya Anand2015-03-151-2/+0
* Staging: rtl8188eu: Remove redundant local variableSomya Anand2015-03-151-53/+28
* staging: rtl8188eu: Use kcalloc instead of kzalloc.Navya Sri Nizamkari2015-03-151-1/+2
* staging: rtl8188eu: Use kcalloc instead of kzallocNavya Sri Nizamkari2015-03-151-1/+1
* drivers: staging: rtl8188eu: core: Removed unnecessary parenthesesTina Johnson2015-03-091-2/+2
* staging: rtl8188eu: Remove unneeded parenthesesSomya Anand2015-03-091-1/+1
* staging: rtl8188eu: Fix trivial typos in commentsYannick Guerrini2015-03-062-13/+13
* Staging: rtl8188eu: Remove unnecessary return statementsSomya Anand2015-03-061-2/+0
* Staging: rtl8188eu: Remove redundant local variableSomya Anand2015-03-061-17/+7
* staging: rtl8188eu: replace memset(x,0,ETH_ALEN)Aya Mahfouz2015-03-061-4/+6
* staging: rtl8188eu: remove extra parentheses around right bit shift operationsAya Mahfouz2015-03-064-7/+8
* staging: rtl8188eu: Remove memset.Navya Sri Nizamkari2015-03-011-1/+0
* staging: rtl8188eu: Add blank line after declarationsNavya Sri Nizamkari2015-03-011-0/+1
* staging: rtl8188eu: Compress two statements into one.Navya Sri Nizamkari2015-03-011-9/+6
* Staging: rtl8188eu: Remove unused variableVatika Harlalka2015-03-011-9/+1
* staging: rtl8188eu: os_dep: remove unused variableAya Mahfouz2015-03-011-3/+1
* Staging: rtl8188eu: Move variable assignmentVatika Harlalka2015-03-011-1/+1
* Staging: rtl8188eu: Remove braces from single statement blockVatika Harlalka2015-03-011-2/+1
* Staging: rtl8188eu: Remove unnecessary codeVatika Harlalka2015-02-261-20/+1
* staging: rtl8188eu: rewrite the right hand side of an assignmentAya Mahfouz2015-02-261-2/+2
* staging: rtl8188eu: rewrite the right hand side of an assignmentAya Mahfouz2015-02-261-1/+1
* staging: rtl8188eu: rewrite the right hand side of an assignmentAya Mahfouz2015-02-261-2/+2
* staging: rtl8188eu: rewrite the right hand side of an assignmentAya Mahfouz2015-02-261-1/+1
* Staging: rtl8188eu: Replace if-else block with switch-caseVatika Harlalka2015-02-261-8/+16
* Staging: rtl8188eu: Refactor conditional code to increase readabilityVatika Harlalka2015-02-261-9/+3
* Staging: rtl8188eu: Combine two loops to increase readabilityVatika Harlalka2015-02-261-3/+3
* Staging: rtl8188eu: Remove unnecessary if conditionVatika Harlalka2015-02-261-36/+1
* Staging: rtl8188eu: Remove unused macrosKatie Dunne2015-02-261-28/+0
* Staging: rtl8188eu: Remove unnecessary variableVatika Harlalka2015-02-261-3/+2
* Staging: rtl8188eu: Refactored code to increase readilityVatika Harlalka2015-02-261-20/+12
* Staging: rtl8188eu: Replace ternary operator with existing macroVatika Harlalka2015-02-261-3/+2
* Staging: rtl8188eu: Remove redundant if conditionVatika Harlalka2015-02-261-8/+2
* Staging: rtl8188eu: Add blank line after declarationsMelike Yurtoglu2015-02-261-0/+1
* Staging: rtl8188eu: Changed array and loop constructVatika Harlalka2015-02-261-4/+3
* Staging: rtl8188eu: Replace unneeded switch-case blockVatika Harlalka2015-02-261-14/+1
* Staging: rtl8188eu: Remove unnecessary variableVatika Harlalka2015-02-261-3/+1
* Staging: rtl8188eu: Fix line over 80 charactersVatika Harlalka2015-02-261-16/+17
* Staging: rtl8188eu: Use put_unaligned_le16Vaishali Thakkar2015-02-261-5/+3
* Staging: rtl8188eu: Remove unused struct ndis_802_11_keyVaishali Thakkar2015-02-261-10/+0
* staging: rtl8188eu: core: switch with redundant casesNicholas Mc Guire2015-02-071-9/+0
* staging: rtl8188eu: odm: conditional setting with no effectNicholas Mc Guire2015-02-071-10/+3
* staging: rtl8188eu: odm: condition with no effectNicholas Mc Guire2015-02-071-7/+2
* staging: rtl8188eu: use msecs_to_jiffies for conversionsNicholas Mc Guire2015-02-071-1/+1
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