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path: root/drivers/spi/spi-zynq-qspi.c
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* spi: zynq-qspi: Support two chip selectsMiquel Raynal2019-11-081-8/+25
* spi: zynq-qspi: Do the actual hardware initialization later in the probeMiquel Raynal2019-11-081-3/+4
* spi: zynq-qspi: Clarify the select chip functionMiquel Raynal2019-11-081-11/+6
* spi: zynq-qspi: Enhance the Linear CFG bit definitionsMiquel Raynal2019-11-081-3/+3
* spi: zynq-qspi: Keep the bitfields naming consistentMiquel Raynal2019-11-081-6/+6
* spi: zynq-qspi: Anything else than CS0 is not supported yetMiquel Raynal2019-11-081-2/+6
* spi: zynq-qspi: Keep the naming consistent across the driverMiquel Raynal2019-11-081-5/+5
* spi: zynq-qspi: Drop GPIO headerLinus Walleij2019-10-301-1/+0
* spi: zynq-qspi: use devm_platform_ioremap_resource() to simplify codeYueHaibing2019-09-041-3/+1
* Merge branch 'spi-5.3' into spi-5.4Mark Brown2019-08-231-1/+1
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| * spi: zynq-qspi: Fix missing spi_unregister_controller when unload moduleAxel Lin2019-08-201-1/+1
* | spi: Remove dev_err() usage after platform_get_irq()Stephen Boyd2019-08-021-1/+0
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* spi: spi-mem: zynq-qspi: Fix build error on architectures missing readsl/writeslNaga Sureshkumar Relli2019-05-021-4/+4
* spi: spi-mem: Add support for Zynq QSPI controllerNaga Sureshkumar Relli2019-04-051-0/+761
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