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* soc: fsl: qe: remove set but not used variable 'mm_gc'YueHaibing2020-01-081-2/+0
| | | | | | | | | | | | | drivers/soc/fsl/qe/gpio.c: In function qe_pin_request: drivers/soc/fsl/qe/gpio.c:163:26: warning: variable mm_gc set but not used [-Wunused-but-set-variable] commit 1e714e54b5ca ("powerpc: qe_lib-gpio: use gpiochip data pointer") left behind this unused variable. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Chen Zhou <chenzhou10@huawei.com> Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: remove PPC32 dependency from CONFIG_QUICC_ENGINERasmus Villemoes2019-12-091-1/+2
| | | | | | | | | | | | | | | | | | There are also PPC64, ARM and ARM64 based SOCs with a QUICC Engine, and the core QE code as well as net/wan/fsl_ucc_hdlc and tty/serial/ucc_uart has now been modified to not rely on ppcisms. So extend the architectures that can select QUICC_ENGINE, and add the rather modest requirements of OF && HAS_IOMEM. The core code as well as the ucc_uart driver has been tested on an LS1021A (arm), and it has also been tested that the QE code still works on an mpc8309 (ppc). Qiang Zhao has tested that the QE-HDLC code that gets enabled with this works on ARM64. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: remove unused #include of asm/irq.h from ucc.cRasmus Villemoes2019-12-091-1/+0
| | | | | | | | | | | | | | | | | | When allowing this driver to be built for ARM, the build fails (for CONFIG_SMP=y) since ARM's asm/irq.h header is not self-contained: In file included from drivers/soc/fsl/qe/ucc.c:18:0: >> arch/arm/include/asm/irq.h:34:50: error: unknown type name 'cpumask_t' extern void arch_trigger_cpumask_backtrace(const cpumask_t *mask, But nothing in this file actually uses anything from asm/irq.h - removing this #include generates identical object code, both on PPC32 and on ARM (the latter with a patch added to asm/irq.h to make the build work in the first place). Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: avoid IS_ERR_VALUE in ucc_fast.cRasmus Villemoes2019-12-091-9/+6
| | | | | | | | | | | | | When building this on a 64-bit platform gcc rightly warns that the error checking is broken (-ENOMEM stored in an u32 does not compare greater than (unsigned long)-MAX_ERRNO). Instead, change the ucc_fast_[tr]x_virtual_fifo_base_offset members to s32 and use an ordinary check-for-negative. Also, this avoids treating 0 as "this cannot have been returned from qe_muram_alloc() so don't free it". Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: drop pointless check in qe_sdma_init()Rasmus Villemoes2019-12-091-3/+0
| | | | | | | | | | The sdma member of struct qe_immap is not at offset zero, so even if qe_immr wasn't initialized yet (i.e. NULL), &qe_immr->sdma would not be NULL. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: drop use of IS_ERR_VALUE in qe_sdma_init()Rasmus Villemoes2019-12-091-3/+3
| | | | | | | | | Now that qe_muram_alloc() returns s32, adapt qe_sdma_init() and avoid another few IS_ERR_VALUE() uses. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: avoid IS_ERR_VALUE in ucc_slow.cRasmus Villemoes2019-12-091-13/+9
| | | | | | | | | | | | | | | | | | When trying to build this for a 64-bit platform, one gets warnings from using IS_ERR_VALUE on something which is not sizeof(long). Instead, change the various *_offset fields to store a signed integer, and simply check for a negative return from qe_muram_alloc(). Since qe_muram_free() now accepts and ignores a negative argument, we only need to make sure these fields are initialized with -1, and we can just unconditionally call qe_muram_free() in ucc_slow_free(). Note that the error case for us_pram_offset failed to set that field to 0 (which, as noted earlier, is anyway a bogus sentinel value). Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: refactor cpm_muram_alloc_common to prevent BUG on error pathRasmus Villemoes2019-12-091-9/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the kmalloc() fails, we try to undo the gen_pool allocation we've just done. Unfortunately, start has already been modified to subtract the GENPOOL_OFFSET bias, so we're freeing something that very likely doesn't exist in the gen_pool, meaning we hit the kernel BUG at lib/genalloc.c:399! Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM ... [<803fd0e8>] (gen_pool_free) from [<80426bc8>] (cpm_muram_alloc_common+0xb0/0xc8) [<80426bc8>] (cpm_muram_alloc_common) from [<80426c28>] (cpm_muram_alloc+0x48/0x80) [<80426c28>] (cpm_muram_alloc) from [<80428214>] (ucc_slow_init+0x110/0x4f0) [<80428214>] (ucc_slow_init) from [<8044a718>] (qe_uart_request_port+0x3c/0x1d8) (this was tested by just injecting a random failure by adding "|| (get_random_int()&7) == 0" to the "if (!entry)" condition). Refactor the code so we do the kmalloc() first, meaning that's the thing that needs undoing in case gen_pool_alloc_algo() then fails. This allows a later cleanup to move the locking from the callers into the _common function, keeping the kmalloc() out of the critical region and then, hopefully (if all the muram_alloc callers allow) change it to a GFP_KERNEL allocation. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: drop broken lazy call of cpm_muram_init()Rasmus Villemoes2019-12-091-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | cpm_muram_alloc_common() tries to support a kind of lazy initialization - if the muram_pool has not been created yet, it calls cpm_muram_init(). Now, cpm_muram_alloc_common() is always called under spin_lock_irqsave(&cpm_muram_lock, flags); and cpm_muram_init() does gen_pool_create() (which implies a GFP_KERNEL allocation) and ioremap(), not to mention the fun that ensues from cpm_muram_init() doing spin_lock_init(&cpm_muram_lock); In other words, this has never worked, so nobody can have been relying on it. cpm_muram_init() is called from a subsys_initcall (either from cpm_init() in arch/powerpc/sysdev/cpm_common.c or, via qe_reset(), from qe_init() in drivers/soc/fsl/qe/qe.c). Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: make cpm_muram_free() ignore a negative offsetRasmus Villemoes2019-12-091-0/+3
| | | | | | | | | | | This allows one to simplify callers since they can store a negative value as a sentinel to indicate "this was never allocated" (or store the -ENOMEM from an allocation failure) and then call cpm_muram_free() unconditionally. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: make cpm_muram_free() return voidRasmus Villemoes2019-12-091-2/+1
| | | | | | | | | | | Nobody uses the return value from cpm_muram_free, and functions that free resources usually return void. One could imagine a use for a "how much have I allocated" a la ksize(), but knowing how much one had access to after the fact is useless. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: change return type of cpm_muram_alloc() to s32Rasmus Villemoes2019-12-091-13/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are a number of problems with cpm_muram_alloc() and its callers. Most callers assign the return value to some variable and then use IS_ERR_VALUE to check for allocation failure. However, when that variable is not sizeof(long), this leads to warnings - and it is indeed broken to do e.g. u32 foo = cpm_muram_alloc(); if (IS_ERR_VALUE(foo)) on a 64-bit platform, since the condition foo >= (unsigned long)-ENOMEM is tautologically false. There are also callers that ignore the possibility of error, and then there are those that check for error by comparing the return value to 0... One could fix that by changing all callers to store the return value temporarily in an "unsigned long" and test that. However, use of IS_ERR_VALUE() is error-prone and should be restricted to things which are inherently long-sized (stuff in pt_regs etc.). Instead, let's aim for changing to the standard kernel style int foo = cpm_muram_alloc(); if (foo < 0) deal_with_it() some->where = foo; Changing the return type from unsigned long to s32 (aka signed int) doesn't change the value that gets stored into any of the callers' variables except if the caller was storing the result in a u64 _and_ the allocation failed, so in itself this patch should be a no-op. Another problem with cpm_muram_alloc() is that it can certainly validly return 0 - and except if some cpm_muram_alloc_fixed() call interferes, the very first cpm_muram_alloc() call will return just that. But that shows that both ucc_slow_free() and ucc_fast_free() are buggy, since they assume that a value of 0 means "that field was never allocated". We'll later change cpm_muram_free() to accept (and ignore) a negative offset, so callers can use a sentinel of -1 instead of 0 and just unconditionally call cpm_muram_free(). Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: qe_io.c: use of_property_read_u32() in par_io_init()Rasmus Villemoes2019-12-091-4/+3
| | | | | | | | This is necessary for this to work on little-endian hosts. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: qe_io.c: access device tree property using be32_to_cpuRasmus Villemoes2019-12-091-4/+10
| | | | | | | | | We need to apply be32_to_cpu to make this work correctly on little-endian hosts. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: qe_io.c: don't open-code of_parse_phandle()Rasmus Villemoes2019-12-091-5/+2
| | | | | | Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: qe.c: use of_property_read_* helpersRasmus Villemoes2019-12-091-25/+8
| | | | | | | | | | | | | Instead of manually doing of_get_property/of_find_property and reading the value by assigning to a u32* or u64* and dereferencing, use the of_property_read_* functions. This make the code more readable, and more importantly, is required for this to work correctly on little-endian platforms. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: merge qe_ic.h headers into qe_ic.cRasmus Villemoes2019-12-092-101/+50
| | | | | | | | | | The public qe_ic.h header is no longer included by anything but qe_ic.c. Merge both headers into qe_ic.c, and drop the unused constants. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: simplify qe_ic_init()Rasmus Villemoes2019-12-091-23/+4
| | | | | | | | | | | | qe_ic_init() takes a flags parameter, but all callers (including the sole remaining one) have always passed 0. So remove that parameter and simplify the body accordingly. We still explicitly initialize the Interrupt Configuration Register (CICR) to its reset value of all-zeroes, just in case the bootloader has played funny games. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: make qe_ic_get_{low,high}_irq staticRasmus Villemoes2019-12-091-2/+2
| | | | | | | | These are only called from within qe_ic.c, so make them static. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: don't use NO_IRQ in qe_ic.cRasmus Villemoes2019-12-091-11/+10
| | | | | | | | | | | | | This driver is currently PPC-only, and on powerpc, NO_IRQ is 0, so this doesn't change functionality. However, not every architecture defines NO_IRQ, and some define it as -1, so the detection of a failed irq_of_parse_and_map() (which returns 0 on failure) would be wrong on those. So to prepare for allowing this driver to build on other architectures, drop all references to NO_IRQ. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: remove unused qe_ic_set_* functionsRasmus Villemoes2019-12-091-94/+0
| | | | | | | | | | | | | | | | There are no current callers of these functions, and they use the ppc-specific virq_to_hw(). So removing them gets us one step closer to building QE support for ARM. If the functionality is ever actually needed, the code can be dug out of git and then adapted to work on all architectures, but for future reference please note that I believe qe_ic_set_priority is buggy: The "priority < 4" should be "priority <= 4", and in the else branch 24 should be replaced by 28, at least if I'm reading the data sheet right. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: rename qe_ic_cascade_low_mpic -> qe_ic_cascade_lowRasmus Villemoes2019-12-091-4/+4
| | | | | | | | | | The qe_ic_cascade_{low,high}_mpic functions are now used as handlers both when the interrupt parent is mpic as well as ipic, so remove the _mpic suffix. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: move qe_ic_cascade_* functions to qe_ic.cRasmus Villemoes2019-12-091-0/+42
| | | | | | | | | | | | These functions are only ever called through a function pointer, and therefore it makes no sense for them to be "static inline" - gcc has no choice but to emit a copy in each translation unit that takes the address of one of these. Since they are now only referenced from qe_ic.c, just make them local to that file. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: move calls of qe_ic_init out of arch/powerpc/Rasmus Villemoes2019-12-091-3/+26
| | | | | | | | | | | | | | | | | | | | | | | Having to call qe_ic_init() from platform-specific code makes it awkward to allow building the QE drivers for ARM. It's also a needless duplication of code, and slightly error-prone: Instead of the caller needing to know the details of whether the QUICC Engine High and QUICC Engine Low are actually the same interrupt (see e.g. the machine_is() in mpc85xx_mds_qeic_init), just let the init function choose the appropriate handlers after it has parsed the DT and figured it out. If the two interrupts are distinct, use separate handlers, otherwise use the handler which first checks the CHIVEC register (for the high priority interrupts), then the CIVEC. All existing callers pass 0 for flags, so continue to do that from the new single caller. Later cleanups will remove that argument from qe_ic_init and simplify the body, as well as make qe_ic_init into a proper init function for an IRQCHIP_DECLARE, eliminating the need to manually look up the fsl,qe-ic node. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: remove pointless sysfs registration in qe_ic.cRasmus Villemoes2019-12-091-31/+0
| | | | | | | | | | There's no point in registering with sysfs when that doesn't actually allow any interaction with the device or driver (no uevents, no sysfs files that provide information or allow configuration, no nothing). Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: drop assign-only high_active in qe_ic_initRasmus Villemoes2019-12-091-4/+2
| | | | | | | | high_active is only assigned to but never used. Remove it. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: drop unneeded #includesRasmus Villemoes2019-12-092-7/+0
| | | | | | | | | | These includes are not actually needed, and asm/rheap.h and sysdev/fsl_soc.h are PPC-specific, hence prevent compiling QE for other architectures. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: qe.c: guard use of pvr_version_is() with CONFIG_PPC32Rasmus Villemoes2019-12-091-1/+9
| | | | | | | | | | | | | | | | | | | | Commit e5c5c8d23fef (soc/fsl/qe: only apply QE_General4 workaround on affected SoCs) introduced use of pvr_version_is(), saying The QE_General4 workaround is only valid for the MPC832x and MPC836x SoCs. The other SoCs that embed a QUICC engine are not affected by this hardware bug and thus can use the computed divisors (this was successfully tested on the T1040). I'm reading the above as saying that the errata does not apply to the ARM-based SOCs with QUICC engine. In any case, use of pvr_version_is() must be guarded by CONFIG_PPC32 before we can remove the PPC32 dependency from CONFIG_QUICC_ENGINE, so introduce qe_general4_errata() to keep the necessary #ifdeffery localized to a trivial helper. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: replace spin_event_timeout by readx_poll_timeout_atomicRasmus Villemoes2019-12-091-6/+7
| | | | | | | | | | In preparation for allowing QE to be built for architectures other than ppc, use the generic readx_poll_timeout_atomic() helper from iopoll.h rather than the ppc-only spin_event_timeout(). Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: avoid ppc-specific io accessorsRasmus Villemoes2019-12-099-123/+129
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for allowing to build QE support for architectures other than PPC, replace the ppc-specific io accessors by the qe_io* macros. Done via $ spatch --sp-file io.cocci --in-place drivers/soc/fsl/qe/ where io.cocci is @@ expression addr, val; @@ - out_be32(addr, val) + qe_iowrite32be(val, addr) @@ expression addr; @@ - in_be32(addr) + qe_ioread32be(addr) @@ expression addr, val; @@ - out_be16(addr, val) + qe_iowrite16be(val, addr) @@ expression addr; @@ - in_be16(addr) + qe_ioread16be(addr) @@ expression addr, val; @@ - out_8(addr, val) + qe_iowrite8(val, addr) @@ expression addr; @@ - in_8(addr) + qe_ioread8(addr) @@ expression addr, clr, set; @@ - clrsetbits_be32(addr, clr, set) + qe_clrsetbits_be32(addr, clr, set) @@ expression addr, clr, set; @@ - clrsetbits_be16(addr, clr, set) + qe_clrsetbits_be16(addr, clr, set) @@ expression addr, clr, set; @@ - clrsetbits_8(addr, clr, set) + qe_clrsetbits_8(addr, clr, set) @@ expression addr, set; @@ - setbits32(addr, set) + qe_setbits_be32(addr, set) @@ expression addr, set; @@ - setbits16(addr, set) + qe_setbits_be16(addr, set) @@ expression addr, set; @@ - setbits8(addr, set) + qe_setbits_8(addr, set) @@ expression addr, clr; @@ - clrbits32(addr, clr) + qe_clrbits_be32(addr, clr) @@ expression addr, clr; @@ - clrbits16(addr, clr) + qe_clrbits_be16(addr, clr) @@ expression addr, clr; @@ - clrbits8(addr, clr) + qe_clrbits_8(addr, clr) Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: rename qe_(clr/set/clrset)bit* helpersRasmus Villemoes2019-12-091-5/+5
| | | | | | | | | | Make it clear that these operate on big-endian registers (i.e. use the iowrite*be primitives) before we introduce more uses of them and allow the QE drivers to be built for platforms other than ppc32. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: drop volatile qualifier of struct qe_ic::regsRasmus Villemoes2019-12-092-3/+3
| | | | | | | | | | | The actual io accessors (e.g. in_be32) implicitly add a volatile qualifier to their address argument. Remove volatile from the struct definition and the qe_ic_(read/write) helpers, in preparation for switching from the ppc-specific io accessors to generic ones. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: remove space-before-tabRasmus Villemoes2019-12-091-2/+2
| | | | | | Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* Merge tag 'armsoc-drivers' of ↵Linus Torvalds2019-09-161-98/+65
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "This contains driver changes that are tightly connected to SoC specific code. Aside from smaller cleanups and bug fixes, here is a list of the notable changes. New device drivers: - The Turris Mox router has a new "moxtet" bus driver for its on-board pluggable extension bus. The same platform also gains a firmware driver. - The Samsung Exynos family gains a new Chipid driver exporting using the soc device sysfs interface - A similar socinfo driver for Qualcomm Snapdragon chips. - A firmware driver for the NXP i.MX DSP IPC protocol using shared memory and a mailbox Other changes: - The i.MX reset controller driver now supports the NXP i.MX8MM chip - Amlogic SoC specific drivers gain support for the S905X3 and A311D chips - A rework of the TI Davinci framebuffer driver to allow important cleanups in the platform code - A couple of device drivers for removed ARM SoC platforms are removed. Most of the removals were picked up by other maintainers, this contains whatever was left" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (123 commits) bus: uniphier-system-bus: use devm_platform_ioremap_resource() soc: ti: ti_sci_pm_domains: Add support for exclusive and shared access dt-bindings: ti_sci_pm_domains: Add support for exclusive and shared access firmware: ti_sci: Allow for device shared and exclusive requests bus: imx-weim: remove incorrect __init annotations fbdev: remove w90x900/nuc900 platform drivers spi: remove w90x900 driver net: remove w90p910-ether driver net: remove ks8695 driver firmware: turris-mox-rwtm: Add sysfs documentation firmware: Add Turris Mox rWTM firmware driver dt-bindings: firmware: Document cznic,turris-mox-rwtm binding bus: moxtet: fix unsigned comparison to less than zero bus: moxtet: remove set but not used variable 'dummy' ARM: scoop: Use the right include dt-bindings: power: add Amlogic Everything-Else power domains bindings soc: amlogic: Add support for Everything-Else power domains controller fbdev: da8xx: use resource management for dma fbdev: da8xx-fb: drop a redundant if fbdev: da8xx-fb: use devm_platform_ioremap_resource() ...
| * Merge tag 'soc-fsl-next-v5.3-2' of ↵Olof Johansson2019-07-211-98/+65
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers NXP/FSL SoC driver updates for v5.3 (take 2) DPAA2 Console driver - Add driver to export two char devices to dump logs for MC and AIOP DPAA2 DPIO driver - Add support for memory backed QBMan portals - Increase the timeout period to prevent false error - Add APIs to retrieve QBMan portal probing status DPAA Qman driver - Only make liodn fixup on powerpc SoCs with PAMU iommu QUICC Engine - Add support for importing qe-snums through device tree - Some cleanups and foot print optimzation * tag 'soc-fsl-next-v5.3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux: soc: fsl: qe: fold qe_get_num_of_snums into qe_snums_init soc: fsl: qe: support fsl,qe-snums property dt-bindings: soc: fsl: qe: document new fsl,qe-snums binding soc: fsl: qe: introduce qe_get_device_node helper soc: fsl: qe: reduce static memory footprint by 1.7K soc: fsl: qe: drop useless static qualifier soc: fsl: fix spelling mistake "Firmaware" -> "Firmware" Link: https://lore.kernel.org/r/20190605194511.12127-1-leoyang.li@nxp.com Signed-off-by: Olof Johansson <olof@lixom.net>
| | * soc: fsl: qe: fold qe_get_num_of_snums into qe_snums_initRasmus Villemoes2019-06-051-30/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The comment "No QE ever has fewer than 28 SNUMs" is false; e.g. the MPC8309 has 14. The code path returning -EINVAL is also a recipe for instant disaster, since the caller (qe_snums_init) uncritically assigns the return value to the unsigned qe_num_of_snum, and would thus proceed to attempt to copy 4GB from snum_init_46[] to the snum[] array. So fold the handling of the legacy fsl,qe-num-snums into qe_snums_init, and make sure we do not end up using the snum_init_46 array in cases other than the two where we know it makes sense. Reviewed-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * soc: fsl: qe: support fsl,qe-snums propertyRasmus Villemoes2019-06-051-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver support for the newly introduced fsl,qe-snums property. Conveniently, of_property_read_variable_u8_array does exactly what we need: If the property fsl,qe-snums is found (and has an allowed size), the array of values get copied to snums, and the return value is the number of snums - we cannot assign directly to num_of_snums, since we need to check whether the return value is negative. Reviewed-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * soc: fsl: qe: introduce qe_get_device_node helperRasmus Villemoes2019-06-051-42/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 'try of_find_compatible_node(NULL, NULL, "fsl,qe"), fall back to of_find_node_by_type(NULL, "qe")' pattern is repeated five times. Factor it into a common helper. Reviewed-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * soc: fsl: qe: reduce static memory footprint by 1.7KRasmus Villemoes2019-06-051-30/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current array of struct qe_snum use 256*4 bytes for just keeping track of the free/used state of each index, and the struct layout means there's another 768 bytes of padding. If we just unzip that structure, the array of snum values just use 256 bytes, while the free/inuse state can be tracked in a 32 byte bitmap. So this reduces the .data footprint by 1760 bytes. It also serves as preparation for introducing another DT binding for specifying the snum values. Reviewed-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * soc: fsl: qe: drop useless static qualifierRasmus Villemoes2019-06-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The local variable snum_init has no reason to have static storage duration. Reviewed-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* | | docs: powerpc: convert docs to ReST and rename to *.rstMauro Carvalho Chehab2019-07-171-1/+1
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert docs to ReST and add them to the arch-specific book. The conversion here was trivial, as almost every file there was already using an elegant format close to ReST standard. The changes were mostly to mark literal blocks and add a few missing section title identifiers. One note with regards to "--": on Sphinx, this can't be used to identify a list, as it will format it badly. This can be used, however, to identify a long hyphen - and "---" is an even longer one. At its new index.rst, let's add a :orphan: while this is not linked to the main index.rst file, in order to avoid build warnings. Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> # cxl
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 206Thomas Gleixner2019-05-301-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of version 2 of the gnu general public license as published by the free software foundation extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 107 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190528171438.615055994@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152Thomas Gleixner2019-05-3010-50/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2019-05-211-0/+1
|/ | | | | | | | | | | | | | Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* soc/fsl/qe: Fix an error code in qe_pin_request()Dan Carpenter2019-04-021-1/+3
| | | | | | | | We forgot to set "err" on this error path. Fixes: 1a2d397a6eb5 ("gpio/powerpc: Eliminate duplication of of_get_named_gpio_flags()") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc/fsl/qe: fix err handling of ucc_of_parse_tdmWen Yang2019-01-041-55/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently there are some issues with the ucc_of_parse_tdm function: 1, a possible null pointer dereference in ucc_of_parse_tdm, detected by the semantic patch deref_null.cocci, with the following warning: drivers/soc/fsl/qe/qe_tdm.c:177:21-24: ERROR: pdev is NULL but dereferenced. 2, dev gets modified, so in any case that devm_iounmap() will fail even when the new pdev is valid, because the iomap was done with a different pdev. 3, there is no driver bind with the "fsl,t1040-qe-si" or "fsl,t1040-qe-siram" device. So allocating resources using devm_*() with these devices won't provide a cleanup path for these resources when the caller fails. This patch fixes them. Suggested-by: Li Yang <leoyang.li@nxp.com> Suggested-by: Christophe LEROY <christophe.leroy@c-s.fr> Signed-off-by: Wen Yang <wen.yang99@zte.com.cn> Reviewed-by: Peng Hao <peng.hao2@zte.com.cn> CC: Julia Lawall <julia.lawall@lip6.fr> CC: Zhao Qiang <qiang.zhao@nxp.com> CC: David S. Miller <davem@davemloft.net> CC: netdev@vger.kernel.org CC: linuxppc-dev@lists.ozlabs.org CC: linux-kernel@vger.kernel.org Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge tag 'armsoc-drivers' of ↵Linus Torvalds2018-10-291-5/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Arnd Bergmann: "The most noteworthy SoC driver changes this time include: - The TEE subsystem gains an in-kernel interface to access the TEE from device drivers. - The reset controller subsystem gains a driver for the Qualcomm Snapdragon 845 Power Domain Controller. - The Xilinx Zynq platform now has a firmware interface for its platform management unit. This contains a firmware "ioctl" interface that was a little controversial at first, but the version we merged solved that by not exposing arbitrary firmware calls to user space. - The Amlogic Meson platform gains a "canvas" driver that is used for video processing and shared between different high-level drivers. The rest is more of the usual, mostly related to SoC specific power management support and core drivers in drivers/soc: - Several Renesas SoCs (RZ/G1N, RZ/G2M, R-Car V3M, RZ/A2M) gain new features related to power and reset control. - The Mediatek mt8183 and mt6765 SoC platforms gain support for their respective power management chips. - A new driver for NXP i.MX8, which need a firmware interface for power management. - The SCPI firmware interface now contains support estimating power usage of performance states - The NVIDIA Tegra "pmc" driver gains a few new features, in particular a pinctrl interface for configuring the pads. - Lots of small changes for Qualcomm, in particular the "smem" device driver. - Some cleanups for the TI OMAP series related to their sysc controller. Additional cleanups and bugfixes in SoC specific drivers include the Meson, Keystone, NXP, AT91, Sunxi, Actions, and Tegra platforms" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (129 commits) firmware: tegra: bpmp: Implement suspend/resume support drivers: clk: Add ZynqMP clock driver dt-bindings: clock: Add bindings for ZynqMP clock driver firmware: xilinx: Add zynqmp IOCTL API for device control Documentation: xilinx: Add documentation for eemi APIs MAINTAINERS: imx: include drivers/firmware/imx path firmware: imx: add misc svc support firmware: imx: add SCU firmware driver support reset: Fix potential use-after-free in __of_reset_control_get() dt-bindings: arm: fsl: add scu binding doc soc: fsl: qbman: add interrupt coalesce changing APIs soc: fsl: bman_portals: defer probe after bman's probe soc: fsl: qbman: Use last response to determine valid bit soc: fsl: qbman: Add 64 bit DMA addressing requirement to QBMan soc: fsl: qbman: replace CPU 0 with any online CPU in hotplug handlers soc: fsl: qbman: Check if CPU is offline when initializing portals reset: qcom: PDC Global (Power Domain Controller) reset controller dt-bindings: reset: Add PDC Global binding for SDM845 SoCs reset: Grammar s/more then once/more than once/ bus: ti-sysc: Just use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS ...
| * Merge tag 'soc-fsl-fix-v4.19-2' into HEADLi Yang2018-10-051-1/+1
| |\ | | | | | | | | | | | | | | | NXP/FSL SoC driver fixes for v4.19 round 2 - Fix crash of qman_portal by deferring its probe if qman is not probed
| * | soc: fsl/qe: Use of_get_child_by_name helperRob Herring2018-08-301-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the of_get_child_by_name() helper instead of open coding searching for the 'firmware' child node. This removes directly accessing the name pointer as well. Cc: Qiang Zhao <qiang.zhao@nxp.com> Cc: Li Yang <leoyang.li@nxp.com> Cc: linuxppc-dev@lists.ozlabs.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Qiang Zhao <qiang.zhao@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* | | Merge tag 'devicetree-for-4.20' of ↵Linus Torvalds2018-10-261-2/+2
|\ \ \ | |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull Devicetree updates from Rob Herring: "A bit bigger than normal as I've been busy this cycle. There's a few things with dependencies and a few things subsystem maintainers didn't pick up, so I'm taking them thru my tree. The fixes from Johan didn't get into linux-next, but they've been waiting for some time now and they are what's left of what subsystem maintainers didn't pick up. Summary: - Sync dtc with upstream version v1.4.7-14-gc86da84d30e4 - Work to get rid of direct accesses to struct device_node name and type pointers in preparation for removing them. New helpers for parsing DT cpu nodes and conversions to use the helpers. printk conversions to %pOFn for printing DT node names. Most went thru subystem trees, so this is the remainder. - Fixes to DT child node lookups to actually be restricted to child nodes instead of treewide. - Refactoring of dtb targets out of arch code. This makes the support more uniform and enables building all dtbs on c6x, microblaze, and powerpc. - Various DT binding updates for Renesas r8a7744 SoC - Vendor prefixes for Facebook, OLPC - Restructuring of some ARM binding docs moving some peripheral bindings out of board/SoC binding files - New "secure-chosen" binding for secure world settings on ARM - Dual licensing of 2 DT IRQ binding headers" * tag 'devicetree-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (78 commits) ARM: dt: relicense two DT binding IRQ headers power: supply: twl4030-charger: fix OF sibling-node lookup NFC: nfcmrvl_uart: fix OF child-node lookup net: stmmac: dwmac-sun8i: fix OF child-node lookup net: bcmgenet: fix OF child-node lookup drm/msm: fix OF child-node lookup drm/mediatek: fix OF sibling-node lookup of: Add missing exports of node name compare functions dt-bindings: Add OLPC vendor prefix dt-bindings: misc: bk4: Add device tree binding for Liebherr's BK4 SPI bus dt-bindings: thermal: samsung: Add SPDX license identifier dt-bindings: clock: samsung: Add SPDX license identifiers dt-bindings: timer: ostm: Add R7S9210 support dt-bindings: phy: rcar-gen2: Add r8a7744 support dt-bindings: can: rcar_can: Add r8a7744 support dt-bindings: timer: renesas, cmt: Document r8a7744 CMT support dt-bindings: watchdog: renesas-wdt: Document r8a7744 support dt-bindings: thermal: rcar: Add device tree support for r8a7744 Documentation: dt: Add binding for /secure-chosen/stdout-path dt-bindings: arm: zte: Move sysctrl bindings to their own doc ...
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