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path: root/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
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* Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netDavid S. Miller2019-11-161-2/+2
|\ | | | | | | | | | | | | Lots of overlapping changes and parallel additions, stuff like that. Signed-off-by: David S. Miller <davem@davemloft.net>
| * octeontx2-af: Use the correct style for SPDX License IdentifierNishad Kamdar2019-11-161-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch corrects the SPDX License Identifier style in header files related to Marvell OcteonTX2 network devices. It uses an expilict block comment for the SPDX License Identifier. Changes made by using a script provided by Joe Perches here: https://lkml.org/lkml/2019/2/7/46. Suggested-by: Joe Perches <joe@perches.com> Signed-off-by: Nishad Kamdar <nishadkamdar@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | octeontx2-af: Start/Stop traffic in CGX along with NPCSubbaraya Sundeep2019-11-141-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Traffic for a CGX mapped NIXLF can be stopped by disabling entries in NPC MCAM or by configuring CGX and mailbox messages exist for the two options. If traffic is stopped at CGX then VFs of that PF are also effected hence CGX traffic should be started/stopped by tracking all the users of it. This patch implements that CGX users tracking. CGX is also configured along with NPC if required. Also removed a check which mandates even number of LBK VFs. Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | octeontx2-af: Enable broadcast packet replicationSunil Goutham2019-11-141-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ingress packet replication support has been added to 96xx B0 silicon. This patch enables using that feature to replicate ingress broadcast packets to PF and it's VFs. Also fixed below issues - VFs can also install NPC MCAM entry to forward broadcast pkts. Otherwise, unless PF's interface is UP, VFs will not receive bcast packets. - NPC MCAM entry is disabled when PF and all it's VFs are down. - Few corner cases in installing multicast entry list. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | octeontx2-af: Support fixed transmit scheduler topologySunil Goutham2019-11-141-3/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CN96xx initial silicon doesn't support all features pertaining to NIX transmit scheduling and shaping. - It supports a fixed topology of 1:1 mapped transmit limiters at all levels. - Supports DWRR only at SMQ/MDQ and TL1. - Doesn't support shaping and coloring. This patch adds HW capability structure by which each variant and skew of silicon can be differentiated by their supported features. And adds support for A0 silicon's transmit scheduler capabilities or rather limitations. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | octeontx2-af: Add macro to generate mbox handlers declarationsSubbaraya Sundeep2019-11-141-122/+5
| | | | | | | | | | | | | | | | | | | | For every mailbox handler added to rvu, we are adding a function declaration in rvu header file. Cleaned this up by adding a macro to generate these declarations automatically. Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | octeontx2-af: Add mbox API to validate all responsesSunil Goutham2019-11-141-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added a new mailbox API which goes through all responses to check their IDs and response codes. Also added logic to prevent queuing multiple works to process the same mailbox message. This scenario happens when AF is processing a PF's request and menawhile PF sends ACK to AF sent UP message, then mbox_hdr->num_msgs in the PF->AF DOWN mbox region will be nonzero and AF will end up processing PF's request again. This is fixed by taking a backup of num_msgs counter and clearing the same in the mbox region before scheduling work. Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | octeontx2-af: Add NPC MCAM entry allocation status to debugfsSunil Goutham2019-11-141-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added support to display current NPC MCAM entries and counter's allocation status ín debugfs. cat /sys/kernel/debug/octeontx2/npc/mcam_info' will dump following info - MCAM Rx and Tx keysize - Total MCAM entries and counters - Current available count - Count of number of MCAM entries and counters allocated by a RVU PF/VF device. Also, one NPC MCAM counter (last one) is reserved and mapped to NPC RX_INTF's MISS_ACTION to count dropped packets due to no MCAM entry match. This pkt drop counter can be checked via debugfs. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | octeontx2-af: Add per CGX port level NIX Rx/Tx countersLinu Cherian2019-11-141-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | A CGX port is shared by a RVU PF and it's VFs. These per CGX port level NIX Rx/Tx counters are cumilative stats of all NIXLFs sharing this port. These stats when compared to CGX Rx/Tx stats helps in identifying pkts dropped within the system, if any. Signed-off-by: Linu Cherian <lcherian@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | octeontx2-af: Add CGX LMAC stats to debugfsPrakash Brahmajyosyula2019-11-141-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds CGX LMAC physical interface or serdes Rx/Tx packet stats to debugfs. 'cat cgx<idx>/lmac<idx>/stats' dumps the current interface link status and Rx/Tx stats. Stats include pkt received/transmitted, dropped, pause frames etc etc. Signed-off-by: Prakash Brahmajyosyula <bprakash@marvell.com> Signed-off-by: Linu Cherian <lcherian@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | octeontx2-af: Add NIX RQ, SQ and CQ contexts to debugfsPrakash Brahmajyosyula2019-11-141-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To aid in debugging NIX block related issues, added support to dump NIX block LF's RQ, SQ and CQ hardware contexts in debugfs. User can check which contexts are enabled currently and dump it's current HW context. Four new files 'qsize', 'rq_ctx', 'sq_ctx' and 'cq_ctx' are added to the debugfs at 'sys/kernel/debug/octeontx2/nix/' 'echo <nixlf index> > qsize' will display current enabled CQ/SQ/RQs. 'echo <nixlf> [rq number/all] > rq_ctx', 'echo <nixlf> [sq number/all] > sq_ctx' & 'echo <nixlf> [cq number/all] > cq_ctx' will dump RQ/SQ/CQ's current hardware context. Signed-off-by: Prakash Brahmajyosyula <bprakash@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | octeontx2-af: Add NPA aura and pool contexts to debugfsChristina Jacob2019-11-141-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To aid in debugging NPA related issues, added support to dump NPA (pool allocator) block LF's aura and pool hardware contexts in debugfs. User can check which contexts are enabled currently and dump it's current HW context. Three new files 'qsize', 'aura_ctx', 'pool_ctx' are added to the debugfs at 'sys/kernel/debug/octeontx2/npa/' 'echo <npalf index> > qsize' will display current enabled Aura/Pools. 'echo <npalf> [aura number/all] > aura_ctx' & 'echo <npalf> [aura number/all] > pool_ctx' will dump Aura/Pool context info. Signed-off-by: Christina Jacob <cjacob@marvell.com> Signed-off-by: Prakash Brahmajyosyula <bprakash@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | octeontx2-af: Dump current resource provisioning statusChristina Jacob2019-11-141-0/+18
|/ | | | | | | | | | | | | | | Added support to dump current resource provisioning status of all resource virtualization unit (RVU) block's (i.e NPA, NIX, SSO, SSOW, CPT, TIM) local functions attached to a PF_FUNC into a debugfs file. 'cat /sys/kernel/debug/octeontx2/rsrc_alloc' will show the current block LF's allocation status. Signed-off-by: Christina Jacob <cjacob@marvell.com> Signed-off-by: Prakash Brahmajyosyula <bprakash@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Enable mkex profileVamsi Attunuru2018-12-031-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following set of NPC registers allow the driver to configure NPC to generate different key value schemes to compare against packet payload in MCAM search. NPC_AF_INTF(0..1)_KEX_CFG NPC_AF_KEX_LDATA(0..1)_FLAGS_CFG NPC_AF_INTF(0..1)_LID(0..7)_LT(0..15)_LD(0..1)_CFG NPC_AF_INTF(0..1)_LDATA(0..1)_FLAGS(0..15)_CFG Currently, the AF driver populates these registers to configure the default values to address the most common use cases such as key generation for channel number + DMAC. The secure firmware stores different configuration value of these registers to enable different NPC use case along with the name for the lookup. Patch loads profile binary from secure firmware over the exiting CGX mailbox interface and apply the profile. AF driver shall fall back to the default configuration in case of any errors. The AF consumer driver can know the selected profile on response to NPC_GET_KEX_CFG mailbox by introducing mkex_pfl_name in the struct npc_get_kex_cfg_rsp. Signed-off-by: Vamsi Attunuru <vamsi.attunuru@marvell.com> Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Add LSO format configuration mailboxNithin Dabilpuram2018-12-031-1/+9
| | | | | | | | | | | | | | | | | | | NIX_AF_LSO_FORMAT(0..31)_FIELD(0..7) register enables an SW defined means to define LSO packet modification formats. 0..31 works as an index to choose the algorithm, On success, the mailbox returns the index to the client of chosen LSO algorithm selection. This index will be used in configuring the transmit descriptors. Add mailbox interface to dynamically reserve and configure LSO format. This commit also fixes 'sizem1' for NIX_LSOALG_TCP_FLAGS to '1' i.e 2 Bytes. Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Add L3 and L4 packet verification mailboxVidhya Raman2018-12-031-0/+3
| | | | | | | | | Adds mailbox support for L4 checksum verification and L3 and L4 length verification configuration. Signed-off-by: Vidhya Raman <vraman@marvell.com> Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Add support for Tx packet markingKrzysztof Kanas2018-12-031-0/+12
| | | | | | | | | | | | | | | | | | | | | | | NIX_AF_MARK_FORMAT(0..127)_CTL register enables an SW defined means to mark/insert various data in the packet based on final packet color from traffic shaping HW. 0..127 works as an index to choose the algorithm. On success, the mailbox returns the index to the client. Add NIX_MARK_FORMAT_CFG mailbox which reserves mark format based on tuple (offset, y_mask, y_val, r_mask, r_val) If the tuple is requested again for mark format that was already reserved, then it will be reused. If not it will reserve a new entry if space is available. Also on AF init commonly used marker format such as VLAN DEI, IPv4 ECN, IPv4 DSCP are reserved for AF consumers. Signed-off-by: Krzysztof Kanas <kkanas@marvell.com> Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Restrict TL1 allocation and configurationNithin Dabilpuram2018-12-031-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | TL1 is the root node in the scheduling hierarchy and it is a global resource with a limited number. This patch introduces restriction and validation on the allocation of the TL1 nodes for the effective resource sharing across the AF consumers. - Limit TL1 allocation to 2 per lmac. One could be for the normal link and one for IEEE802.3br express link (Express Send DMA). Effectively all the VF's of an RVU PF(lmac) share the two TL1 schqs. - TL1 cannot be freed once allocated. - Allow VF's to only apply default config to TL1 if not already applied. PF's can always overwrite the TL1 config. - Consider NIX_AQ_INSTOP_WRITE while validating txschq when sq.ena is set. Signed-off-by: Krzysztof Kanas <kkanas@marvell.com> Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com> Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Add support for runtime RSS algo index reservationJerin Jacob2018-12-031-0/+7
| | | | | | | | | | | | | | | | | Introduced reserve_flowkey_alg_idx()to reserve RSS algorithm index, it would internally use set_flowkey_fields() to generate fields based on the flow key dynamically. On AF driver init, it would reserve a predefined set RSS algo indexes, which will be available all the time for all the AF driver consumers. The leftover algo indexes can be reserved at runtime through exiting nix_rss_flowkey_cfg mailbox message. The NIX_FLOW_KEY_TYPE_PORT is removed from predefined a set of RSS flow type as it is not used by any consumer. Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Add response for RSS flow key cfg messageJerin Jacob2018-12-031-1/+1
| | | | | | | | | | | | | | | Added response for nix_rss_flowkey_cfg message to return selected RSS algorithm index. The FLOW_KEY_TYPE* definition is part of the mbox message and it will be used by the other consumers of AF driver hence moving to mbox.h. Also renamed FLOW_* definitions to NIX_FLOW_* to avoid global name space collisions, as we have various coming from include/uapi/linux/pkt_cls.h for example. Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Handle non-contiguous CGX LMAC interfacesLinu Cherian2018-11-231-1/+1
| | | | | | | | | | | | | | | For this, cgx_id(struct cgx) definition has been changed to reflect cgx port id instead of device instance id. Now cgx_id can be directly used as channel offset for NPC configuration. Assumptions on contiguous cgx port ids has been removed from nix_calibrate_x2p as well. As a side effect, allocation of conversion tables that were based on cgx count are changed to cgx port id max value. Tables would return NULL for invalid cgx ports. Signed-off-by: Linu Cherian <lcherian@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Misc cleanups in cgx driverLinu Cherian2018-11-231-2/+2
| | | | | | | | | | | | | | | * Do CGX init before NIX init This would add consistency in NIX code that depends on cgx ports * Few other misc cleanups - rvu_cgx_probe renamed as rvu_cgx_init for consistency - rvu_cgx_exit wrapper added to take care of the exit path - Added error check on cgx_lmac_event_handler_init - Minor cleanups in cgx.h related to tab alignment - Removed redundant ids from enum cgx_cmd_id Signed-off-by: Linu Cherian <lcherian@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Workarounds for HW errataSunil Goutham2018-11-191-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | Errata 35038 Software sets NIX_AF_RX_SW_SYNC[ENA] to sync (flush) in-flight packets the RX data path before configuration changes (e.g. disabling one or more RQs). Hardware clears [ENA] to indicate sync is done An issue exists whereby NIX may clear NIX_AF_RX_SW_SYNC [ENA] too early. Errata 35057 NIX may corrupt internal state when conditional clocks turn off. So turnon all clocks by default. Errata 35786 Parse nibble enable NPC configuration for KEY generation has to be identical for both Rx and Tx interfaces. Also corrected endianness configuration for NIX i.e NIX_AF_CFG[AF_BE] is bit8 and not bit1. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Configure AF VFs to talk over LBK channelsTomasz Duszynski2018-11-191-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Configure AF VFs such that they are able to talk over consecutive loopback channels. If 8 VFs are attached to AF then communication will work as below: TX RX lbk0 -> lbk1 lbk1 -> lbk0 lbk2 -> lbk3 lbk3 -> lbk2 lbk4 -> lbk5 lbk5 -> lbk4 lbk6 -> lbk7 lbk7 -> lbk6 Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Enable sriov on AF to create VFsTomasz Duszynski2018-11-191-1/+2
| | | | | | | | | | | | | Enable all AF VFs during probe. Since AF's VFs work in pairs (eg: Pkts sent on VF0 are received by VF1 and viceversa), enable only even number of VFs out of totalVFs, which should again be less than number of loopback (LBK) channels. Also enable VF's mailbox interrupts. Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Mbox communication support btw AF and it's VFsTomasz Duszynski2018-11-191-5/+12
| | | | | | | | | | | | | | | | | | VFs attached to PFs other than AF can not communicate with AF directly. Instead they are supposed to first send message to the PF they are residing on and PF forwards it to the AF. Responses to messages are handled in the reverse order. On the other hand if VFs are on AF (PF0) itself then direct mailbox communication is possible since there's no other PF in the way. This patch addresses this particular case and adds support for handling it. Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Marko Kallio <mkallio@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Teardown NPA, NIX LF upon receiving FLRGeetha sowjanya2018-11-191-0/+2
| | | | | | | | | | | | | | | | | | | | | Upon receiving FLR IRQ for a RVU PF, teardown or cleanup resources held by that PF_FUNC. This patch cleans up, NIX LF - Stop ingress/egress traffic - Disable NPC MCAM entries being used. - Free Tx scheduler queues - Disable RQ/SQ/CQ HW contexts NPA LF - Disable Pool/Aura HW contexts In future teardown of SSO/SSOW/TIM/CPT will be added. Also added a mailbox message for a RVU PF to request AF, to perform FLR for a RVU VF under it. Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Stanislaw Kardach <skardach@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Add FLR interrupt handlerGeetha sowjanya2018-11-191-0/+5
| | | | | | | | | | | | | | | | RVU admin function (AF) has all the priviliges to cleanup HW state when VFIO triggers a PCIe function level reset (FLR) due to either reset or a VM crash. FLR for RVU PF1-PFn will trigger an IRQ to AF. This patch enables all RVU PF's FLR interrupts and registers a handler. Upon receiving an interrupt, a workqueue is scheduled to cleanup all hardware blocks being used by the PF which received the FLR. Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Verify NPA/SSO/NIX PF_FUNC mappingSunil Goutham2018-11-191-0/+1
| | | | | | | | | While mapping a NIX LF to a NPA LF attached PF_FUNC or SSO LF attached PF_FUNC, verify if PF_FUNC is valid and if that PF_FUNC has a LF of that block attached to it or not. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Add support for stripping STAG/CTAGTomasz Duszynski2018-11-191-0/+8
| | | | | | | | | | | | | | | | | | | | This works by shadowing existing UCAST MCAM entry with a new one additionally matching either NPC_LT_LB_CTAG or NPC_LT_LB_STAG. For this to fully work one needs to send properly configured NIX_VTAG_CFG message afterwards i.e with strip and capture enabled and type set to 0. On receiving tagged packet NIX will remove outer VLAN and capture TCI in NIX_RX_PARSE_S. Also simplified RX Vtag configuration flow With this setting STRIP/CAPTURE VTAG actions separately would be possible. Following combinations are possible: STRIP, STRIP and CAPTURE, CAPTURE or nothing (0 disables respective actions). Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Support to enable/disable default MCAM entriesSunil Goutham2018-11-191-0/+7
| | | | | | | | | | | | | For a PF/VF with a NIXLF attached has default/reserved MCAM entries for receiving Ucast/Bcast/Promisc traffic. Ideally traffic should be forwarded to NIXLF only after it's contexts are initialized. This patch keeps these default entries disabled and adds mbox messages for a PF/VF to enable these once NPA/NIXLF initialization is done. Likewise while PF/VF is being teared down, it can send the disable mailbox message to stop receiving traffic. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Add MKEX default profileSantosh Shukla2018-11-191-0/+2
| | | | | | | | | | | | | | | | | Added basic default MKEX profile. This profile tells hardware what data to extract from packet and where to place it (bit offset) in final KEY generated for the parsed packet. Based on the bit placement of the packet data, MCAM entries have to programmed for matching. Also added a msg to retrieve this MKEX profile from PF/VF which inturn can process it to determine how MCAM entry has to be populated. Signed-off-by: Santosh Shukla <sshukla@marvell.com> Signed-off-by: Yuri Tolstov <ytolstov@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Alloc and config NPC MCAM entry at a timeSunil Goutham2018-11-191-0/+3
| | | | | | | | | | A new mailbox message is added to support allocating a MCAM entry along with a counter and configuring it in one go. This reduces the amount of mailbox communication involved in installing a new MCAM rule. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Map or unmap NPC MCAM entry and counterSunil Goutham2018-11-191-0/+4
| | | | | | | | | | | | | | Alloc memory to save MCAM 'entry to counter' mapping and since multiple entries can map to same counter, added counter's reference count tracking. Do 'entry to counter' mapping when a entry is being installed and mbox msg sender requested to configure a counter as well. Mapping is removed when a entry or counter is being freed or a explicit mbox msg is received to unmap them. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Support for NPC MCAM countersSunil Goutham2018-11-191-0/+10
| | | | | | | | | | | | | NPC HW has counters which can be mapped to MCAM entries to gather entry match statistics. This patch adds support to allocate, free, clear and retrieve stats of NPC MCAM counters. New mailbox messages have been added for this. Similar to MCAM entries both contiguous and non-contiguous counter allocation is supported. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: MCAM entry installation supportSunil Goutham2018-11-191-0/+12
| | | | | | | | | | | | | | | | Add support for a RVU PF/VF to enable, disable, configure and shuffle MCAM entries via mbox commands. This patch adds mailbox message formats and handling of these commands. As of now otherthan validating MCAM entry index, info like channel number e.t.c in MCAM config data sent by PF/VF are not validated. Also a max of 64 MCAM entries can be shuffled with a single mbox command. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: NPC MCAM entry alloc/free supportSunil Goutham2018-11-191-1/+18
| | | | | | | | | | | | | | This patch adds NPC MCAM entry management and support for allocating and freeing them via mailbox. Both contiguous and non-contiguous allocations are supported. Incase of contiguous, if request cannot be met then max contiguous number of available entries are allocated. High or low priority index allocation w.r.t a reference MCAM index is also supported. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Relax resource lock into mutexStanislaw Kardach2018-11-191-3/+3
| | | | | | | | | | | Mailbox message handling is done in a workqueue context scheduled from interrupt handler. So resource locks does not need to be a spinlock. Therefore relax them into a mutex so that later on we may use them in routines that might sleep. Signed-off-by: Stanislaw Kardach <skardach@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Support to modify min/max allowed packet lengthsSunil Goutham2018-11-191-0/+4
| | | | | | | | | | | | | | This patch adds support for RVU PF/VFs to modify min/max packet lengths allowed by HW. For VFs on PF0, settings will be automatically applied on LBK link. RX link's min/maxlen is configured to min/max of PF and it's all VFs. On the TX side if requested all SMQs attached to the requesting NIXLF will be updated with new min/max lengths. Also updates transmit credits for Tx links based on new maxlen. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Convert mbox handlers APIs to lowercaseSunil Goutham2018-11-191-28/+28
| | | | | | | | This patch converts all mailbox message handler API names to lowercase. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Support for NIXLF's UCAST/PROMISC/ALLMULTI modesSunil Goutham2018-10-221-0/+5
| | | | | | | | | | | | | | | By default NIXLF is set in UCAST mode. This patch adds a new mailbox message which when sent by a RVU PF changes this default mode. When promiscuous mode is needed, the reserved promisc entry for each of RVU PF is setup to match against ingress channel number only, so that all pkts on that channel are accepted and forwarded to the mode change requesting PF_FUNC's NIXLF. PROMISC and ALLMULTI modes are supported only for PFs, for VFs only UCAST mode is supported. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Support for setting MAC addressSunil Goutham2018-10-221-0/+3
| | | | | | | | | Added a new mailbox message for a PF/VF to set/update it's NIXLF's MAC address. Also updates unicast NPC MCAM entry with this address as matching DMAC. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Support for changing RSS algorithmSunil Goutham2018-10-221-0/+5
| | | | | | | | | | | | | | This patch adds support for a RVU PF/VF to change NIX Rx flowkey algorithm index in NPC RX RSS_ACTION. eg: a ethtool command changing RSS algorithm for a netdev interface would trigger this change in NPC. If PF/VF doesn't specify any MCAM entry index then default UCAST entry of the NIXLF attached to PF/VF will be updated with RSS_ACTION and flowkey index. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Install ucast and bcast pkt forwarding rulesSunil Goutham2018-10-221-0/+5
| | | | | | | | | | | | | | | | | | | Upon NIXLF_ALLOC install a unicast forwarding rule in NPC MCAM like below - Match pkt DMAC with NIXLF attached PF/VF's MAC address. - Ingress channel - Action is UCAST - Forward to PF_FUNC of this NIXLF And broadcast pkt forwarding rule as - Match L2B bit in MCAM search key - Ingress channel - Action is UCAST, for now, later it will be changed to MCAST. Only PFs can install this rule Upon NIXLF_FREE disable all MCAM entries in use by that NIXLF. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Add LMAC channel info to NIXLF_ALLOC responseStanislaw Kardach2018-10-221-0/+5
| | | | | | | | | | | | | Add LMAC channel info like Rx/Tx channel base and count to NIXLF_ALLOC mailbox message response. This info is used by NIXLF attached RVU PF/VF to configure SQ's default channel, TL3_TL2_LINKX_CFG and to install MCAM rules in NPC based on matching ingress channel number. Signed-off-by: Stanislaw Kardach <skardach@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: NPC MCAM and LDATA extract minimal configurationSunil Goutham2018-10-221-0/+14
| | | | | | | | | | | | | | | | | | | | | | This patch adds some minimal configuration for NPC MCAM and LDATA extraction which is sufficient enough to install ucast/bcast/promiscuous forwarding rules. Below is the config done - LDATA extraction config to extract DMAC from pkt to offset 64bit in MCAM search key. - Set MCAM lookup keysize to 224bits - Set MCAM TX miss action to UCAST_DEFAULT - Set MCAM RX miss action to DROP Also inorder to have guaranteed space in MCAM to install ucast forwarding rule for each of RVU PF/VF, reserved one MCAM entry for each of NIXLF for ucast rule. And two entries for each of RVU PF. One for bcast pkt replication and other for promiscuous mode which allows all pkts received on a HW CGX/LBK channel. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Support for VTAG strip and captureVamsi Attunuru2018-10-221-0/+3
| | | | | | | | | Added support for PF/VF drivers to configure NIX to capture and/or strip VLAN tag from ingress packets. Signed-off-by: Vamsi Attunuru <vamsi.attunuru@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Broadcast packet replication supportSunil Goutham2018-10-221-0/+19
| | | | | | | | | | | | | | | Allocate memory for mcast/bcast/mirror replication entry contexts, replication buffers (used by HW) and config HW with corresponding memory bases. Added support for installing MCEs via NIX AQ mbox. For now support is restricted to broadcast pkt replication, hence MCE table size and number of replication buffers allocated are less. Each CGX LMAC mapped RVU PF is assigned a MCE table of size 'num VFs of that PF + PF'. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Config pkind for CGX mapped PFsGeetha sowjanya2018-10-221-0/+4
| | | | | | | | | | | For each CGX LMAC that is mapped to a RVU PF, allocate a pkind and config the same in CGX. For a received packet at CGX LMAC interface this pkind is used by NPC block to start parsing of packet. Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* octeontx2-af: Config NPC KPU engines with parser profileSunil Goutham2018-10-221-0/+12
| | | | | | | | | | | | | | | This patch configures all 16 KPUs and iKPU (pkinds) with the KPU parser profile defined in npc_profile.h. Each KPU engine has a 128 entry CAM, only CAM entries which are listed in the profile are enabled and rest are left disabled. Also - Memory is allocated for pkind's bitmap and PFFUNC, interface channel mapping. - Added all CSR offsets of NPC HW block. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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