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path: root/drivers/gpu/drm/i915/intel_vdsc.c
Commit message (Expand)AuthorAgeFilesLines
* drm/i915: move modesetting output/encoder code under display/Jani Nikula2019-06-171-966/+0
* drm/i915: extract intel_vdsc.h from intel_drv.h and i915_drv.hJani Nikula2019-04-301-0/+2
* drm/dsc: Split DSC PPS and SDP header initialisationsDavid Francis2019-03-051-2/+2
* drm/dsc: Add native 420 and 422 support to compute_rc_paramsDavid Francis2019-03-051-2/+2
* drm/i915: Move dsc rate params compute into drmDavid Francis2019-03-051-124/+1
* drm/i915: Markup paired operations on display power domainsChris Wilson2019-01-141-2/+2
* drm/i915: drop all drmP.h includesJani Nikula2019-01-091-1/+0
* drm/i915/dsc: Enable and disable appropriate power wells for VDSCManasi Navare2018-11-291-0/+26
* drm/i915/dp: Disable DSC in source by disabling DSS CTL bitsManasi Navare2018-11-291-0/+31
* drm/i915/dp: Configure Display stream splitter registers during DSC enableManasi Navare2018-11-291-0/+22
* drm/i915/dp: Populate DSC PPS SDP and send PPS infoframesManasi Navare2018-11-291-0/+21
* drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enablingManasi Navare2018-11-291-0/+409
* drm/i915/dsc: Compute Rate Control parameters for DSCGaurav K Singh2018-11-291-1/+124
* drm/i915/dsc: Define & Compute VESA DSC paramsGaurav K Singh2018-11-291-0/+456
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