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path: root/drivers/gpu/drm/amd/display/dc/dce
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* drm/amd/display: use CP2520-3 for PHY compliance automationTony Cheng2017-09-261-0/+3
| | | | | | | Signed-off-by: Tony Cheng <tony.cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Hersen Wu <hersenxs.wu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: increase timeout for dmif deallocRoman Li2017-09-261-1/+1
| | | | | | | | | | | | | In some use-cases, e.g. multiple 4K displays, exisitng wait time for reg update of 30msec timed out during mode setiing that sometimes resulted in system bad state as we continue without waiting for registry update complete. Increasing timeout to 35msec fixes that problem. Signed-off-by: Roman Li <Roman.Li@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: voltage request related changeCharlene Liu2017-09-262-13/+15
| | | | | | | Signed-off-by: Charlene Liu <charlene.liu@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: support PHY compliance automation for CP2520 pattern 1/2/3Tony Cheng2017-09-261-5/+12
| | | | | | | Signed-off-by: Tony Cheng <tony.cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: support CP2520 pattern 2 for HBR2 complianceTony Cheng2017-09-262-94/+65
| | | | | | | | | - also some clean up Signed-off-by: Tony Cheng <tony.cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Remove DCE12 guardsAlex Deucher2017-09-2610-49/+9
| | | | | | Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Enable DCE12 supportAlex Deucher2017-09-2610-0/+506
| | | | | | | This wires DCE12 support into DC and enables it. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Less log spamJordan Lazare2017-09-262-4/+4
| | | | | | | Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: refclock from bios firmwareInfoTableCharlene Liu2017-09-261-11/+6
| | | | | | | Signed-off-by: Charlene Liu <charlene.liu@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Simplify some DMCU waitsAmy Zhang2017-09-263-39/+9
| | | | | | | Signed-off-by: Amy Zhang <Amy.Zhang@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: remove independent lock as we have no use case todayTony Cheng2017-09-262-15/+5
| | | | | | | Signed-off-by: Tony Cheng <tony.cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: clean up and simply locking logicTony Cheng2017-09-261-2/+1
| | | | | | | | | | | | | | | always take update lock instead of using HW built in update lock trigger with write to primary_addr_lo. we will be a little more inefficient with the extra registers write to lock, but this simplify code and make it always correct. Will revisit locking optimization once update sequence mature Signed-off-by: Tony Cheng <tony.cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: freesync pipe split :VTotal_Min_Mask for Hflip/lock.Charlene Liu2017-09-262-22/+14
| | | | | | | Signed-off-by: Charlene Liu <charlene.liu@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Some more warning fixesHarry Wentland2017-09-261-3/+3
| | | | | | | | | This doesn't show with gcc6 Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: move visual confirm recout adjustment to scalerDmytro Laktyushkin2017-09-261-0/+6
| | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix warnings in DCHarry Wentland2017-09-261-1/+0
| | | | | | | Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Surface Validation Fixes + Audio MaskLeon Elazar2017-09-261-0/+1
| | | | | | | | | | 1. dc: Adding missing mask for audio register DCCG_AUDIO_DTO_SOURCE 2. Changing the surface validation to check the limits of the clip rect instead of the source rect. Signed-off-by: Leon Elazar <leon.elazar@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: add scaler coefficients for 64 phase 5-8 tapsDmytro Laktyushkin2017-09-261-0/+608
| | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: DMCU PSR RefactorAmy Zhang2017-09-264-314/+354
| | | | | | | | | - Move PSR programming from link encoder to dmcu Signed-off-by: Amy Zhang <Amy.Zhang@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: HDMI deep color mode audio issueCharlene Liu2017-09-263-22/+14
| | | | | | | Signed-off-by: Charlene Liu <charlene.liu@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: fix incorrect programming for YCbCr422 and YCbCr420Charlene Liu2017-09-261-3/+9
| | | | | | | Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: fix 12bpc truncate to 10bpcCharlene Liu2017-09-261-9/+9
| | | | | | | Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: audio bug fix part 1: Add missing audio ACRCharlene Liu2017-09-264-30/+63
| | | | | | | Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Don't attempt to program missing register fields on DCE8Jordan Lazare2017-09-262-13/+28
| | | | | | | | | | | | When moving to a common dce/ infrastructure for all asics, some register fields do not exist in DCE8, and cause ASSERTS and debug spam. Instead, check to see whether a register field mask is valid before attempting to program the register field Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix logic that causes segfault on DP display.Zeyu Fan2017-09-261-10/+12
| | | | | | Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com> Acked-by: Jordan Lazare <Jordan.Lazare@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix program pix clk logic to unblock deep color set.Zeyu Fan2017-09-261-5/+5
| | | | | | | Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: fix psr status waitDmytro Laktyushkin2017-09-262-14/+26
| | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Eagle Yeh <eagle.yeh@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: HDMI YCbCr422 12bpc pixel format issueCharlene Liu2017-09-263-27/+50
| | | | | | | Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix 64-bit divisionHarry Wentland2017-09-261-1/+1
| | | | | | Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: remove CV-specific timing standardCharlene Liu2017-09-261-4/+0
| | | | | | | | Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Support ABM without PPlibAnthony Koo2017-09-262-24/+9
| | | | | | | Fix problem with loading IRAM Signed-off-by: Anthony Koo <anthony.koo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Move backlight from encoder to ABMAnthony Koo2017-09-264-303/+280
| | | | | | | Signed-off-by: Anthony Koo <anthony.koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: DMCU Compile and LoadAnthony Koo2017-09-266-38/+593
| | | | | | | Signed-off-by: Anthony Koo <anthony.koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Proper de-allocation of OPPJoshua Aberback2017-09-262-39/+6
| | | | | | | | | | | - refactor opp_destroy functions to dce common file - fixes memory leak, dce specific variations didn't free regamma_params - remove unused dce110_regamma structure Signed-off-by: Joshua Aberback <Joshua.Aberback@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add missing MI masksLeon Elazar2017-09-261-0/+2
| | | | | | | | | | This will fix the memory Input programing with MST tiled display. This Fix should fix connectivity problems with MST tiled Display Signed-off-by: Leon Elazar <leon.elazar@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix missing conditions in hw sequencer.Zeyu Fan2017-09-261-1/+1
| | | | | | | Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: rename BGRA8888 to ABGR8888Tony Cheng2017-09-261-2/+2
| | | | | | | | | | DC actually support ABGR8888 instead of BGRA8888 (R/B swap rather than endian swap) , rename to avoid confusion Signed-off-by: Tony Cheng <tony.cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: refactor clk_resync to avoid assertionTony Cheng2017-09-261-27/+30
| | | | | | | | | - not all DCE has PHYPLLA_PIXCLK_DOUBLE_RATE_ENABLE bit defined. Signed-off-by: Tony Cheng <tony.cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: remove SIGNAL_TYPE_WIRELESSTony Cheng2017-09-261-1/+0
| | | | | | Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: remove hw_crtc_timingTony Cheng2017-09-261-1/+1
| | | | | | Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: No audio output heard from DP panelHersen Wu2017-09-261-2/+2
| | | | | | | Signed-off-by: Hersen Wu <hersenxs.wu@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Eagle Yeh <eagle.yeh@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fixing some fallout from dc_target removalLeon Elazar2017-09-261-0/+7
| | | | | | | | | | Also avoid allocating memory dce110_set_output_transfer_func if not needed Signed-off-by: Leon Elazar <leon.elazar@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Pass visible flag into surface programmingYongqiang Sun2017-09-262-2/+4
| | | | | | | Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: drop min/max wrappersDave Airlie2017-09-261-2/+2
| | | | | | | | | | These aren't needed, and aren't really used in too many places. Signed-off-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Don't fail validation for SIGNAL_TYPE_VIRTUALYongqiang Sun2017-09-261-0/+3
| | | | | | Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: remove HDMI deep color debug flagTony Cheng2017-09-261-3/+0
| | | | | | Signed-off-by: Tony Cheng <tony.cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: fix Infoframe byte 28-31 doesn't get written out to registerTony Cheng2017-09-261-2/+2
| | | | | | Signed-off-by: Tony Cheng <tony.cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Check hdr support before setting.Yongqiang Sun2017-09-261-11/+16
| | | | | | | | | | | | | In case of programing info frame to some monitors don't support HDR, it will result in black screen or corruption when unplug monitor. By checking hdr flag to avoid unnecessary setting for monitors don't support HDR. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix warnings in DCHarry Wentland2017-09-261-6/+0
| | | | | | Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix misleading indentation bug in link_encoderHarry Wentland2017-09-261-1/+2
| | | | | | Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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