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path: root/drivers/clk/meson/axg-aoclk.c
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* clk: meson: axg-aoclk: migrate to the new parent description methodAlexandre Mergnat2019-07-291-26/+37
| | | | | | | | | | | | | | | | This clock controller use the string comparison method to describe parent relation between the clocks, which is not optimized. Migrate to the new way by using .parent_hws where possible (when parent clocks are localy declared in the controller) and use .parent_data otherwise. Remove clk input helper and all bypass clocks (declared in probe function) which are no longer used since we are able to use device-tree clock name directly. Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
* clk: meson: rework and clean drivers dependenciesJerome Brunet2019-02-021-1/+3
| | | | | | | | | | | | | | | | | | | | | | | Initially, the meson clock directory only hosted 2 controllers drivers, for meson8 and gxbb. At the time, both used the same set of clock drivers so managing the dependencies was not a big concern. Since this ancient time, entropy did its job, controllers with different requirement and specific clock drivers have been added. Unfortunately, we did not do a great job at managing the dependencies between the controllers and the different clock drivers. Some drivers, such as clk-phase or vid-pll-div, are compiled even if they are useless on the target (meson8). As we are adding new controllers, we need to be able to pick a driver w/o pulling the whole thing. The patch aims to clean things up by: * providing a dedicated CONFIG_ for each clock drivers * allowing clock drivers to be compiled as a modules, if possible * stating explicitly which drivers are required by each controller. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lkml.kernel.org/r/20190201125841.26785-5-jbrunet@baylibre.com
* clk: meson: ao-clkc: claim clock controller input clocks from DTJerome Brunet2019-01-181-5/+17
| | | | | | | | | | Instead of relying on a fixed names for the differents input clocks of the controller, get them through DT. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lkml.kernel.org/r/20190116175435.4990-4-jbrunet@baylibre.com
* clk: meson: axg-ao: add 32k generation subtreeJerome Brunet2019-01-071-13/+162
| | | | | | | | | Add the clock subtree generating the 32k clock in amlogic axg ao block. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lkml.kernel.org/r/20181221160239.26265-6-jbrunet@baylibre.com
* clk: meson-axg: Add AO Clock and Reset controller driverQiufang Dai2018-05-151-0/+164
Adds a Clock and Reset controller driver for the Always-On part of the Amlogic Meson-AXG SoC. Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
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