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path: root/drivers/clk/clk-composite.c
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* clk: Tag basic clk types with SPDXStephen Boyd2018-12-111-12/+1
* Merge branch 'clk-hw-register' (early part) into clk-nextStephen Boyd2016-04-211-12/+33
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| * clk: composite: Add hw based registration APIsStephen Boyd2016-04-191-12/+33
* | Merge branch 'clk-composite-unregister' into clk-nextStephen Boyd2016-04-211-0/+15
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| * | clk: composite: Add unregister functionMaxime Ripard2016-04-211-0/+15
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* | clk: Add clk_composite_set_rate_and_parentFinley Xiao2016-04-151-0/+33
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* clk: move the common clock's to_clk_*(_hw) macros to clk-provider.hGeliang Tang2016-01-291-2/+0
* clk: Convert basic types to clk_hw based provider APIsStephen Boyd2015-08-241-7/+7
* clk: Convert __clk_get_flags() to clk_hw_get_flags()Stephen Boyd2015-08-241-1/+1
* clk: Replace __clk_get_num_parents with clk_hw_get_num_parents()Stephen Boyd2015-08-241-1/+1
* clk: fix some determine_rate implementationsBoris Brezillon2015-07-271-2/+1
* clk: change clk_ops' ->determine_rate() prototypeBoris Brezillon2015-07-271-24/+24
* clk: basic-types: Remove useless allocation failure printksStephen Boyd2015-05-141-3/+1
* clk: make strings in parent name arrays constSascha Hauer2015-05-051-1/+1
* clk: Replace explicit clk assignment with __clk_hw_set_clkJavier Martinez Canillas2015-02-181-10/+10
* clk: Add rate constraints to clocksTomeu Vizoso2015-02-021-2/+7
* clk: Change clk_ops->determine_rate to return a clk_hw as the best parentTomeu Vizoso2014-12-031-4/+5
* clk: composite: improve rate_hw sanity check logicMike Turquette2014-07-131-10/+16
* clk: composite: allow read-only clocksHeiko Stübner2014-07-131-6/+3
* clk: composite: support determine_rate using rate_ops->round_rate + mux_ops->...Boris BREZILLON2014-07-131-1/+47
* clk: composite: pass mux_hw into determine_rateMike Turquette2014-01-151-1/+1
* clk: composite: .determine_rate supportEmilio López2013-11-101-0/+28
* clk: composite: allow fixed rates & fixed dividersMike Turquette2013-04-121-4/+13
* clk: composite: rename 'div' references to 'rate'Mike Turquette2013-04-121-20/+20
* clk: Add composite clock typePrashant Gaikwad2013-03-261-0/+201
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