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path: root/arch/x86/lib/x86-opcode-map.txt
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* x86/insn: perf tools: Add new ptwrite instructionAdrian Hunter2017-06-271-1/+1
* Merge tag 'libnvdimm-for-4.8' of git://git.kernel.org/pub/scm/linux/kernel/gi...Linus Torvalds2016-07-281-1/+1
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| * x86/insn: remove pcommitDan Williams2016-07-231-1/+1
* | x86/insn: Add AVX-512 support to the instruction decoderAdrian Hunter2016-07-211-92/+171
* | x86/insn: perf tools: Fix vcvtph2ps instruction decodingAdrian Hunter2016-07-201-1/+1
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* x86/insn: perf tools: Add new xsave instructionsAdrian Hunter2015-09-041-0/+3
* x86/insn: perf tools: Add new memory protection keys instructionsAdrian Hunter2015-09-041-1/+1
* x86/insn: perf tools: Add new memory instructionsAdrian Hunter2015-09-041-2/+2
* x86/insn: perf tools: Add new SHA instructionsAdrian Hunter2015-09-041-0/+7
* x86/insn: perf tools: Pedantically tweak opcode map for MPX instructionsAdrian Hunter2015-09-041-2/+6
* x86/asm/decoder: Explain CALLW discrepancy between Intel and AMDDenys Vlasenko2015-02-181-0/+9
* x86, mpx: Add MPX related opcodes to the x86 opcode mapQiaowei Ren2014-01-171-2/+2
* x86, insn: Add new opcodes as of June, 2013Masami Hiramatsu2013-08-061-18/+24
* x86/decoder: Fix bsr/bsf/jmpe decoding with operand-size prefixMasami Hiramatsu2012-06-061-4/+4
*-. Merge branches 'sched-urgent-for-linus', 'perf-urgent-for-linus' and 'x86-urg...Linus Torvalds2012-01-191-3/+5
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| | * x86, opcode: ANDN and Group 17 in x86-opcode-map.txtUlrich Drepper2012-01-171-2/+2
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| * x86/kprobes: Fix typo transferred from Intel manualUlrich Drepper2012-01-161-1/+3
* | x86: Update instruction decoder to support new AVX formatsMasami Hiramatsu2011-12-051-273/+333
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* x86: Add Intel FMA instructions to x86 opcode mapMasami Hiramatsu2009-10-291-1/+33
* x86: AVX instruction set decoder supportMasami Hiramatsu2009-10-291-206/+225
* x86: Add pclmulq to x86 opcode mapMasami Hiramatsu2009-10-291-0/+1
* x86: Fix SSE opcode map bugMasami Hiramatsu2009-10-291-5/+5
* x86: Add AES opcodes to opcode mapMasami Hiramatsu2009-10-211-2/+8
* x86: Add AMD prefetch and 3DNow! opcodes to opcode mapMasami Hiramatsu2009-10-171-3/+10
* x86: Add MMX/SSE opcode groups to opcode mapMasami Hiramatsu2009-10-171-0/+10
* x86: Add VIA processor instructions in opcodes decoderMasami Hiramatsu2009-10-031-1/+7
* x86: Add MMX support for instruction decoderMasami Hiramatsu2009-09-111-107/+200
* x86: Instruction decoder APIMasami Hiramatsu2009-08-271-0/+719
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