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-rw-r--r--include/uapi/misc/habanalabs.h140
1 files changed, 101 insertions, 39 deletions
diff --git a/include/uapi/misc/habanalabs.h b/include/uapi/misc/habanalabs.h
index 3956c226ca35..4faa2c9767e5 100644
--- a/include/uapi/misc/habanalabs.h
+++ b/include/uapi/misc/habanalabs.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
*
- * Copyright 2016-2018 HabanaLabs, Ltd.
+ * Copyright 2016-2019 HabanaLabs, Ltd.
* All Rights Reserved.
*
*/
@@ -28,20 +28,20 @@
enum goya_queue_id {
GOYA_QUEUE_ID_DMA_0 = 0,
- GOYA_QUEUE_ID_DMA_1,
- GOYA_QUEUE_ID_DMA_2,
- GOYA_QUEUE_ID_DMA_3,
- GOYA_QUEUE_ID_DMA_4,
- GOYA_QUEUE_ID_CPU_PQ,
- GOYA_QUEUE_ID_MME, /* Internal queues start here */
- GOYA_QUEUE_ID_TPC0,
- GOYA_QUEUE_ID_TPC1,
- GOYA_QUEUE_ID_TPC2,
- GOYA_QUEUE_ID_TPC3,
- GOYA_QUEUE_ID_TPC4,
- GOYA_QUEUE_ID_TPC5,
- GOYA_QUEUE_ID_TPC6,
- GOYA_QUEUE_ID_TPC7,
+ GOYA_QUEUE_ID_DMA_1 = 1,
+ GOYA_QUEUE_ID_DMA_2 = 2,
+ GOYA_QUEUE_ID_DMA_3 = 3,
+ GOYA_QUEUE_ID_DMA_4 = 4,
+ GOYA_QUEUE_ID_CPU_PQ = 5,
+ GOYA_QUEUE_ID_MME = 6, /* Internal queues start here */
+ GOYA_QUEUE_ID_TPC0 = 7,
+ GOYA_QUEUE_ID_TPC1 = 8,
+ GOYA_QUEUE_ID_TPC2 = 9,
+ GOYA_QUEUE_ID_TPC3 = 10,
+ GOYA_QUEUE_ID_TPC4 = 11,
+ GOYA_QUEUE_ID_TPC5 = 12,
+ GOYA_QUEUE_ID_TPC6 = 13,
+ GOYA_QUEUE_ID_TPC7 = 14,
GOYA_QUEUE_ID_SIZE
};
@@ -75,14 +75,45 @@ enum hl_device_status {
HL_DEVICE_STATUS_MALFUNCTION
};
-/* Opcode for management ioctl */
-#define HL_INFO_HW_IP_INFO 0
-#define HL_INFO_HW_EVENTS 1
-#define HL_INFO_DRAM_USAGE 2
-#define HL_INFO_HW_IDLE 3
-#define HL_INFO_DEVICE_STATUS 4
+/* Opcode for management ioctl
+ *
+ * HW_IP_INFO - Receive information about different IP blocks in the
+ * device.
+ * HL_INFO_HW_EVENTS - Receive an array describing how many times each event
+ * occurred since the last hard reset.
+ * HL_INFO_DRAM_USAGE - Retrieve the dram usage inside the device and of the
+ * specific context. This is relevant only for devices
+ * where the dram is managed by the kernel driver
+ * HL_INFO_HW_IDLE - Retrieve information about the idle status of each
+ * internal engine.
+ * HL_INFO_DEVICE_STATUS - Retrieve the device's status. This opcode doesn't
+ * require an open context.
+ * HL_INFO_DEVICE_UTILIZATION - Retrieve the total utilization of the device
+ * over the last period specified by the user.
+ * The period can be between 100ms to 1s, in
+ * resolution of 100ms. The return value is a
+ * percentage of the utilization rate.
+ * HL_INFO_HW_EVENTS_AGGREGATE - Receive an array describing how many times each
+ * event occurred since the driver was loaded.
+ * HL_INFO_CLK_RATE - Retrieve the current and maximum clock rate
+ * of the device in MHz. The maximum clock rate is
+ * configurable via sysfs parameter
+ * HL_INFO_RESET_COUNT - Retrieve the counts of the soft and hard reset
+ * operations performed on the device since the last
+ * time the driver was loaded.
+ */
+#define HL_INFO_HW_IP_INFO 0
+#define HL_INFO_HW_EVENTS 1
+#define HL_INFO_DRAM_USAGE 2
+#define HL_INFO_HW_IDLE 3
+#define HL_INFO_DEVICE_STATUS 4
+#define HL_INFO_DEVICE_UTILIZATION 6
+#define HL_INFO_HW_EVENTS_AGGREGATE 7
+#define HL_INFO_CLK_RATE 8
+#define HL_INFO_RESET_COUNT 9
#define HL_INFO_VERSION_MAX_LEN 128
+#define HL_INFO_CARD_NAME_MAX_LEN 16
struct hl_info_hw_ip_info {
__u64 sram_base_address;
@@ -101,6 +132,7 @@ struct hl_info_hw_ip_info {
__u8 dram_enabled;
__u8 pad[2];
__u8 armcp_version[HL_INFO_VERSION_MAX_LEN];
+ __u8 card_name[HL_INFO_CARD_NAME_MAX_LEN];
};
struct hl_info_dram_usage {
@@ -122,6 +154,21 @@ struct hl_info_device_status {
__u32 pad;
};
+struct hl_info_device_utilization {
+ __u32 utilization;
+ __u32 pad;
+};
+
+struct hl_info_clk_rate {
+ __u32 cur_clk_rate_mhz;
+ __u32 max_clk_rate_mhz;
+};
+
+struct hl_info_reset_count {
+ __u32 hard_reset_cnt;
+ __u32 soft_reset_cnt;
+};
+
struct hl_info_args {
/* Location of relevant struct in userspace */
__u64 return_pointer;
@@ -137,8 +184,15 @@ struct hl_info_args {
/* HL_INFO_* */
__u32 op;
- /* Context ID - Currently not in use */
- __u32 ctx_id;
+ union {
+ /* Context ID - Currently not in use */
+ __u32 ctx_id;
+ /* Period value for utilization rate (100ms - 1000ms, in 100ms
+ * resolution.
+ */
+ __u32 period_ms;
+ };
+
__u32 pad;
};
@@ -147,13 +201,15 @@ struct hl_info_args {
/* Opcode to destroy previously created command buffer */
#define HL_CB_OP_DESTROY 1
+#define HL_MAX_CB_SIZE 0x200000 /* 2MB */
+
struct hl_cb_in {
/* Handle of CB or 0 if we want to create one */
__u64 cb_handle;
/* HL_CB_OP_* */
__u32 op;
- /* Size of CB. Maximum size is 2MB. The minimum size that will be
- * allocated, regardless of this parameter's value, is PAGE_SIZE
+ /* Size of CB. Maximum size is HL_MAX_CB_SIZE. The minimum size that
+ * will be allocated, regardless of this parameter's value, is PAGE_SIZE
*/
__u32 cb_size;
/* Context ID - Currently not in use */
@@ -199,6 +255,8 @@ struct hl_cs_chunk {
#define HL_CS_STATUS_SUCCESS 0
+#define HL_MAX_JOBS_PER_CS 512
+
struct hl_cs_in {
/* this holds address of array of hl_cs_chunk for restore phase */
__u64 chunks_restore;
@@ -208,9 +266,13 @@ struct hl_cs_in {
* Currently not in use
*/
__u64 chunks_store;
- /* Number of chunks in restore phase array */
+ /* Number of chunks in restore phase array. Maximum number is
+ * HL_MAX_JOBS_PER_CS
+ */
__u32 num_chunks_restore;
- /* Number of chunks in execution array */
+ /* Number of chunks in execution array. Maximum number is
+ * HL_MAX_JOBS_PER_CS
+ */
__u32 num_chunks_execute;
/* Number of chunks in restore phase array - Currently not in use */
__u32 num_chunks_store;
@@ -295,12 +357,12 @@ struct hl_mem_in {
struct {
/*
* Requested virtual address of mapped memory.
- * KMD will try to map the requested region to this
- * hint address, as long as the address is valid and
- * not already mapped. The user should check the
+ * The driver will try to map the requested region to
+ * this hint address, as long as the address is valid
+ * and not already mapped. The user should check the
* returned address of the IOCTL to make sure he got
- * the hint address. Passing 0 here means that KMD
- * will choose the address itself.
+ * the hint address. Passing 0 here means that the
+ * driver will choose the address itself.
*/
__u64 hint_addr;
/* Handle returned from HL_MEM_OP_ALLOC */
@@ -313,12 +375,12 @@ struct hl_mem_in {
__u64 host_virt_addr;
/*
* Requested virtual address of mapped memory.
- * KMD will try to map the requested region to this
- * hint address, as long as the address is valid and
- * not already mapped. The user should check the
+ * The driver will try to map the requested region to
+ * this hint address, as long as the address is valid
+ * and not already mapped. The user should check the
* returned address of the IOCTL to make sure he got
- * the hint address. Passing 0 here means that KMD
- * will choose the address itself.
+ * the hint address. Passing 0 here means that the
+ * driver will choose the address itself.
*/
__u64 hint_addr;
/* Size of allocated host memory */
@@ -439,7 +501,7 @@ struct hl_debug_params_spmu {
#define HL_DEBUG_OP_BMON 4
/* Opcode for SPMU component */
#define HL_DEBUG_OP_SPMU 5
-/* Opcode for timestamp */
+/* Opcode for timestamp (deprecated) */
#define HL_DEBUG_OP_TIMESTAMP 6
/* Opcode for setting the device into or out of debug mode. The enable
* variable should be 1 for enabling debug mode and 0 for disabling it
@@ -555,7 +617,7 @@ struct hl_debug_args {
*
* The user can call this IOCTL with a handle it received from the CS IOCTL
* to wait until the handle's CS has finished executing. The user will wait
- * inside the kernel until the CS has finished or until the user-requeusted
+ * inside the kernel until the CS has finished or until the user-requested
* timeout has expired.
*
* The return value of the IOCTL is a standard Linux error code. The possible
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