diff options
Diffstat (limited to 'include/linux/soc/mediatek')
| -rw-r--r-- | include/linux/soc/mediatek/mtk-cmdq.h | 70 | ||||
| -rw-r--r-- | include/linux/soc/mediatek/mtk_sip_svc.h | 25 |
2 files changed, 85 insertions, 10 deletions
diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h index 54ade13a9b15..a74c1d5acdf3 100644 --- a/include/linux/soc/mediatek/mtk-cmdq.h +++ b/include/linux/soc/mediatek/mtk-cmdq.h @@ -13,11 +13,14 @@ #define CMDQ_NO_TIMEOUT 0xffffffffu -/** cmdq event maximum */ -#define CMDQ_MAX_EVENT 0x3ff - struct cmdq_pkt; +struct cmdq_client_reg { + u8 subsys; + u16 offset; + u16 size; +}; + struct cmdq_client { spinlock_t lock; u32 pkt_cnt; @@ -28,6 +31,21 @@ struct cmdq_client { }; /** + * cmdq_dev_get_client_reg() - parse cmdq client reg from the device + * node of CMDQ client + * @dev: device of CMDQ mailbox client + * @client_reg: CMDQ client reg pointer + * @idx: the index of desired reg + * + * Return: 0 for success; else the error code is returned + * + * Help CMDQ client parsing the cmdq client reg + * from the device node of CMDQ client. + */ +int cmdq_dev_get_client_reg(struct device *dev, + struct cmdq_client_reg *client_reg, int idx); + +/** * cmdq_mbox_create() - create CMDQ mailbox client and channel * @dev: device of CMDQ mailbox client * @index: index of CMDQ mailbox channel @@ -63,26 +81,26 @@ void cmdq_pkt_destroy(struct cmdq_pkt *pkt); /** * cmdq_pkt_write() - append write command to the CMDQ packet * @pkt: the CMDQ packet - * @value: the specified target register value * @subsys: the CMDQ sub system code * @offset: register offset from CMDQ sub system + * @value: the specified target register value * * Return: 0 for success; else the error code is returned */ -int cmdq_pkt_write(struct cmdq_pkt *pkt, u32 value, u32 subsys, u32 offset); +int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value); /** * cmdq_pkt_write_mask() - append write command with mask to the CMDQ packet * @pkt: the CMDQ packet - * @value: the specified target register value * @subsys: the CMDQ sub system code * @offset: register offset from CMDQ sub system + * @value: the specified target register value * @mask: the specified target register mask * * Return: 0 for success; else the error code is returned */ -int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u32 value, - u32 subsys, u32 offset, u32 mask); +int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys, + u16 offset, u32 value, u32 mask); /** * cmdq_pkt_wfe() - append wait for event command to the CMDQ packet @@ -91,7 +109,7 @@ int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u32 value, * * Return: 0 for success; else the error code is returned */ -int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u32 event); +int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event); /** * cmdq_pkt_clear_event() - append clear event command to the CMDQ packet @@ -100,9 +118,41 @@ int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u32 event); * * Return: 0 for success; else the error code is returned */ -int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u32 event); +int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event); + +/** + * cmdq_pkt_poll() - Append polling command to the CMDQ packet, ask GCE to + * execute an instruction that wait for a specified + * hardware register to check for the value w/o mask. + * All GCE hardware threads will be blocked by this + * instruction. + * @pkt: the CMDQ packet + * @subsys: the CMDQ sub system code + * @offset: register offset from CMDQ sub system + * @value: the specified target register value + * + * Return: 0 for success; else the error code is returned + */ +int cmdq_pkt_poll(struct cmdq_pkt *pkt, u8 subsys, + u16 offset, u32 value); /** + * cmdq_pkt_poll_mask() - Append polling command to the CMDQ packet, ask GCE to + * execute an instruction that wait for a specified + * hardware register to check for the value w/ mask. + * All GCE hardware threads will be blocked by this + * instruction. + * @pkt: the CMDQ packet + * @subsys: the CMDQ sub system code + * @offset: register offset from CMDQ sub system + * @value: the specified target register value + * @mask: the specified target register mask + * + * Return: 0 for success; else the error code is returned + */ +int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys, + u16 offset, u32 value, u32 mask); +/** * cmdq_pkt_flush_async() - trigger CMDQ to asynchronously execute the CMDQ * packet and call back at the end of done packet * @pkt: the CMDQ packet diff --git a/include/linux/soc/mediatek/mtk_sip_svc.h b/include/linux/soc/mediatek/mtk_sip_svc.h new file mode 100644 index 000000000000..082398e0cfb1 --- /dev/null +++ b/include/linux/soc/mediatek/mtk_sip_svc.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2019 MediaTek Inc. + */ +#ifndef __MTK_SIP_SVC_H +#define __MTK_SIP_SVC_H + +/* Error Code */ +#define SIP_SVC_E_SUCCESS 0 +#define SIP_SVC_E_NOT_SUPPORTED -1 +#define SIP_SVC_E_INVALID_PARAMS -2 +#define SIP_SVC_E_INVALID_RANGE -3 +#define SIP_SVC_E_PERMISSION_DENIED -4 + +#ifdef CONFIG_ARM64 +#define MTK_SIP_SMC_CONVENTION ARM_SMCCC_SMC_64 +#else +#define MTK_SIP_SMC_CONVENTION ARM_SMCCC_SMC_32 +#endif + +#define MTK_SIP_SMC_CMD(fn_id) \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, MTK_SIP_SMC_CONVENTION, \ + ARM_SMCCC_OWNER_SIP, fn_id) + +#endif |
