diff options
Diffstat (limited to 'drivers/w1')
-rw-r--r-- | drivers/w1/masters/Kconfig | 9 | ||||
-rw-r--r-- | drivers/w1/masters/Makefile | 1 | ||||
-rw-r--r-- | drivers/w1/masters/matrox_w1.c | 2 | ||||
-rw-r--r-- | drivers/w1/masters/mxc_w1.c | 4 | ||||
-rw-r--r-- | drivers/w1/masters/omap_hdq.c | 352 | ||||
-rw-r--r-- | drivers/w1/masters/sgi_w1.c | 128 | ||||
-rw-r--r-- | drivers/w1/slaves/Kconfig | 15 | ||||
-rw-r--r-- | drivers/w1/slaves/Makefile | 2 | ||||
-rw-r--r-- | drivers/w1/slaves/w1_ds2430.c | 295 | ||||
-rw-r--r-- | drivers/w1/slaves/w1_ds250x.c | 290 |
10 files changed, 856 insertions, 242 deletions
diff --git a/drivers/w1/masters/Kconfig b/drivers/w1/masters/Kconfig index 7ae260577901..24b9a8e05f64 100644 --- a/drivers/w1/masters/Kconfig +++ b/drivers/w1/masters/Kconfig @@ -65,5 +65,14 @@ config HDQ_MASTER_OMAP Say Y here if you want support for the 1-wire or HDQ Interface on an OMAP processor. +config W1_MASTER_SGI + tristate "SGI ASIC driver" + help + Say Y here if you want support for your 1-wire devices using + SGI ASIC 1-Wire interface + + This support is also available as a module. If so, the module + will be called sgi_w1. + endmenu diff --git a/drivers/w1/masters/Makefile b/drivers/w1/masters/Makefile index 18954cae4256..dae629b7ab49 100644 --- a/drivers/w1/masters/Makefile +++ b/drivers/w1/masters/Makefile @@ -11,3 +11,4 @@ obj-$(CONFIG_W1_MASTER_MXC) += mxc_w1.o obj-$(CONFIG_W1_MASTER_DS1WM) += ds1wm.o obj-$(CONFIG_W1_MASTER_GPIO) += w1-gpio.o obj-$(CONFIG_HDQ_MASTER_OMAP) += omap_hdq.o +obj-$(CONFIG_W1_MASTER_SGI) += sgi_w1.o diff --git a/drivers/w1/masters/matrox_w1.c b/drivers/w1/masters/matrox_w1.c index 3110791a2f1c..ee716c715710 100644 --- a/drivers/w1/masters/matrox_w1.c +++ b/drivers/w1/masters/matrox_w1.c @@ -139,7 +139,7 @@ static int matrox_w1_probe(struct pci_dev *pdev, const struct pci_device_id *ent dev->phys_addr = pci_resource_start(pdev, 1); - dev->virt_addr = ioremap_nocache(dev->phys_addr, 16384); + dev->virt_addr = ioremap(dev->phys_addr, 16384); if (!dev->virt_addr) { dev_err(&pdev->dev, "%s: failed to ioremap(0x%lx, %d).\n", __func__, dev->phys_addr, 16384); diff --git a/drivers/w1/masters/mxc_w1.c b/drivers/w1/masters/mxc_w1.c index c3b2095ef6a9..1ca880e01476 100644 --- a/drivers/w1/masters/mxc_w1.c +++ b/drivers/w1/masters/mxc_w1.c @@ -92,7 +92,6 @@ static int mxc_w1_probe(struct platform_device *pdev) { struct mxc_w1_device *mdev; unsigned long clkrate; - struct resource *res; unsigned int clkdiv; int err; @@ -120,8 +119,7 @@ static int mxc_w1_probe(struct platform_device *pdev) dev_warn(&pdev->dev, "Incorrect time base frequency %lu Hz\n", clkrate); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - mdev->regs = devm_ioremap_resource(&pdev->dev, res); + mdev->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(mdev->regs)) { err = PTR_ERR(mdev->regs); goto out_disable_clk; diff --git a/drivers/w1/masters/omap_hdq.c b/drivers/w1/masters/omap_hdq.c index 3099052e1243..aa09f8527776 100644 --- a/drivers/w1/masters/omap_hdq.c +++ b/drivers/w1/masters/omap_hdq.c @@ -38,12 +38,6 @@ #define OMAP_HDQ_INT_STATUS_TXCOMPLETE BIT(2) #define OMAP_HDQ_INT_STATUS_RXCOMPLETE BIT(1) #define OMAP_HDQ_INT_STATUS_TIMEOUT BIT(0) -#define OMAP_HDQ_SYSCONFIG 0x14 -#define OMAP_HDQ_SYSCONFIG_SOFTRESET BIT(1) -#define OMAP_HDQ_SYSCONFIG_AUTOIDLE BIT(0) -#define OMAP_HDQ_SYSCONFIG_NOIDLE 0x0 -#define OMAP_HDQ_SYSSTATUS 0x18 -#define OMAP_HDQ_SYSSTATUS_RESETDONE BIT(0) #define OMAP_HDQ_FLAG_CLEAR 0 #define OMAP_HDQ_FLAG_SET 1 @@ -62,17 +56,9 @@ struct hdq_data { void __iomem *hdq_base; /* lock status update */ struct mutex hdq_mutex; - int hdq_usecount; u8 hdq_irqstatus; /* device lock */ spinlock_t hdq_spinlock; - /* - * Used to control the call to omap_hdq_get and omap_hdq_put. - * HDQ Protocol: Write the CMD|REG_address first, followed by - * the data wrire or read. - */ - int init_trans; - int rrw; /* mode: 0-HDQ 1-W1 */ int mode; @@ -99,15 +85,6 @@ static inline u8 hdq_reg_merge(struct hdq_data *hdq_data, u32 offset, return new_val; } -static void hdq_disable_interrupt(struct hdq_data *hdq_data, u32 offset, - u32 mask) -{ - u32 ie; - - ie = readl(hdq_data->hdq_base + offset); - writel(ie & mask, hdq_data->hdq_base + offset); -} - /* * Wait for one or more bits in flag change. * HDQ_FLAG_SET: wait until any bit in the flag is set. @@ -142,22 +119,24 @@ static int hdq_wait_for_flag(struct hdq_data *hdq_data, u32 offset, return ret; } +/* Clear saved irqstatus after using an interrupt */ +static void hdq_reset_irqstatus(struct hdq_data *hdq_data) +{ + unsigned long irqflags; + + spin_lock_irqsave(&hdq_data->hdq_spinlock, irqflags); + hdq_data->hdq_irqstatus = 0; + spin_unlock_irqrestore(&hdq_data->hdq_spinlock, irqflags); +} + /* write out a byte and fill *status with HDQ_INT_STATUS */ static int hdq_write_byte(struct hdq_data *hdq_data, u8 val, u8 *status) { int ret; u8 tmp_status; - unsigned long irqflags; *status = 0; - spin_lock_irqsave(&hdq_data->hdq_spinlock, irqflags); - /* clear interrupt flags via a dummy read */ - hdq_reg_in(hdq_data, OMAP_HDQ_INT_STATUS); - /* ISR loads it with new INT_STATUS */ - hdq_data->hdq_irqstatus = 0; - spin_unlock_irqrestore(&hdq_data->hdq_spinlock, irqflags); - hdq_reg_out(hdq_data, OMAP_HDQ_TX_DATA, val); /* set the GO bit */ @@ -191,6 +170,7 @@ static int hdq_write_byte(struct hdq_data *hdq_data, u8 val, u8 *status) } out: + hdq_reset_irqstatus(hdq_data); return ret; } @@ -237,47 +217,11 @@ static void omap_w1_search_bus(void *_hdq, struct w1_master *master_dev, slave_found(master_dev, id); } -static int _omap_hdq_reset(struct hdq_data *hdq_data) -{ - int ret; - u8 tmp_status; - - hdq_reg_out(hdq_data, OMAP_HDQ_SYSCONFIG, - OMAP_HDQ_SYSCONFIG_SOFTRESET); - /* - * Select HDQ/1W mode & enable clocks. - * It is observed that INT flags can't be cleared via a read and GO/INIT - * won't return to zero if interrupt is disabled. So we always enable - * interrupt. - */ - hdq_reg_out(hdq_data, OMAP_HDQ_CTRL_STATUS, - OMAP_HDQ_CTRL_STATUS_CLOCKENABLE | - OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK); - - /* wait for reset to complete */ - ret = hdq_wait_for_flag(hdq_data, OMAP_HDQ_SYSSTATUS, - OMAP_HDQ_SYSSTATUS_RESETDONE, OMAP_HDQ_FLAG_SET, &tmp_status); - if (ret) - dev_dbg(hdq_data->dev, "timeout waiting HDQ reset, %x", - tmp_status); - else { - hdq_reg_out(hdq_data, OMAP_HDQ_CTRL_STATUS, - OMAP_HDQ_CTRL_STATUS_CLOCKENABLE | - OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK | - hdq_data->mode); - hdq_reg_out(hdq_data, OMAP_HDQ_SYSCONFIG, - OMAP_HDQ_SYSCONFIG_AUTOIDLE); - } - - return ret; -} - /* Issue break pulse to the device */ static int omap_hdq_break(struct hdq_data *hdq_data) { int ret = 0; u8 tmp_status; - unsigned long irqflags; ret = mutex_lock_interruptible(&hdq_data->hdq_mutex); if (ret < 0) { @@ -286,13 +230,6 @@ static int omap_hdq_break(struct hdq_data *hdq_data) goto rtn; } - spin_lock_irqsave(&hdq_data->hdq_spinlock, irqflags); - /* clear interrupt flags via a dummy read */ - hdq_reg_in(hdq_data, OMAP_HDQ_INT_STATUS); - /* ISR loads it with new INT_STATUS */ - hdq_data->hdq_irqstatus = 0; - spin_unlock_irqrestore(&hdq_data->hdq_spinlock, irqflags); - /* set the INIT and GO bit */ hdq_reg_merge(hdq_data, OMAP_HDQ_CTRL_STATUS, OMAP_HDQ_CTRL_STATUS_INITIALIZATION | OMAP_HDQ_CTRL_STATUS_GO, @@ -341,6 +278,7 @@ static int omap_hdq_break(struct hdq_data *hdq_data) " return to zero, %x", tmp_status); out: + hdq_reset_irqstatus(hdq_data); mutex_unlock(&hdq_data->hdq_mutex); rtn: return ret; @@ -357,7 +295,7 @@ static int hdq_read_byte(struct hdq_data *hdq_data, u8 *val) goto rtn; } - if (!hdq_data->hdq_usecount) { + if (pm_runtime_suspended(hdq_data->dev)) { ret = -EINVAL; goto out; } @@ -388,86 +326,13 @@ static int hdq_read_byte(struct hdq_data *hdq_data, u8 *val) /* the data is ready. Read it in! */ *val = hdq_reg_in(hdq_data, OMAP_HDQ_RX_DATA); out: + hdq_reset_irqstatus(hdq_data); mutex_unlock(&hdq_data->hdq_mutex); rtn: return ret; } -/* Enable clocks and set the controller to HDQ/1W mode */ -static int omap_hdq_get(struct hdq_data *hdq_data) -{ - int ret = 0; - - ret = mutex_lock_interruptible(&hdq_data->hdq_mutex); - if (ret < 0) { - ret = -EINTR; - goto rtn; - } - - if (OMAP_HDQ_MAX_USER == hdq_data->hdq_usecount) { - dev_dbg(hdq_data->dev, "attempt to exceed the max use count"); - ret = -EINVAL; - goto out; - } else { - hdq_data->hdq_usecount++; - try_module_get(THIS_MODULE); - if (1 == hdq_data->hdq_usecount) { - - pm_runtime_get_sync(hdq_data->dev); - - /* make sure HDQ/1W is out of reset */ - if (!(hdq_reg_in(hdq_data, OMAP_HDQ_SYSSTATUS) & - OMAP_HDQ_SYSSTATUS_RESETDONE)) { - ret = _omap_hdq_reset(hdq_data); - if (ret) - /* back up the count */ - hdq_data->hdq_usecount--; - } else { - /* select HDQ/1W mode & enable clocks */ - hdq_reg_out(hdq_data, OMAP_HDQ_CTRL_STATUS, - OMAP_HDQ_CTRL_STATUS_CLOCKENABLE | - OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK | - hdq_data->mode); - hdq_reg_out(hdq_data, OMAP_HDQ_SYSCONFIG, - OMAP_HDQ_SYSCONFIG_NOIDLE); - hdq_reg_in(hdq_data, OMAP_HDQ_INT_STATUS); - } - } - } - -out: - mutex_unlock(&hdq_data->hdq_mutex); -rtn: - return ret; -} - -/* Disable clocks to the module */ -static int omap_hdq_put(struct hdq_data *hdq_data) -{ - int ret = 0; - - ret = mutex_lock_interruptible(&hdq_data->hdq_mutex); - if (ret < 0) - return -EINTR; - - hdq_reg_out(hdq_data, OMAP_HDQ_SYSCONFIG, - OMAP_HDQ_SYSCONFIG_AUTOIDLE); - if (0 == hdq_data->hdq_usecount) { - dev_dbg(hdq_data->dev, "attempt to decrement use count" - " when it is zero"); - ret = -EINVAL; - } else { - hdq_data->hdq_usecount--; - module_put(THIS_MODULE); - if (0 == hdq_data->hdq_usecount) - pm_runtime_put_sync(hdq_data->dev); - } - mutex_unlock(&hdq_data->hdq_mutex); - - return ret; -} - /* * W1 triplet callback function - used for searching ROM addresses. * Registered only when controller is in 1-wire mode. @@ -482,7 +347,12 @@ static u8 omap_w1_triplet(void *_hdq, u8 bdir) OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK; u8 mask = ctrl | OMAP_HDQ_CTRL_STATUS_DIR; - omap_hdq_get(_hdq); + err = pm_runtime_get_sync(hdq_data->dev); + if (err < 0) { + pm_runtime_put_noidle(hdq_data->dev); + + return err; + } err = mutex_lock_interruptible(&hdq_data->hdq_mutex); if (err < 0) { @@ -490,7 +360,6 @@ static u8 omap_w1_triplet(void *_hdq, u8 bdir) goto rtn; } - hdq_data->hdq_irqstatus = 0; /* read id_bit */ hdq_reg_merge(_hdq, OMAP_HDQ_CTRL_STATUS, ctrl | OMAP_HDQ_CTRL_STATUS_DIR, mask); @@ -504,7 +373,9 @@ static u8 omap_w1_triplet(void *_hdq, u8 bdir) } id_bit = (hdq_reg_in(_hdq, OMAP_HDQ_RX_DATA) & 0x01); - hdq_data->hdq_irqstatus = 0; + /* Must clear irqstatus for another RXCOMPLETE interrupt */ + hdq_reset_irqstatus(hdq_data); + /* read comp_bit */ hdq_reg_merge(_hdq, OMAP_HDQ_CTRL_STATUS, ctrl | OMAP_HDQ_CTRL_STATUS_DIR, mask); @@ -547,18 +418,33 @@ static u8 omap_w1_triplet(void *_hdq, u8 bdir) OMAP_HDQ_CTRL_STATUS_SINGLE); out: + hdq_reset_irqstatus(hdq_data); mutex_unlock(&hdq_data->hdq_mutex); rtn: - omap_hdq_put(_hdq); + pm_runtime_mark_last_busy(hdq_data->dev); + pm_runtime_put_autosuspend(hdq_data->dev); + return ret; } /* reset callback */ static u8 omap_w1_reset_bus(void *_hdq) { - omap_hdq_get(_hdq); - omap_hdq_break(_hdq); - omap_hdq_put(_hdq); + struct hdq_data *hdq_data = _hdq; + int err; + + err = pm_runtime_get_sync(hdq_data->dev); + if (err < 0) { + pm_runtime_put_noidle(hdq_data->dev); + + return err; + } + + omap_hdq_break(hdq_data); + + pm_runtime_mark_last_busy(hdq_data->dev); + pm_runtime_put_autosuspend(hdq_data->dev); + return 0; } @@ -569,37 +455,19 @@ static u8 omap_w1_read_byte(void *_hdq) u8 val = 0; int ret; - /* First write to initialize the transfer */ - if (hdq_data->init_trans == 0) - omap_hdq_get(hdq_data); + ret = pm_runtime_get_sync(hdq_data->dev); + if (ret < 0) { + pm_runtime_put_noidle(hdq_data->dev); - ret = hdq_read_byte(hdq_data, &val); - if (ret) { - ret = mutex_lock_interruptible(&hdq_data->hdq_mutex); - if (ret < 0) { - dev_dbg(hdq_data->dev, "Could not acquire mutex\n"); - return -EINTR; - } - hdq_data->init_trans = 0; - mutex_unlock(&hdq_data->hdq_mutex); - omap_hdq_put(hdq_data); return -1; } - hdq_disable_interrupt(hdq_data, OMAP_HDQ_CTRL_STATUS, - ~OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK); + ret = hdq_read_byte(hdq_data, &val); + if (ret) + ret = -1; - /* Write followed by a read, release the module */ - if (hdq_data->init_trans) { - ret = mutex_lock_interruptible(&hdq_data->hdq_mutex); - if (ret < 0) { - dev_dbg(hdq_data->dev, "Could not acquire mutex\n"); - return -EINTR; - } - hdq_data->init_trans = 0; - mutex_unlock(&hdq_data->hdq_mutex); - omap_hdq_put(hdq_data); - } + pm_runtime_mark_last_busy(hdq_data->dev); + pm_runtime_put_autosuspend(hdq_data->dev); return val; } @@ -611,9 +479,12 @@ static void omap_w1_write_byte(void *_hdq, u8 byte) int ret; u8 status; - /* First write to initialize the transfer */ - if (hdq_data->init_trans == 0) - omap_hdq_get(hdq_data); + ret = pm_runtime_get_sync(hdq_data->dev); + if (ret < 0) { + pm_runtime_put_noidle(hdq_data->dev); + + return; + } /* * We need to reset the slave before @@ -623,31 +494,15 @@ static void omap_w1_write_byte(void *_hdq, u8 byte) if (byte == W1_SKIP_ROM) omap_hdq_break(hdq_data); - ret = mutex_lock_interruptible(&hdq_data->hdq_mutex); - if (ret < 0) { - dev_dbg(hdq_data->dev, "Could not acquire mutex\n"); - return; - } - hdq_data->init_trans++; - mutex_unlock(&hdq_data->hdq_mutex); - ret = hdq_write_byte(hdq_data, byte, &status); if (ret < 0) { dev_dbg(hdq_data->dev, "TX failure:Ctrl status %x\n", status); - return; + goto out_err; } - /* Second write, data transferred. Release the module */ - if (hdq_data->init_trans > 1) { - omap_hdq_put(hdq_data); - ret = mutex_lock_interruptible(&hdq_data->hdq_mutex); - if (ret < 0) { - dev_dbg(hdq_data->dev, "Could not acquire mutex\n"); - return; - } - hdq_data->init_trans = 0; - mutex_unlock(&hdq_data->hdq_mutex); - } +out_err: + pm_runtime_mark_last_busy(hdq_data->dev); + pm_runtime_put_autosuspend(hdq_data->dev); } static struct w1_bus_master omap_w1_master = { @@ -656,11 +511,39 @@ static struct w1_bus_master omap_w1_master = { .reset_bus = omap_w1_reset_bus, }; +static int __maybe_unused omap_hdq_runtime_suspend(struct device *dev) +{ + struct hdq_data *hdq_data = dev_get_drvdata(dev); + + hdq_reg_out(hdq_data, 0, hdq_data->mode); + hdq_reg_in(hdq_data, OMAP_HDQ_INT_STATUS); + + return 0; +} + +static int __maybe_unused omap_hdq_runtime_resume(struct device *dev) +{ + struct hdq_data *hdq_data = dev_get_drvdata(dev); + + /* select HDQ/1W mode & enable clocks */ + hdq_reg_out(hdq_data, OMAP_HDQ_CTRL_STATUS, + OMAP_HDQ_CTRL_STATUS_CLOCKENABLE | + OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK | + hdq_data->mode); + hdq_reg_in(hdq_data, OMAP_HDQ_INT_STATUS); + + return 0; +} + +static const struct dev_pm_ops omap_hdq_pm_ops = { + SET_RUNTIME_PM_OPS(omap_hdq_runtime_suspend, + omap_hdq_runtime_resume, NULL) +}; + static int omap_hdq_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct hdq_data *hdq_data; - struct resource *res; int ret, irq; u8 rev; const char *mode; @@ -674,28 +557,31 @@ static int omap_hdq_probe(struct platform_device *pdev) hdq_data->dev = dev; platform_set_drvdata(pdev, hdq_data); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - hdq_data->hdq_base = devm_ioremap_resource(dev, res); + hdq_data->hdq_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(hdq_data->hdq_base)) return PTR_ERR(hdq_data->hdq_base); - hdq_data->hdq_usecount = 0; - hdq_data->rrw = 0; mutex_init(&hdq_data->hdq_mutex); + ret = of_property_read_string(pdev->dev.of_node, "ti,mode", &mode); + if (ret < 0 || !strcmp(mode, "hdq")) { + hdq_data->mode = 0; + omap_w1_master.search = omap_w1_search_bus; + } else { + hdq_data->mode = 1; + omap_w1_master.triplet = omap_w1_triplet; + } + pm_runtime_enable(&pdev->dev); + pm_runtime_use_autosuspend(&pdev->dev); + pm_runtime_set_autosuspend_delay(&pdev->dev, 300); ret = pm_runtime_get_sync(&pdev->dev); if (ret < 0) { + pm_runtime_put_noidle(&pdev->dev); dev_dbg(&pdev->dev, "pm_runtime_get_sync failed\n"); goto err_w1; } - ret = _omap_hdq_reset(hdq_data); - if (ret) { - dev_dbg(&pdev->dev, "reset failed\n"); - goto err_irq; - } - rev = hdq_reg_in(hdq_data, OMAP_HDQ_REVISION); dev_info(&pdev->dev, "OMAP HDQ Hardware Rev %c.%c. Driver in %s mode\n", (rev >> 4) + '0', (rev & 0x0f) + '0', "Interrupt"); @@ -717,16 +603,8 @@ static int omap_hdq_probe(struct platform_device *pdev) omap_hdq_break(hdq_data); - pm_runtime_put_sync(&pdev->dev); - - ret = of_property_read_string(pdev->dev.of_node, "ti,mode", &mode); - if (ret < 0 || !strcmp(mode, "hdq")) { - hdq_data->mode = 0; - omap_w1_master.search = omap_w1_search_bus; - } else { - hdq_data->mode = 1; - omap_w1_master.triplet = omap_w1_triplet; - } + pm_runtime_mark_last_busy(&pdev->dev); + pm_runtime_put_autosuspend(&pdev->dev); omap_w1_master.data = hdq_data; @@ -741,6 +619,7 @@ static int omap_hdq_probe(struct platform_device *pdev) err_irq: pm_runtime_put_sync(&pdev->dev); err_w1: + pm_runtime_dont_use_autosuspend(&pdev->dev); pm_runtime_disable(&pdev->dev); return ret; @@ -748,23 +627,19 @@ err_w1: static int omap_hdq_remove(struct platform_device *pdev) { - struct hdq_data *hdq_data = platform_get_drvdata(pdev); + int active; - mutex_lock(&hdq_data->hdq_mutex); - - if (hdq_data->hdq_usecount) { - dev_dbg(&pdev->dev, "removed when use count is not zero\n"); - mutex_unlock(&hdq_data->hdq_mutex); - return -EBUSY; - } + active = pm_runtime_get_sync(&pdev->dev); + if (active < 0) + pm_runtime_put_noidle(&pdev->dev); - mutex_unlock(&hdq_data->hdq_mutex); + w1_remove_master_device(&omap_w1_master); - /* remove module dependency */ + pm_runtime_dont_use_autosuspend(&pdev->dev); + if (active >= 0) + pm_runtime_put_sync(&pdev->dev); pm_runtime_disable(&pdev->dev); - w1_remove_master_device(&omap_w1_master); - return 0; } @@ -781,6 +656,7 @@ static struct platform_driver omap_hdq_driver = { .driver = { .name = "omap_hdq", .of_match_table = omap_hdq_dt_ids, + .pm = &omap_hdq_pm_ops, }, }; module_platform_driver(omap_hdq_driver); diff --git a/drivers/w1/masters/sgi_w1.c b/drivers/w1/masters/sgi_w1.c new file mode 100644 index 000000000000..e8c7fa68d3cc --- /dev/null +++ b/drivers/w1/masters/sgi_w1.c @@ -0,0 +1,128 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * sgi_w1.c - w1 master driver for one wire support in SGI ASICs + */ + +#include <linux/clk.h> +#include <linux/delay.h> +#include <linux/io.h> +#include <linux/jiffies.h> +#include <linux/module.h> +#include <linux/mod_devicetable.h> +#include <linux/platform_device.h> +#include <linux/platform_data/sgi-w1.h> + +#include <linux/w1.h> + +#define MCR_RD_DATA BIT(0) +#define MCR_DONE BIT(1) + +#define MCR_PACK(pulse, sample) (((pulse) << 10) | ((sample) << 2)) + +struct sgi_w1_device { + u32 __iomem *mcr; + struct w1_bus_master bus_master; + char dev_id[64]; +}; + +static u8 sgi_w1_wait(u32 __iomem *mcr) +{ + u32 mcr_val; + + do { + mcr_val = readl(mcr); + } while (!(mcr_val & MCR_DONE)); + + return (mcr_val & MCR_RD_DATA) ? 1 : 0; +} + +/* + * this is the low level routine to + * reset the device on the One Wire interface + * on the hardware + */ +static u8 sgi_w1_reset_bus(void *data) +{ + struct sgi_w1_device *dev = data; + u8 ret; + + writel(MCR_PACK(520, 65), dev->mcr); + ret = sgi_w1_wait(dev->mcr); + udelay(500); /* recovery time */ + return ret; +} + +/* + * this is the low level routine to read/write a bit on the One Wire + * interface on the hardware. It does write 0 if parameter bit is set + * to 0, otherwise a write 1/read. + */ +static u8 sgi_w1_touch_bit(void *data, u8 bit) +{ + struct sgi_w1_device *dev = data; + u8 ret; + + if (bit) + writel(MCR_PACK(6, 13), dev->mcr); + else + writel(MCR_PACK(80, 30), dev->mcr); + + ret = sgi_w1_wait(dev->mcr); + if (bit) + udelay(100); /* recovery */ + return ret; +} + +static int sgi_w1_probe(struct platform_device *pdev) +{ + struct sgi_w1_device *sdev; + struct sgi_w1_platform_data *pdata; + + sdev = devm_kzalloc(&pdev->dev, sizeof(struct sgi_w1_device), + GFP_KERNEL); + if (!sdev) + return -ENOMEM; + + sdev->mcr = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(sdev->mcr)) + return PTR_ERR(sdev->mcr); + + sdev->bus_master.data = sdev; + sdev->bus_master.reset_bus = sgi_w1_reset_bus; + sdev->bus_master.touch_bit = sgi_w1_touch_bit; + + pdata = dev_get_platdata(&pdev->dev); + if (pdata) { + strlcpy(sdev->dev_id, pdata->dev_id, sizeof(sdev->dev_id)); + sdev->bus_master.dev_id = sdev->dev_id; + } + + platform_set_drvdata(pdev, sdev); + + return w1_add_master_device(&sdev->bus_master); +} + +/* + * disassociate the w1 device from the driver + */ +static int sgi_w1_remove(struct platform_device *pdev) +{ + struct sgi_w1_device *sdev = platform_get_drvdata(pdev); + + w1_remove_master_device(&sdev->bus_master); + + return 0; +} + +static struct platform_driver sgi_w1_driver = { + .driver = { + .name = "sgi_w1", + }, + .probe = sgi_w1_probe, + .remove = sgi_w1_remove, +}; +module_platform_driver(sgi_w1_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Thomas Bogendoerfer"); +MODULE_DESCRIPTION("Driver for One-Wire IP in SGI ASICs"); diff --git a/drivers/w1/slaves/Kconfig b/drivers/w1/slaves/Kconfig index 37aaad26b373..687753889c34 100644 --- a/drivers/w1/slaves/Kconfig +++ b/drivers/w1/slaves/Kconfig @@ -74,6 +74,14 @@ config W1_SLAVE_DS2805 organized as 7 pages of 16 bytes each with 64bit unique number. Requires OverDrive Speed to talk to. +config W1_SLAVE_DS2430 + tristate "256b EEPROM family support (DS2430)" + help + Say Y here if you want to use a 1-wire 256bit EEPROM + family device (DS2430). + This EEPROM is organized as one page of 32 bytes for random + access. + config W1_SLAVE_DS2431 tristate "1kb EEPROM family support (DS2431)" help @@ -101,6 +109,13 @@ config W1_SLAVE_DS2438 Say Y here if you want to use a 1-wire DS2438 Smart Battery Monitor device support +config W1_SLAVE_DS250X + tristate "512b/1kb/16kb EPROM family support" + select CRC16 + help + Say Y here if you want to use a 1-wire + 512b/1kb/16kb EPROM family device (DS250x). + config W1_SLAVE_DS2780 tristate "Dallas 2780 battery monitor chip" help diff --git a/drivers/w1/slaves/Makefile b/drivers/w1/slaves/Makefile index eab29f151413..278bcf2a9bfd 100644 --- a/drivers/w1/slaves/Makefile +++ b/drivers/w1/slaves/Makefile @@ -10,10 +10,12 @@ obj-$(CONFIG_W1_SLAVE_DS2408) += w1_ds2408.o obj-$(CONFIG_W1_SLAVE_DS2413) += w1_ds2413.o obj-$(CONFIG_W1_SLAVE_DS2406) += w1_ds2406.o obj-$(CONFIG_W1_SLAVE_DS2423) += w1_ds2423.o +obj-$(CONFIG_W1_SLAVE_DS2430) += w1_ds2430.o obj-$(CONFIG_W1_SLAVE_DS2431) += w1_ds2431.o obj-$(CONFIG_W1_SLAVE_DS2805) += w1_ds2805.o obj-$(CONFIG_W1_SLAVE_DS2433) += w1_ds2433.o obj-$(CONFIG_W1_SLAVE_DS2438) += w1_ds2438.o +obj-$(CONFIG_W1_SLAVE_DS250X) += w1_ds250x.o obj-$(CONFIG_W1_SLAVE_DS2780) += w1_ds2780.o obj-$(CONFIG_W1_SLAVE_DS2781) += w1_ds2781.o obj-$(CONFIG_W1_SLAVE_DS28E04) += w1_ds28e04.o diff --git a/drivers/w1/slaves/w1_ds2430.c b/drivers/w1/slaves/w1_ds2430.c new file mode 100644 index 000000000000..6fb0563fb2ae --- /dev/null +++ b/drivers/w1/slaves/w1_ds2430.c @@ -0,0 +1,295 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * w1_ds2430.c - w1 family 14 (DS2430) driver + ** + * Copyright (c) 2019 Angelo Dureghello <angelo.dureghello@timesys.com> + * + * Cloned and modified from ds2431 + * Copyright (c) 2008 Bernhard Weirich <bernhard.weirich@riedel.net> + * + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/device.h> +#include <linux/types.h> +#include <linux/delay.h> + +#include <linux/w1.h> + +#define W1_EEPROM_DS2430 0x14 + +#define W1_F14_EEPROM_SIZE 32 +#define W1_F14_PAGE_COUNT 1 +#define W1_F14_PAGE_BITS 5 +#define W1_F14_PAGE_SIZE (1 << W1_F14_PAGE_BITS) +#define W1_F14_PAGE_MASK 0x1F + +#define W1_F14_SCRATCH_BITS 5 +#define W1_F14_SCRATCH_SIZE (1 << W1_F14_SCRATCH_BITS) +#define W1_F14_SCRATCH_MASK (W1_F14_SCRATCH_SIZE-1) + +#define W1_F14_READ_EEPROM 0xF0 +#define W1_F14_WRITE_SCRATCH 0x0F +#define W1_F14_READ_SCRATCH 0xAA +#define W1_F14_COPY_SCRATCH 0x55 +#define W1_F14_VALIDATION_KEY 0xa5 + +#define W1_F14_TPROG_MS 11 +#define W1_F14_READ_RETRIES 10 +#define W1_F14_READ_MAXLEN W1_F14_SCRATCH_SIZE + +/* + * Check the file size bounds and adjusts count as needed. + * This would not be needed if the file size didn't reset to 0 after a write. + */ +static inline size_t w1_f14_fix_count(loff_t off, size_t count, size_t size) +{ + if (off > size) + return 0; + + if ((off + count) > size) + return size - off; + + return count; +} + +/* + * Read a block from W1 ROM two times and compares the results. + * If they are equal they are returned, otherwise the read + * is repeated W1_F14_READ_RETRIES times. + * + * count must not exceed W1_F14_READ_MAXLEN. + */ +static int w1_f14_readblock(struct w1_slave *sl, int off, int count, char *buf) +{ + u8 wrbuf[2]; + u8 cmp[W1_F14_READ_MAXLEN]; + int tries = W1_F14_READ_RETRIES; + + do { + wrbuf[0] = W1_F14_READ_EEPROM; + wrbuf[1] = off & 0xff; + + if (w1_reset_select_slave(sl)) + return -1; + + w1_write_block(sl->master, wrbuf, 2); + w1_read_block(sl->master, buf, count); + + if (w1_reset_select_slave(sl)) + return -1; + + w1_write_block(sl->master, wrbuf, 2); + w1_read_block(sl->master, cmp, count); + + if (!memcmp(cmp, buf, count)) + return 0; + } while (--tries); + + dev_err(&sl->dev, "proof reading failed %d times\n", + W1_F14_READ_RETRIES); + + return -1; +} + +static ssize_t eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, char *buf, + loff_t off, size_t count) +{ + struct w1_slave *sl = kobj_to_w1_slave(kobj); + int todo = count; + + count = w1_f14_fix_count(off, count, W1_F14_EEPROM_SIZE); + if (count == 0) + return 0; + + mutex_lock(&sl->master->bus_mutex); + + /* read directly from the EEPROM in chunks of W1_F14_READ_MAXLEN */ + while (todo > 0) { + int block_read; + + if (todo >= W1_F14_READ_MAXLEN) + block_read = W1_F14_READ_MAXLEN; + else + block_read = todo; + + if (w1_f14_readblock(sl, off, block_read, buf) < 0) + count = -EIO; + + todo -= W1_F14_READ_MAXLEN; + buf += W1_F14_READ_MAXLEN; + off += W1_F14_READ_MAXLEN; + } + + mutex_unlock(&sl->master->bus_mutex); + + return count; +} + +/* + * Writes to the scratchpad and reads it back for verification. + * Then copies the scratchpad to EEPROM. + * The data must be aligned at W1_F14_SCRATCH_SIZE bytes and + * must be W1_F14_SCRATCH_SIZE bytes long. + * The master must be locked. + * + * @param sl The slave structure + * @param addr Address for the write + * @param len length must be <= (W1_F14_PAGE_SIZE - (addr & W1_F14_PAGE_MASK)) + * @param data The data to write + * @return 0=Success -1=failure + */ +static int w1_f14_write(struct w1_slave *sl, int addr, int len, const u8 *data) +{ + int tries = W1_F14_READ_RETRIES; + u8 wrbuf[2]; + u8 rdbuf[W1_F14_SCRATCH_SIZE + 3]; + +retry: + + /* Write the data to the scratchpad */ + if (w1_reset_select_slave(sl)) + return -1; + + wrbuf[0] = W1_F14_WRITE_SCRATCH; + wrbuf[1] = addr & 0xff; + + w1_write_block(sl->master, wrbuf, 2); + w1_write_block(sl->master, data, len); + + /* Read the scratchpad and verify */ + if (w1_reset_select_slave(sl)) + return -1; + + w1_write_8(sl->master, W1_F14_READ_SCRATCH); + w1_read_block(sl->master, rdbuf, len + 2); + + /* + * Compare what was read against the data written + * Note: on read scratchpad, device returns 2 bulk 0xff bytes, + * to be discarded. + */ + if ((memcmp(data, &rdbuf[2], len) != 0)) { + + if (--tries) + goto retry; + + dev_err(&sl->dev, + "could not write to eeprom, scratchpad compare failed %d times\n", + W1_F14_READ_RETRIES); + + return -1; + } + + /* Copy the scratchpad to EEPROM */ + if (w1_reset_select_slave(sl)) + return -1; + + wrbuf[0] = W1_F14_COPY_SCRATCH; + wrbuf[1] = W1_F14_VALIDATION_KEY; + w1_write_block(sl->master, wrbuf, 2); + + /* Sleep for tprog ms to wait for the write to complete */ + msleep(W1_F14_TPROG_MS); + + /* Reset the bus to wake up the EEPROM */ + w1_reset_bus(sl->master); + + return 0; +} + +static ssize_t eeprom_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, char *buf, + loff_t off, size_t count) +{ + struct w1_slave *sl = kobj_to_w1_slave(kobj); + int addr, len; + int copy; + + count = w1_f14_fix_count(off, count, W1_F14_EEPROM_SIZE); + if (count == 0) + return 0; + + mutex_lock(&sl->master->bus_mutex); + + /* Can only write data in blocks of the size of the scratchpad */ + addr = off; + len = count; + while (len > 0) { + + /* if len too short or addr not aligned */ + if (len < W1_F14_SCRATCH_SIZE || addr & W1_F14_SCRATCH_MASK) { + char tmp[W1_F14_SCRATCH_SIZE]; + + /* read the block and update the parts to be written */ + if (w1_f14_readblock(sl, addr & ~W1_F14_SCRATCH_MASK, + W1_F14_SCRATCH_SIZE, tmp)) { + count = -EIO; + goto out_up; + } + + /* copy at most to the boundary of the PAGE or len */ + copy = W1_F14_SCRATCH_SIZE - + (addr & W1_F14_SCRATCH_MASK); + + if (copy > len) + copy = len; + + memcpy(&tmp[addr & W1_F14_SCRATCH_MASK], buf, copy); + if (w1_f14_write(sl, addr & ~W1_F14_SCRATCH_MASK, + W1_F14_SCRATCH_SIZE, tmp) < 0) { + count = -EIO; + goto out_up; + } + } else { + + copy = W1_F14_SCRATCH_SIZE; + if (w1_f14_write(sl, addr, copy, buf) < 0) { + count = -EIO; + goto out_up; + } + } + buf += copy; + addr += copy; + len -= copy; + } + +out_up: + mutex_unlock(&sl->master->bus_mutex); + + return count; +} + +static BIN_ATTR_RW(eeprom, W1_F14_EEPROM_SIZE); + +static struct bin_attribute *w1_f14_bin_attrs[] = { + &bin_attr_eeprom, + NULL, +}; + +static const struct attribute_group w1_f14_group = { + .bin_attrs = w1_f14_bin_attrs, +}; + +static const struct attribute_group *w1_f14_groups[] = { + &w1_f14_group, + NULL, +}; + +static struct w1_family_ops w1_f14_fops = { + .groups = w1_f14_groups, +}; + +static struct w1_family w1_family_14 = { + .fid = W1_EEPROM_DS2430, + .fops = &w1_f14_fops, +}; +module_w1_family(w1_family_14); + +MODULE_AUTHOR("Angelo Dureghello <angelo.dureghello@timesys.com>"); +MODULE_DESCRIPTION("w1 family 14 driver for DS2430, 256kb EEPROM"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("w1-family-" __stringify(W1_EEPROM_DS2430)); diff --git a/drivers/w1/slaves/w1_ds250x.c b/drivers/w1/slaves/w1_ds250x.c new file mode 100644 index 000000000000..e507117444d8 --- /dev/null +++ b/drivers/w1/slaves/w1_ds250x.c @@ -0,0 +1,290 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * w1_ds250x.c - w1 family 09/0b/89/91 (DS250x) driver + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/device.h> +#include <linux/types.h> +#include <linux/delay.h> +#include <linux/slab.h> +#include <linux/crc16.h> + +#include <linux/w1.h> +#include <linux/nvmem-provider.h> + +#define W1_DS2501_UNW_FAMILY 0x91 +#define W1_DS2501_SIZE 64 + +#define W1_DS2502_FAMILY 0x09 +#define W1_DS2502_UNW_FAMILY 0x89 +#define W1_DS2502_SIZE 128 + +#define W1_DS2505_FAMILY 0x0b +#define W1_DS2505_SIZE 2048 + +#define W1_PAGE_SIZE 32 + +#define W1_EXT_READ_MEMORY 0xA5 +#define W1_READ_DATA_CRC 0xC3 + +#define OFF2PG(off) ((off) / W1_PAGE_SIZE) + +#define CRC16_INIT 0 +#define CRC16_VALID 0xb001 + +struct w1_eprom_data { + size_t size; + int (*read)(struct w1_slave *sl, int pageno); + u8 eprom[W1_DS2505_SIZE]; + DECLARE_BITMAP(page_present, W1_DS2505_SIZE / W1_PAGE_SIZE); + char nvmem_name[64]; +}; + +static int w1_ds2502_read_page(struct w1_slave *sl, int pageno) +{ + struct w1_eprom_data *data = sl->family_data; + int pgoff = pageno * W1_PAGE_SIZE; + int ret = -EIO; + u8 buf[3]; + u8 crc8; + + if (test_bit(pageno, data->page_present)) + return 0; /* page already present */ + + mutex_lock(&sl->master->bus_mutex); + + if (w1_reset_select_slave(sl)) + goto err; + + buf[0] = W1_READ_DATA_CRC; + buf[1] = pgoff & 0xff; + buf[2] = pgoff >> 8; + w1_write_block(sl->master, buf, 3); + + crc8 = w1_read_8(sl->master); + if (w1_calc_crc8(buf, 3) != crc8) + goto err; + + w1_read_block(sl->master, &data->eprom[pgoff], W1_PAGE_SIZE); + + crc8 = w1_read_8(sl->master); + if (w1_calc_crc8(&data->eprom[pgoff], W1_PAGE_SIZE) != crc8) + goto err; + + set_bit(pageno, data->page_present); /* mark page present */ + ret = 0; +err: + mutex_unlock(&sl->master->bus_mutex); + return ret; +} + +static int w1_ds2505_read_page(struct w1_slave *sl, int pageno) +{ + struct w1_eprom_data *data = sl->family_data; + int redir_retries = 16; + int pgoff, epoff; + int ret = -EIO; + u8 buf[6]; + u8 redir; + u16 crc; + + if (test_bit(pageno, data->page_present)) + return 0; /* page already present */ + + epoff = pgoff = pageno * W1_PAGE_SIZE; + mutex_lock(&sl->master->bus_mutex); + +retry: + if (w1_reset_select_slave(sl)) + goto err; + + buf[0] = W1_EXT_READ_MEMORY; + buf[1] = pgoff & 0xff; + buf[2] = pgoff >> 8; + w1_write_block(sl->master, buf, 3); + w1_read_block(sl->master, buf + 3, 3); /* redir, crc16 */ + redir = buf[3]; + crc = crc16(CRC16_INIT, buf, 6); + + if (crc != CRC16_VALID) + goto err; + + + if (redir != 0xff) { + redir_retries--; + if (redir_retries < 0) + goto err; + + pgoff = (redir ^ 0xff) * W1_PAGE_SIZE; + goto retry; + } + + w1_read_block(sl->master, &data->eprom[epoff], W1_PAGE_SIZE); + w1_read_block(sl->master, buf, 2); /* crc16 */ + crc = crc16(CRC16_INIT, &data->eprom[epoff], W1_PAGE_SIZE); + crc = crc16(crc, buf, 2); + + if (crc != CRC16_VALID) + goto err; + + set_bit(pageno, data->page_present); + ret = 0; +err: + mutex_unlock(&sl->master->bus_mutex); + return ret; +} + +static int w1_nvmem_read(void *priv, unsigned int off, void *buf, size_t count) +{ + struct w1_slave *sl = priv; + struct w1_eprom_data *data = sl->family_data; + size_t eprom_size = data->size; + int ret; + int i; + + if (off > eprom_size) + return -EINVAL; + + if ((off + count) > eprom_size) + count = eprom_size - off; + + i = OFF2PG(off); + do { + ret = data->read(sl, i++); + if (ret < 0) + return ret; + } while (i < OFF2PG(off + count)); + + memcpy(buf, &data->eprom[off], count); + return 0; +} + +static int w1_eprom_add_slave(struct w1_slave *sl) +{ + struct w1_eprom_data *data; + struct nvmem_device *nvmem; + struct nvmem_config nvmem_cfg = { + .dev = &sl->dev, + .reg_read = w1_nvmem_read, + .type = NVMEM_TYPE_OTP, + .read_only = true, + .word_size = 1, + .priv = sl, + .id = -1 + }; + + data = devm_kzalloc(&sl->dev, sizeof(struct w1_eprom_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + sl->family_data = data; + switch (sl->family->fid) { + case W1_DS2501_UNW_FAMILY: + data->size = W1_DS2501_SIZE; + data->read = w1_ds2502_read_page; + break; + case W1_DS2502_FAMILY: + case W1_DS2502_UNW_FAMILY: + data->size = W1_DS2502_SIZE; + data->read = w1_ds2502_read_page; + break; + case W1_DS2505_FAMILY: + data->size = W1_DS2505_SIZE; + data->read = w1_ds2505_read_page; + break; + } + + if (sl->master->bus_master->dev_id) + snprintf(data->nvmem_name, sizeof(data->nvmem_name), + "%s-%02x-%012llx", + sl->master->bus_master->dev_id, sl->reg_num.family, + (unsigned long long)sl->reg_num.id); + else + snprintf(data->nvmem_name, sizeof(data->nvmem_name), + "%02x-%012llx", + sl->reg_num.family, + (unsigned long long)sl->reg_num.id); + + nvmem_cfg.name = data->nvmem_name; + nvmem_cfg.size = data->size; + + nvmem = devm_nvmem_register(&sl->dev, &nvmem_cfg); + return PTR_ERR_OR_ZERO(nvmem); +} + +static struct w1_family_ops w1_eprom_fops = { + .add_slave = w1_eprom_add_slave, +}; + +static struct w1_family w1_family_09 = { + .fid = W1_DS2502_FAMILY, + .fops = &w1_eprom_fops, +}; + +static struct w1_family w1_family_0b = { + .fid = W1_DS2505_FAMILY, + .fops = &w1_eprom_fops, +}; + +static struct w1_family w1_family_89 = { + .fid = W1_DS2502_UNW_FAMILY, + .fops = &w1_eprom_fops, +}; + +static struct w1_family w1_family_91 = { + .fid = W1_DS2501_UNW_FAMILY, + .fops = &w1_eprom_fops, +}; + +static int __init w1_ds250x_init(void) +{ + int err; + + err = w1_register_family(&w1_family_09); + if (err) + return err; + + err = w1_register_family(&w1_family_0b); + if (err) + goto err_0b; + + err = w1_register_family(&w1_family_89); + if (err) + goto err_89; + + err = w1_register_family(&w1_family_91); + if (err) + goto err_91; + + return 0; + +err_91: + w1_unregister_family(&w1_family_89); +err_89: + w1_unregister_family(&w1_family_0b); +err_0b: + w1_unregister_family(&w1_family_09); + return err; +} + +static void __exit w1_ds250x_exit(void) +{ + w1_unregister_family(&w1_family_09); + w1_unregister_family(&w1_family_0b); + w1_unregister_family(&w1_family_89); + w1_unregister_family(&w1_family_91); +} + +module_init(w1_ds250x_init); +module_exit(w1_ds250x_exit); + +MODULE_AUTHOR("Thomas Bogendoerfer <tbogendoerfe@suse.de>"); +MODULE_DESCRIPTION("w1 family driver for DS250x Add Only Memory"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("w1-family-" __stringify(W1_DS2502_FAMILY)); +MODULE_ALIAS("w1-family-" __stringify(W1_DS2505_FAMILY)); +MODULE_ALIAS("w1-family-" __stringify(W1_DS2501_UNW_FAMILY)); +MODULE_ALIAS("w1-family-" __stringify(W1_DS2502_UNW_FAMILY)); |