diff options
Diffstat (limited to 'drivers/net/wireless/intel/iwlwifi/iwl-config.h')
| -rw-r--r-- | drivers/net/wireless/intel/iwlwifi/iwl-config.h | 140 |
1 files changed, 70 insertions, 70 deletions
diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-config.h b/drivers/net/wireless/intel/iwlwifi/iwl-config.h index 1c1bf1b281cd..be6a2bf9ce74 100644 --- a/drivers/net/wireless/intel/iwlwifi/iwl-config.h +++ b/drivers/net/wireless/intel/iwlwifi/iwl-config.h @@ -88,7 +88,6 @@ enum iwl_device_family { IWL_DEVICE_FAMILY_8000, IWL_DEVICE_FAMILY_9000, IWL_DEVICE_FAMILY_22000, - IWL_DEVICE_FAMILY_22560, IWL_DEVICE_FAMILY_AX210, }; @@ -161,7 +160,8 @@ static inline u8 num_of_ant(u8 mask) !!((mask) & ANT_C); } -/* +/** + * struct iwl_base_params - params not likely to change within a device family * @max_ll_items: max number of OTP blocks * @shadow_ram_support: shadow support for OTP memory * @led_compensation: compensate on the led on/off time per HW according @@ -285,53 +285,57 @@ struct iwl_pwr_tx_backoff { }; /** - * struct iwl_csr_params + * struct iwl_cfg_trans - information needed to start the trans + * + * These values cannot be changed when multiple configs are used for a + * single PCI ID, because they are needed before the HW REV or RFID + * can be read. * - * @flag_sw_reset: reset the device - * @flag_mac_clock_ready: - * Indicates MAC (ucode processor, etc.) is powered up and can run. - * Internal resources are accessible. - * NOTE: This does not indicate that the processor is actually running. - * NOTE: This does not indicate that device has completed - * init or post-power-down restore of internal SRAM memory. - * Use CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP as indication that - * SRAM is restored and uCode is in normal operation mode. - * This note is relevant only for pre 5xxx devices. - * NOTE: After device reset, this bit remains "0" until host sets - * INIT_DONE - * @flag_init_done: Host sets this to put device into fully operational - * D0 power mode. Host resets this after SW_RESET to put device into - * low power mode. - * @flag_mac_access_req: Host sets this to request and maintain MAC wakeup, - * to allow host access to device-internal resources. Host must wait for - * mac_clock_ready (and !GOING_TO_SLEEP) before accessing non-CSR device - * registers. - * @flag_val_mac_access_en: mac access is enabled - * @flag_master_dis: disable master - * @flag_stop_master: stop master - * @addr_sw_reset: address for resetting the device - * @mac_addr0_otp: first part of MAC address from OTP - * @mac_addr1_otp: second part of MAC address from OTP - * @mac_addr0_strap: first part of MAC address from strap - * @mac_addr1_strap: second part of MAC address from strap + * @base_params: pointer to basic parameters + * @csr: csr flags and addresses that are different across devices + * @device_family: the device family + * @umac_prph_offset: offset to add to UMAC periphery address + * @rf_id: need to read rf_id to determine the firmware image + * @use_tfh: use TFH + * @gen2: 22000 and on transport operation + * @mq_rx_supported: multi-queue rx support + */ +struct iwl_cfg_trans_params { + const struct iwl_base_params *base_params; + enum iwl_device_family device_family; + u32 umac_prph_offset; + u32 rf_id:1, + use_tfh:1, + gen2:1, + mq_rx_supported:1, + bisr_workaround:1; +}; + +/** + * struct iwl_fw_mon_reg - FW monitor register info + * @addr: register address + * @mask: register mask */ -struct iwl_csr_params { - u8 flag_sw_reset; - u8 flag_mac_clock_ready; - u8 flag_init_done; - u8 flag_mac_access_req; - u8 flag_val_mac_access_en; - u8 flag_master_dis; - u8 flag_stop_master; - u8 addr_sw_reset; - u32 mac_addr0_otp; - u32 mac_addr1_otp; - u32 mac_addr0_strap; - u32 mac_addr1_strap; +struct iwl_fw_mon_reg { + u32 addr; + u32 mask; +}; + +/** + * struct iwl_fw_mon_regs - FW monitor registers + * @write_ptr: write pointer register + * @cycle_cnt: cycle count register + * @cur_frag: current fragment in use + */ +struct iwl_fw_mon_regs { + struct iwl_fw_mon_reg write_ptr; + struct iwl_fw_mon_reg cycle_cnt; + struct iwl_fw_mon_reg cur_frag; }; /** * struct iwl_cfg + * @trans: the trans-specific configuration part * @name: Official name of the device * @fw_name_pre: Firmware filename prefix. The api version and extension * (.ucode) will be added to filename before loading from disk. The @@ -346,10 +350,10 @@ struct iwl_csr_params { * @nvm_ver: NVM version * @nvm_calib_ver: NVM calibration version * @lib: pointer to the lib ops - * @base_params: pointer to basic parameters * @ht_params: point to ht parameters * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off) * @rx_with_siso_diversity: 1x1 device with rx antenna diversity + * @tx_with_siso_diversity: 1x1 device with tx antenna diversity * @internal_wimax_coex: internal wifi/wimax combo device * @high_temp: Is this NIC is designated to be in high temperature. * @host_interrupt_operation_mode: device needs host interrupt operation @@ -358,8 +362,6 @@ struct iwl_csr_params { * @mac_addr_from_csr: read HW address from CSR registers * @features: hw features, any combination of feature_whitelist * @pwr_tx_backoffs: translation table between power limits and backoffs - * @csr: csr flags and addresses that are different across devices - * @max_rx_agg_size: max RX aggregation size of the ADDBA request/response * @max_tx_agg_size: max TX aggregation size of the ADDBA request/response * @max_ht_ampdu_factor: the exponent of the max length of A-MPDU that the * station can receive in HT @@ -371,40 +373,35 @@ struct iwl_csr_params { * @dccm2_len: length of the second DCCM * @smem_offset: offset from which the SMEM begins * @smem_len: the length of SMEM - * @mq_rx_supported: multi-queue rx support * @vht_mu_mimo_supported: VHT MU-MIMO support - * @rf_id: need to read rf_id to determine the firmware image * @integrated: discrete or integrated - * @gen2: 22000 and on transport operation * @cdb: CDB support * @nvm_type: see &enum iwl_nvm_type * @d3_debug_data_base_addr: base address where D3 debug data is stored * @d3_debug_data_length: length of the D3 debug data * @bisr_workaround: BISR hardware workaround (for 22260 series devices) * @min_txq_size: minimum number of slots required in a TX queue - * @umac_prph_offset: offset to add to UMAC periphery address * @uhb_supported: ultra high band channels supported * @min_256_ba_txq_size: minimum number of slots required in a TX queue which * supports 256 BA aggregation + * @num_rbds: number of receive buffer descriptors to use + * (only used for multi-queue capable devices) * * We enable the driver to be backward compatible wrt. hardware features. * API differences in uCode shouldn't be handled here but through TLVs * and/or the uCode API version instead. */ struct iwl_cfg { + struct iwl_cfg_trans_params trans; /* params specific to an individual device within a device family */ const char *name; const char *fw_name_pre; - /* params not likely to change within a device family */ - const struct iwl_base_params *base_params; /* params likely to change within a device family */ const struct iwl_ht_params *ht_params; const struct iwl_eeprom_params *eeprom_params; const struct iwl_pwr_tx_backoff *pwr_tx_backoffs; const char *default_nvm_file_C_step; const struct iwl_tt_params *thermal_params; - const struct iwl_csr_params *csr; - enum iwl_device_family device_family; enum iwl_led_mode led_mode; enum iwl_nvm_type nvm_type; u32 max_data_size; @@ -420,6 +417,7 @@ struct iwl_cfg { u16 nvm_ver; u16 nvm_calib_ver; u32 rx_with_siso_diversity:1, + tx_with_siso_diversity:1, bt_shared_single_ant:1, internal_wimax_coex:1, host_interrupt_operation_mode:1, @@ -428,46 +426,48 @@ struct iwl_cfg { lp_xtal_workaround:1, disable_dummy_notification:1, apmg_not_supported:1, - mq_rx_supported:1, vht_mu_mimo_supported:1, - rf_id:1, integrated:1, - use_tfh:1, - gen2:1, cdb:1, dbgc_supported:1, - bisr_workaround:1, uhb_supported:1; u8 valid_tx_ant; u8 valid_rx_ant; u8 non_shared_ant; u8 nvm_hw_section_num; - u8 max_rx_agg_size; u8 max_tx_agg_size; u8 max_ht_ampdu_exponent; u8 max_vht_ampdu_exponent; u8 ucode_api_max; u8 ucode_api_min; + u16 num_rbds; u32 min_umac_error_event_table; u32 extra_phy_cfg_flags; u32 d3_debug_data_base_addr; u32 d3_debug_data_length; u32 min_txq_size; - u32 umac_prph_offset; - u32 fw_mon_smem_write_ptr_addr; - u32 fw_mon_smem_write_ptr_msk; - u32 fw_mon_smem_cycle_cnt_ptr_addr; - u32 fw_mon_smem_cycle_cnt_ptr_msk; u32 gp2_reg_addr; u32 min_256_ba_txq_size; + const struct iwl_fw_mon_regs mon_dram_regs; + const struct iwl_fw_mon_regs mon_smem_regs; }; -extern const struct iwl_csr_params iwl_csr_v1; -extern const struct iwl_csr_params iwl_csr_v2; +#define IWL_CFG_ANY (~0) + +struct iwl_dev_info { + u16 device; + u16 subdevice; + const struct iwl_cfg *cfg; + const char *name; +}; /* * This list declares the config structures for all devices. */ +extern const struct iwl_cfg_trans_params iwl9000_trans_cfg; +extern const char iwl9260_160_name[]; +extern const char iwl9560_160_name[]; + #if IS_ENABLED(CONFIG_IWLDVM) extern const struct iwl_cfg iwl5300_agn_cfg; extern const struct iwl_cfg iwl5100_agn_cfg; @@ -561,9 +561,6 @@ extern const struct iwl_cfg iwl9560_2ac_cfg_shared_clk; extern const struct iwl_cfg iwl9560_2ac_160_cfg_shared_clk; extern const struct iwl_cfg iwl9560_killer_2ac_cfg_shared_clk; extern const struct iwl_cfg iwl9560_killer_s_2ac_cfg_shared_clk; -extern const struct iwl_cfg iwl22000_2ac_cfg_hr; -extern const struct iwl_cfg iwl22000_2ac_cfg_hr_cdb; -extern const struct iwl_cfg iwl22000_2ac_cfg_jf; extern const struct iwl_cfg iwl_ax101_cfg_qu_hr; extern const struct iwl_cfg iwl_ax101_cfg_qu_c0_hr_b0; extern const struct iwl_cfg iwl_ax101_cfg_quz_hr; @@ -577,6 +574,8 @@ extern const struct iwl_cfg iwl_ax1650i_cfg_quz_hr; extern const struct iwl_cfg iwl_ax1650s_cfg_quz_hr; extern const struct iwl_cfg killer1650s_2ax_cfg_qu_b0_hr_b0; extern const struct iwl_cfg killer1650i_2ax_cfg_qu_b0_hr_b0; +extern const struct iwl_cfg killer1650s_2ax_cfg_qu_c0_hr_b0; +extern const struct iwl_cfg killer1650i_2ax_cfg_qu_c0_hr_b0; extern const struct iwl_cfg killer1650x_2ax_cfg; extern const struct iwl_cfg killer1650w_2ax_cfg; extern const struct iwl_cfg iwl9461_2ac_cfg_qu_b0_jf_b0; @@ -600,6 +599,7 @@ extern const struct iwl_cfg iwlax210_2ax_cfg_so_hr_a0; extern const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0; extern const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0; extern const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0; +extern const struct iwl_cfg iwlax411_2ax_cfg_sosnj_gf4_a0; #endif /* CPTCFG_IWLMVM || CPTCFG_IWLFMAC */ #endif /* __IWL_CONFIG_H__ */ |
