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-rw-r--r--arch/mips/alchemy/common/setup.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/alchemy/common/setup.c b/arch/mips/alchemy/common/setup.c
index 1b887c868417..37ffd997c616 100644
--- a/arch/mips/alchemy/common/setup.c
+++ b/arch/mips/alchemy/common/setup.c
@@ -73,8 +73,8 @@ void __init plat_mem_setup(void)
/* This routine should be valid for all Au1x based boards */
phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size)
{
- u32 start = (u32)Au1500_PCI_MEM_START;
- u32 end = (u32)Au1500_PCI_MEM_END;
+ unsigned long start = ALCHEMY_PCI_MEMWIN_START;
+ unsigned long end = ALCHEMY_PCI_MEMWIN_END;
/* Don't fixup 36-bit addresses */
if ((phys_addr >> 32) != 0)
@@ -82,7 +82,7 @@ phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size)
/* Check for PCI memory window */
if (phys_addr >= start && (phys_addr + size - 1) <= end)
- return (phys_t)((phys_addr - start) + Au1500_PCI_MEM_START);
+ return (phys_t)(AU1500_PCI_MEM_PHYS_ADDR + phys_addr);
/* default nop */
return phys_addr;
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