diff options
Diffstat (limited to 'arch/m68k/include/asm/m52xxacr.h')
| -rw-r--r-- | arch/m68k/include/asm/m52xxacr.h | 31 |
1 files changed, 20 insertions, 11 deletions
diff --git a/arch/m68k/include/asm/m52xxacr.h b/arch/m68k/include/asm/m52xxacr.h index 701f680bced9..abc391a9ae8d 100644 --- a/arch/m68k/include/asm/m52xxacr.h +++ b/arch/m68k/include/asm/m52xxacr.h @@ -59,22 +59,31 @@ * that as on. */ #if defined(CONFIG_CACHE_I) -#define CACHE_TYPE CACR_DISD +#define CACHE_TYPE (CACR_DISD + CACR_EUSP) +#define CACHE_INVTYPEI 0 #elif defined(CONFIG_CACHE_D) -#define CACHE_TYPE CACR_DISI +#define CACHE_TYPE (CACR_DISI + CACR_EUSP) +#define CACHE_INVTYPED 0 +#elif defined(CONFIG_CACHE_BOTH) +#define CACHE_TYPE CACR_EUSP +#define CACHE_INVTYPEI CACR_INVI +#define CACHE_INVTYPED CACR_INVD #else -#define CACHE_TYPE +/* This is the instruction cache only devices (no split cache, no eusp) */ +#define CACHE_TYPE 0 +#define CACHE_INVTYPEI 0 #endif -#if defined(CONFIG_HAVE_CACHE_SPLIT) -#define CACHE_INIT (CACR_CINV + CACHE_TYPE + CACR_EUSP) -#define CACHE_MODE (CACR_CENB + CACHE_TYPE + CACR_DCM + CACR_EUSP) -#else -#define CACHE_INIT (CACR_CINV) -#define CACHE_MODE (CACR_CENB + CACR_DCM) -#endif +#define CACHE_INIT (CACR_CINV + CACHE_TYPE) +#define CACHE_MODE (CACR_CENB + CACHE_TYPE + CACR_DCM) -#define CACHE_INVALIDATE (CACHE_MODE + CACR_CINV) +#define CACHE_INVALIDATE (CACHE_MODE + CACR_CINV) +#if defined(CACHE_INVTYPEI) +#define CACHE_INVALIDATEI (CACHE_MODE + CACR_CINV + CACHE_INVTYPEI) +#endif +#if defined(CACHE_INVTYPED) +#define CACHE_INVALIDATED (CACHE_MODE + CACR_CINV + CACHE_INVTYPED) +#endif #define ACR0_MODE ((CONFIG_RAMBASE & 0xff000000) + \ (0x000f0000) + \ |
