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Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi28
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
index 1fc5060d7027..4a2d06abe9c1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
@@ -435,6 +435,28 @@
};
};
+&i2s0 {
+ pinctrl-0 = <&i2s0_2ch_bus>;
+ rockchip,playback-channels = <2>;
+ rockchip,capture-channels = <2>;
+ #sound-dai-cells = <0>;
+ status = "okay";
+};
+
+/*
+ * As Q7 does not specify neither a global nor a RX clock for I2S these
+ * signals are not used. Furthermore I2S0_LRCK_RX is used as GPIO.
+ * Therefore we have to redefine the i2s0_2ch_bus definition to prevent
+ * conflicts.
+ */
+&i2s0_2ch_bus {
+ rockchip,pins =
+ <RK_GPIO3 RK_PD0 RK_FUNC_1 &pcfg_pull_none>,
+ <RK_GPIO3 RK_PD2 RK_FUNC_1 &pcfg_pull_none>,
+ <RK_GPIO3 RK_PD3 RK_FUNC_1 &pcfg_pull_none>,
+ <RK_GPIO3 RK_PD7 RK_FUNC_1 &pcfg_pull_none>;
+};
+
&io_domains {
status = "okay";
bt656-supply = <&vcc_1v8>;
@@ -505,6 +527,12 @@
};
};
+&tsadc {
+ rockchip,hw-tshut-mode = <1>;
+ rockchip,hw-tshut-polarity = <1>;
+ status = "okay";
+};
+
&u2phy1 {
status = "okay";
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