diff options
Diffstat (limited to 'arch/arm/mach-spear/include/mach/spear.h')
| -rw-r--r-- | arch/arm/mach-spear/include/mach/spear.h | 28 |
1 files changed, 11 insertions, 17 deletions
diff --git a/arch/arm/mach-spear/include/mach/spear.h b/arch/arm/mach-spear/include/mach/spear.h index 2198ab96df9d..374ddc393df1 100644 --- a/arch/arm/mach-spear/include/mach/spear.h +++ b/arch/arm/mach-spear/include/mach/spear.h @@ -19,23 +19,23 @@ /* ICM1 - Low speed connection */ #define SPEAR_ICM1_2_BASE UL(0xD0000000) -#define VA_SPEAR_ICM1_2_BASE UL(0xFD000000) +#define VA_SPEAR_ICM1_2_BASE IOMEM(0xFD000000) #define SPEAR_ICM1_UART_BASE UL(0xD0000000) -#define VA_SPEAR_ICM1_UART_BASE (VA_SPEAR_ICM1_2_BASE | SPEAR_ICM1_UART_BASE) +#define VA_SPEAR_ICM1_UART_BASE (VA_SPEAR_ICM1_2_BASE - SPEAR_ICM1_2_BASE + SPEAR_ICM1_UART_BASE) #define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000) /* ML-1, 2 - Multi Layer CPU Subsystem */ #define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000) -#define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000) +#define VA_SPEAR6XX_ML_CPU_BASE IOMEM(0xF0000000) /* ICM3 - Basic Subsystem */ #define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000) -#define VA_SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000) +#define VA_SPEAR_ICM3_SMI_CTRL_BASE IOMEM(0xFC000000) #define SPEAR_ICM3_DMA_BASE UL(0xFC400000) #define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000) -#define VA_SPEAR_ICM3_SYS_CTRL_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_SYS_CTRL_BASE) +#define VA_SPEAR_ICM3_SYS_CTRL_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE - SPEAR_ICM3_SMI_CTRL_BASE + SPEAR_ICM3_SYS_CTRL_BASE) #define SPEAR_ICM3_MISC_REG_BASE UL(0xFCA80000) -#define VA_SPEAR_ICM3_MISC_REG_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_MISC_REG_BASE) +#define VA_SPEAR_ICM3_MISC_REG_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE - SPEAR_ICM3_SMI_CTRL_BASE + SPEAR_ICM3_MISC_REG_BASE) /* Debug uart for linux, will be used for debug and uncompress messages */ #define SPEAR_DBG_UART_BASE SPEAR_ICM1_UART_BASE @@ -44,20 +44,11 @@ /* Sysctl base for spear platform */ #define SPEAR_SYS_CTRL_BASE SPEAR_ICM3_SYS_CTRL_BASE #define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR_ICM3_SYS_CTRL_BASE +#endif /* SPEAR3xx || SPEAR6XX */ /* SPEAr320 Macros */ #define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000) -#define VA_SPEAR320_SOC_CONFIG_BASE UL(0xFE000000) -#define SPEAR320_CONTROL_REG IOMEM(VA_SPEAR320_SOC_CONFIG_BASE) -#define SPEAR320_EXT_CTRL_REG IOMEM(VA_SPEAR320_SOC_CONFIG_BASE + 0x0018) - #define SPEAR320_UARTX_PCLK_MASK 0x1 - #define SPEAR320_UART2_PCLK_SHIFT 8 - #define SPEAR320_UART3_PCLK_SHIFT 9 - #define SPEAR320_UART4_PCLK_SHIFT 10 - #define SPEAR320_UART5_PCLK_SHIFT 11 - #define SPEAR320_UART6_PCLK_SHIFT 12 - #define SPEAR320_RS485_PCLK_SHIFT 13 -#endif /* SPEAR3xx || SPEAR6XX */ +#define VA_SPEAR320_SOC_CONFIG_BASE IOMEM(0xFE000000) #ifdef CONFIG_ARCH_SPEAR13XX @@ -79,6 +70,9 @@ #define A9SM_AND_MPMC_BASE UL(0xEC000000) #define VA_A9SM_AND_MPMC_BASE IOMEM(0xFC000000) +#define SPEAR1310_RAS_BASE UL(0xD8400000) +#define VA_SPEAR1310_RAS_BASE IOMEM(UL(0xFA400000)) + /* A9SM peripheral offsets */ #define A9SM_PERIP_BASE UL(0xEC800000) #define VA_A9SM_PERIP_BASE IOMEM(0xFC800000) |
