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author | Tony Lindgren <tony@atomide.com> | 2011-11-07 12:27:23 -0800 |
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committer | Tony Lindgren <tony@atomide.com> | 2011-11-07 12:27:23 -0800 |
commit | d30cc16c8e48368e0518f4975a78711e53e14a0f (patch) | |
tree | 26b57f7ab5a963cc3d6c57dff6951bd930875583 /sound/soc/codecs/wm8962.c | |
parent | 41eb2d813f558900884e240c2f723e36c7bd151f (diff) | |
parent | a1bcc1dcef8451b4291ea2a1b2677cb194102952 (diff) | |
download | talos-op-linux-d30cc16c8e48368e0518f4975a78711e53e14a0f.tar.gz talos-op-linux-d30cc16c8e48368e0518f4975a78711e53e14a0f.zip |
Merge branch 'fixes-modulesplit' into fixes
Diffstat (limited to 'sound/soc/codecs/wm8962.c')
-rw-r--r-- | sound/soc/codecs/wm8962.c | 30 |
1 files changed, 20 insertions, 10 deletions
diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c index f60dfa16545e..91d3c6dbeba3 100644 --- a/sound/soc/codecs/wm8962.c +++ b/sound/soc/codecs/wm8962.c @@ -1961,7 +1961,13 @@ static int wm8962_readable_register(struct snd_soc_codec *codec, unsigned int re static int wm8962_reset(struct snd_soc_codec *codec) { - return snd_soc_write(codec, WM8962_SOFTWARE_RESET, 0x6243); + int ret; + + ret = snd_soc_write(codec, WM8962_SOFTWARE_RESET, 0x6243); + if (ret != 0) + return ret; + + return snd_soc_write(codec, WM8962_PLL_SOFTWARE_RESET, 0); } static const DECLARE_TLV_DB_SCALE(inpga_tlv, -2325, 75, 0); @@ -2360,15 +2366,14 @@ static int sysclk_event(struct snd_soc_dapm_widget *w, snd_soc_update_bits(codec, WM8962_FLL_CONTROL_1, WM8962_FLL_ENA, WM8962_FLL_ENA); - if (wm8962->irq) { - timeout = msecs_to_jiffies(5); - timeout = wait_for_completion_timeout(&wm8962->fll_lock, - timeout); - - if (timeout == 0) - dev_err(codec->dev, - "Timed out starting FLL\n"); - } + + timeout = msecs_to_jiffies(5); + timeout = wait_for_completion_timeout(&wm8962->fll_lock, + timeout); + + if (wm8962->irq && timeout == 0) + dev_err(codec->dev, + "Timed out starting FLL\n"); } break; @@ -4029,6 +4034,11 @@ static int wm8962_probe(struct snd_soc_codec *codec) snd_soc_update_bits(codec, WM8962_CLOCKING2, WM8962_CLKREG_OVD, WM8962_CLKREG_OVD); + /* Ensure that the oscillator and PLLs are disabled */ + snd_soc_update_bits(codec, WM8962_PLL2, + WM8962_OSC_ENA | WM8962_PLL2_ENA | WM8962_PLL3_ENA, + 0); + regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies); if (pdata) { |