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authorGanesan Ramalingam <ganesanr@broadcom.com>2014-05-09 16:35:49 +0530
committerRalf Baechle <ralf@linux-mips.org>2014-05-30 16:51:02 +0200
commitd66f3f0e10b49df8d0cc0d8eb5bf2ef9863a33cf (patch)
tree39f0d8fa0dacfd9f7ab7794bbdd330160af173c9 /net/netlabel/Makefile
parent1c98398662c9b4e2f03f64344f83dd6cb14e0420 (diff)
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MIPS: Add MSI support for XLP9XX
In XLP9XX, the interrupt routing table for MSI-X has been moved to the PCIe controller's config space from PIC. There are also 32 MSI-X interrupts available per link on XLP9XX. Update XLP MSI/MSI-X code to handle this. Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com> Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: g@linux-mips.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6912/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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