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| author | Thierry Reding <treding@nvidia.com> | 2017-08-30 12:21:04 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2017-10-19 16:38:41 +0200 |
| commit | bc2e4d2986e9d2b8a99c16eb8222da2a360a581f (patch) | |
| tree | 68eec3b252a9c773c6155b09d9e3c632a900c653 /mm | |
| parent | 1d7e2c8e5431454f65f0b785f3aa8bdba2ff436d (diff) | |
| download | talos-op-linux-bc2e4d2986e9d2b8a99c16eb8222da2a360a581f.tar.gz talos-op-linux-bc2e4d2986e9d2b8a99c16eb8222da2a360a581f.zip | |
clk: tegra: Fix sor1_out clock implementation
This clock was previously called sor1_src and was modelled as an input
to the sor1 module clock. However, it's really an output clock that can
be fed either from the safe, the sor1_pad_clkout or the sor1 module
clocks. sor1 itself can take input from either of the display PLLs.
The same implementation for the sor1_out clock is used on Tegra186, so
this nicely lines up both SoC generations to deal with this clock in a
uniform way.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'mm')
0 files changed, 0 insertions, 0 deletions
