diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2016-06-03 15:05:51 +0200 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2016-06-03 15:05:51 +0200 |
commit | 2eec3707a33fbf1c2e0a88ffc9fc0e465c2a59fd (patch) | |
tree | 9e47763ecd38f0ddd29f07e1ce199680304449fa /mm/cma.c | |
parent | 59fa5860204ffc95128d60cba9f54f9740a42c7d (diff) | |
parent | 0de6b9979e2e10c79e5702d2d902cd7284d17689 (diff) | |
download | talos-op-linux-2eec3707a33fbf1c2e0a88ffc9fc0e465c2a59fd.tar.gz talos-op-linux-2eec3707a33fbf1c2e0a88ffc9fc0e465c2a59fd.zip |
Merge tag 'irqchip-4.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent
Merge irqchip updates from Marc Zyngier:
- A number of embarassing buglets (GICv3, PIC32)
- A more substential errata workaround for Cavium's GICv3 ITS
(kept for post-rc1 due to its dependency on NUMA)
Diffstat (limited to 'mm/cma.c')
-rw-r--r-- | mm/cma.c | 7 |
1 files changed, 4 insertions, 3 deletions
@@ -183,7 +183,8 @@ int __init cma_init_reserved_mem(phys_addr_t base, phys_addr_t size, return -EINVAL; /* ensure minimal alignment required by mm core */ - alignment = PAGE_SIZE << max(MAX_ORDER - 1, pageblock_order); + alignment = PAGE_SIZE << + max_t(unsigned long, MAX_ORDER - 1, pageblock_order); /* alignment should be aligned with order_per_bit */ if (!IS_ALIGNED(alignment >> PAGE_SHIFT, 1 << order_per_bit)) @@ -266,8 +267,8 @@ int __init cma_declare_contiguous(phys_addr_t base, * migratetype page by page allocator's buddy algorithm. In the case, * you couldn't get a contiguous memory, which is not what we want. */ - alignment = max(alignment, - (phys_addr_t)PAGE_SIZE << max(MAX_ORDER - 1, pageblock_order)); + alignment = max(alignment, (phys_addr_t)PAGE_SIZE << + max_t(unsigned long, MAX_ORDER - 1, pageblock_order)); base = ALIGN(base, alignment); size = ALIGN(size, alignment); limit &= ~(alignment - 1); |