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authorWill Deacon <will.deacon@arm.com>2014-02-07 19:12:20 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2014-02-10 11:44:26 +0000
commitbae0ca2bc550d1ec6a118fb8f2696f18c4da3d8e (patch)
treed3bb5504e13472fad2bdbb928b8a7cdfeee1c594 /lib/of-reconfig-notifier-error-inject.c
parentca4744084772e1fee999391bee0fcdca5d91a757 (diff)
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ARM: 7953/1: mm: ensure TLB invalidation is complete before enabling MMU
During __v{6,7}_setup, we invalidate the TLBs since we are about to enable the MMU on return to head.S. Unfortunately, without a subsequent dsb instruction, the invalidation is not guaranteed to have completed by the time we write to the sctlr, potentially exposing us to junk/stale translations cached in the TLB. This patch reworks the init functions so that the dsb used to ensure completion of cache/predictor maintenance is also used to ensure completion of the TLB invalidation. Cc: <stable@vger.kernel.org> Reported-by: Albin Tonnerre <Albin.Tonnerre@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'lib/of-reconfig-notifier-error-inject.c')
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