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author | Thomas Gleixner <tglx@linutronix.de> | 2011-07-19 16:19:51 +0200 |
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committer | Ingo Molnar <mingo@elte.hu> | 2011-09-13 11:12:17 +0200 |
commit | 1f5b3c3fd2d73d6b30e9ef6dcbf131a791d5cbbd (patch) | |
tree | 1d24f2510bd8c57f5e026bf9a7ff93999ed39577 /include/linux | |
parent | 289b4e7a48d91fbef7af819020d826ad9f49f568 (diff) | |
download | talos-op-linux-1f5b3c3fd2d73d6b30e9ef6dcbf131a791d5cbbd.tar.gz talos-op-linux-1f5b3c3fd2d73d6b30e9ef6dcbf131a791d5cbbd.zip |
locking, x86, iommu: Annotate iommu->register_lock as raw
The iommu->register_lock can be taken in atomic context and therefore
must not be preempted on -rt - annotate it.
In mainline this change documents the low level nature of
the lock - otherwise there's no functional difference. Lockdep
and Sparse checking will work as usual.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/linux')
-rw-r--r-- | include/linux/intel-iommu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h index 9310c699a37d..19728c462399 100644 --- a/include/linux/intel-iommu.h +++ b/include/linux/intel-iommu.h @@ -311,7 +311,7 @@ struct intel_iommu { u64 cap; u64 ecap; u32 gcmd; /* Holds TE, EAFL. Don't need SRTP, SFL, WBF */ - spinlock_t register_lock; /* protect register handling */ + raw_spinlock_t register_lock; /* protect register handling */ int seq_id; /* sequence id of the iommu */ int agaw; /* agaw of this iommu */ int msagaw; /* max sagaw of this iommu */ |