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| author | Ingo Molnar <mingo@elte.hu> | 2011-09-26 12:53:42 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2011-09-26 12:54:28 +0200 |
| commit | ed3982cf3748b657ffb79d9d1c2e4a562661db2d (patch) | |
| tree | 6e3654f460e23aa1b1512896aa3f03886a69be1b /include/linux/pci.h | |
| parent | cba9bd22a5f8f857534b9a7f3fb3cafa0ac5fb75 (diff) | |
| parent | d93dc5c4478c1fd5de85a3e8aece9aad7bbae044 (diff) | |
| download | talos-op-linux-ed3982cf3748b657ffb79d9d1c2e4a562661db2d.tar.gz talos-op-linux-ed3982cf3748b657ffb79d9d1c2e4a562661db2d.zip | |
Merge commit 'v3.1-rc7' into perf/core
Merge reason: Pick up the latest upstream fixes.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/linux/pci.h')
| -rw-r--r-- | include/linux/pci.h | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/include/linux/pci.h b/include/linux/pci.h index f27893b3b724..8c230cbcbb48 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -251,7 +251,8 @@ struct pci_dev { u8 revision; /* PCI revision, low byte of class word */ u8 hdr_type; /* PCI header type (`multi' flag masked out) */ u8 pcie_cap; /* PCI-E capability offset */ - u8 pcie_type; /* PCI-E device/port type */ + u8 pcie_type:4; /* PCI-E device/port type */ + u8 pcie_mpss:3; /* PCI-E Max Payload Size Supported */ u8 rom_base_reg; /* which config register controls the ROM */ u8 pin; /* which interrupt pin this device uses */ @@ -617,6 +618,16 @@ struct pci_driver { /* these external functions are only available when PCI support is enabled */ #ifdef CONFIG_PCI +extern void pcie_bus_configure_settings(struct pci_bus *bus, u8 smpss); + +enum pcie_bus_config_types { + PCIE_BUS_PERFORMANCE, + PCIE_BUS_SAFE, + PCIE_BUS_PEER2PEER, +}; + +extern enum pcie_bus_config_types pcie_bus_config; + extern struct bus_type pci_bus_type; /* Do NOT directly access these two variables, unless you are arch specific pci @@ -796,10 +807,13 @@ int pcix_get_mmrbc(struct pci_dev *dev); int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc); int pcie_get_readrq(struct pci_dev *dev); int pcie_set_readrq(struct pci_dev *dev, int rq); +int pcie_get_mps(struct pci_dev *dev); +int pcie_set_mps(struct pci_dev *dev, int mps); int __pci_reset_function(struct pci_dev *dev); int pci_reset_function(struct pci_dev *dev); void pci_update_resource(struct pci_dev *dev, int resno); int __must_check pci_assign_resource(struct pci_dev *dev, int i); +int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resource_size_t add_size, resource_size_t align); int pci_select_bars(struct pci_dev *dev, unsigned long flags); /* ROM control related routines */ |
