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| author | Haggai Eran <haggaie@mellanox.com> | 2014-12-11 17:04:21 +0200 |
|---|---|---|
| committer | Roland Dreier <roland@purestorage.com> | 2014-12-15 18:19:02 -0800 |
| commit | cc149f751b75211df8c41fcd60bd0006e6143ed6 (patch) | |
| tree | 9a3f3314afd5c74cad36774b0df30eafe16c6cfd /include/linux/mlx5 | |
| parent | 8cdd312cfed706b067d7ea952603e28cc33c40cc (diff) | |
| download | talos-op-linux-cc149f751b75211df8c41fcd60bd0006e6143ed6.tar.gz talos-op-linux-cc149f751b75211df8c41fcd60bd0006e6143ed6.zip | |
IB/mlx5: Changes in memory region creation to support on-demand paging
This patch wraps together several changes needed for on-demand paging support
in the mlx5_ib_populate_pas function, and when registering memory regions.
* Instead of accepting a UMR bit telling the function to enable all
access flags, the function now accepts the access flags themselves.
* For on-demand paging memory regions, fill the memory tables from the
correct list, and enable/disable the access flags per-page according
to whether the page is present.
* A new bit is set to enable writing of access flags when using the
firmware create_mkey command.
* Disable contig pages when on-demand paging is enabled.
In addition the patch changes the UMR code to use PTR_ALIGN instead of
our own macro.
Signed-off-by: Haggai Eran <haggaie@mellanox.com>
Signed-off-by: Roland Dreier <roland@purestorage.com>
Diffstat (limited to 'include/linux/mlx5')
| -rw-r--r-- | include/linux/mlx5/device.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h index 70c28239e339..64512a7354cb 100644 --- a/include/linux/mlx5/device.h +++ b/include/linux/mlx5/device.h @@ -198,6 +198,9 @@ enum { MLX5_UMR_INLINE = (1 << 7), }; +#define MLX5_UMR_MTT_ALIGNMENT 0x40 +#define MLX5_UMR_MTT_MASK (MLX5_UMR_MTT_ALIGNMENT - 1) + enum mlx5_event { MLX5_EVENT_TYPE_COMP = 0x0, |
